1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=thumb-eabi < %s | FileCheck %s 3 4define i1 @test_srem_odd(i29 %X) nounwind { 5; CHECK-LABEL: test_srem_odd: 6; CHECK: @ %bb.0: 7; CHECK-NEXT: ldr r1, .LCPI0_0 8; CHECK-NEXT: muls r1, r0, r1 9; CHECK-NEXT: ldr r0, .LCPI0_1 10; CHECK-NEXT: adds r0, r1, r0 11; CHECK-NEXT: ldr r1, .LCPI0_2 12; CHECK-NEXT: cmp r0, r1 13; CHECK-NEXT: blo .LBB0_2 14; CHECK-NEXT: @ %bb.1: 15; CHECK-NEXT: movs r0, #0 16; CHECK-NEXT: bx lr 17; CHECK-NEXT: .LBB0_2: 18; CHECK-NEXT: movs r0, #1 19; CHECK-NEXT: bx lr 20; CHECK-NEXT: .p2align 2 21; CHECK-NEXT: @ %bb.3: 22; CHECK-NEXT: .LCPI0_0: 23; CHECK-NEXT: .long 4208200280 @ 0xfad40a58 24; CHECK-NEXT: .LCPI0_1: 25; CHECK-NEXT: .long 21691752 @ 0x14afd68 26; CHECK-NEXT: .LCPI0_2: 27; CHECK-NEXT: .long 43383512 @ 0x295fad8 28 %srem = srem i29 %X, 99 29 %cmp = icmp eq i29 %srem, 0 30 ret i1 %cmp 31} 32 33define i1 @test_srem_even(i4 %X) nounwind { 34; CHECK-LABEL: test_srem_even: 35; CHECK: @ %bb.0: 36; CHECK-NEXT: lsls r1, r0, #28 37; CHECK-NEXT: asrs r1, r1, #28 38; CHECK-NEXT: movs r2, #3 39; CHECK-NEXT: muls r2, r1, r2 40; CHECK-NEXT: lsrs r1, r2, #31 41; CHECK-NEXT: lsrs r2, r2, #4 42; CHECK-NEXT: adds r1, r2, r1 43; CHECK-NEXT: movs r2, #6 44; CHECK-NEXT: muls r2, r1, r2 45; CHECK-NEXT: subs r0, r0, r2 46; CHECK-NEXT: movs r1, #15 47; CHECK-NEXT: ands r1, r0 48; CHECK-NEXT: subs r1, r1, #1 49; CHECK-NEXT: rsbs r0, r1, #0 50; CHECK-NEXT: adcs r0, r1 51; CHECK-NEXT: bx lr 52 %srem = srem i4 %X, 6 53 %cmp = icmp eq i4 %srem, 1 54 ret i1 %cmp 55} 56 57define i1 @test_srem_pow2_setne(i6 %X) nounwind { 58; CHECK-LABEL: test_srem_pow2_setne: 59; CHECK: @ %bb.0: 60; CHECK-NEXT: lsls r1, r0, #26 61; CHECK-NEXT: asrs r1, r1, #26 62; CHECK-NEXT: lsrs r1, r1, #30 63; CHECK-NEXT: adds r1, r0, r1 64; CHECK-NEXT: movs r2, #60 65; CHECK-NEXT: ands r2, r1 66; CHECK-NEXT: subs r1, r0, r2 67; CHECK-NEXT: movs r0, #63 68; CHECK-NEXT: ands r0, r1 69; CHECK-NEXT: subs r1, r0, #1 70; CHECK-NEXT: sbcs r0, r1 71; CHECK-NEXT: bx lr 72 %srem = srem i6 %X, 4 73 %cmp = icmp ne i6 %srem, 0 74 ret i1 %cmp 75} 76 77define <3 x i1> @test_srem_vec(<3 x i33> %X) nounwind { 78; CHECK-LABEL: test_srem_vec: 79; CHECK: @ %bb.0: 80; CHECK-NEXT: .save {r4, r5, r6, r7, lr} 81; CHECK-NEXT: push {r4, r5, r6, r7, lr} 82; CHECK-NEXT: .pad #12 83; CHECK-NEXT: sub sp, #12 84; CHECK-NEXT: movs r7, r3 85; CHECK-NEXT: str r2, [sp, #4] @ 4-byte Spill 86; CHECK-NEXT: movs r5, #1 87; CHECK-NEXT: ands r1, r5 88; CHECK-NEXT: rsbs r1, r1, #0 89; CHECK-NEXT: movs r6, #9 90; CHECK-NEXT: movs r3, #0 91; CHECK-NEXT: str r3, [sp] @ 4-byte Spill 92; CHECK-NEXT: movs r2, r6 93; CHECK-NEXT: bl __aeabi_ldivmod 94; CHECK-NEXT: movs r4, r2 95; CHECK-NEXT: movs r0, #3 96; CHECK-NEXT: str r0, [sp, #8] @ 4-byte Spill 97; CHECK-NEXT: eors r4, r0 98; CHECK-NEXT: orrs r4, r3 99; CHECK-NEXT: subs r0, r4, #1 100; CHECK-NEXT: sbcs r4, r0 101; CHECK-NEXT: ands r7, r5 102; CHECK-NEXT: rsbs r1, r7, #0 103; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload 104; CHECK-NEXT: movs r2, r6 105; CHECK-NEXT: ldr r7, [sp] @ 4-byte Reload 106; CHECK-NEXT: movs r3, r7 107; CHECK-NEXT: bl __aeabi_ldivmod 108; CHECK-NEXT: movs r0, r5 109; CHECK-NEXT: bics r0, r3 110; CHECK-NEXT: movs r1, #2 111; CHECK-NEXT: mvns r6, r1 112; CHECK-NEXT: eors r6, r2 113; CHECK-NEXT: orrs r6, r0 114; CHECK-NEXT: subs r0, r6, #1 115; CHECK-NEXT: sbcs r6, r0 116; CHECK-NEXT: ldr r0, [sp, #36] 117; CHECK-NEXT: ands r0, r5 118; CHECK-NEXT: rsbs r1, r0, #0 119; CHECK-NEXT: movs r0, #8 120; CHECK-NEXT: mvns r2, r0 121; CHECK-NEXT: mvns r3, r7 122; CHECK-NEXT: ldr r0, [sp, #32] 123; CHECK-NEXT: bl __aeabi_ldivmod 124; CHECK-NEXT: ands r5, r3 125; CHECK-NEXT: ldr r0, [sp, #8] @ 4-byte Reload 126; CHECK-NEXT: eors r2, r0 127; CHECK-NEXT: orrs r2, r5 128; CHECK-NEXT: subs r0, r2, #1 129; CHECK-NEXT: sbcs r2, r0 130; CHECK-NEXT: movs r0, r4 131; CHECK-NEXT: movs r1, r6 132; CHECK-NEXT: add sp, #12 133; CHECK-NEXT: pop {r4, r5, r6, r7} 134; CHECK-NEXT: pop {r3} 135; CHECK-NEXT: bx r3 136 %srem = srem <3 x i33> %X, <i33 9, i33 9, i33 -9> 137 %cmp = icmp ne <3 x i33> %srem, <i33 3, i33 -3, i33 3> 138 ret <3 x i1> %cmp 139} 140