1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple thumbv8m.base-none-eabi -run-pass=peephole-opt -verify-machineinstrs -o - %s | FileCheck %s 3--- | 4 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 5 target triple = "thumbv8m.base-none-none-eabi" 6 7 define i32 @test_adc(i32 %a, i32 %b) { ret i32 %a } 8 define i32 @test_adc_mov(i32 %a, i32 %b) { ret i32 %a } 9 define i32 @test_sbc(i32 %a, i32 %b) { ret i32 %a } 10 define i32 @test_rsb(i32 %a) { ret i32 %a } 11 define i32 @test_and(i32 %a, i32 %b) { ret i32 %a } 12 define i32 @test_orr(i32 %a, i32 %b) { ret i32 %a } 13 define i32 @test_eor(i32 %a, i32 %b) { ret i32 %a } 14 define i32 @test_bic(i32 %a, i32 %b) { ret i32 %a } 15 define i32 @test_mvn(i32 %a) { ret i32 %a } 16 define i32 @test_asrrr(i32 %a, i32 %b) { ret i32 %a } 17 define i32 @test_asrri(i32 %a) { ret i32 %a } 18 define i32 @test_ror(i32 %a, i32 %b) { ret i32 %a } 19 20... 21--- 22name: test_adc 23liveins: 24 - { reg: '$r0', virtual-reg: '%0' } 25 - { reg: '$r1', virtual-reg: '%1' } 26body: | 27 ; CHECK-LABEL: name: test_adc 28 ; CHECK: bb.0: 29 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 30 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 31 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 32 ; CHECK: %2:tgpr, $cpsr = tADDrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 33 ; CHECK: %3:tgpr, $cpsr = tADC [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg, implicit $cpsr 34 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 35 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 36 ; CHECK: bb.1: 37 ; CHECK: $r0 = COPY [[COPY1]] 38 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 39 ; CHECK: bb.2: 40 ; CHECK: %4:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 41 ; CHECK: $r0 = COPY %3 42 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 43 bb.0: 44 successors: %bb.2(0x40000000), %bb.1(0x40000000) 45 liveins: $r0, $r1 46 47 %1:tgpr = COPY $r1 48 %0:tgpr = COPY $r0 49 %3:tgpr, $cpsr = tADDrr %0, %1, 14, $noreg 50 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 51 tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr 52 tBcc %bb.2, 1, $cpsr 53 tB %bb.1, 14, $noreg 54 55 bb.1: 56 $r0 = COPY %0 57 tBX_RET 14, $noreg, implicit $r0 58 59 bb.2: 60 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 61 $r0 = COPY %2 62 tBX_RET 14, $noreg, implicit $r0 63... 64--- 65name: test_adc_mov 66liveins: 67 - { reg: '$r0', virtual-reg: '%0' } 68 - { reg: '$r1', virtual-reg: '%1' } 69body: | 70 ; CHECK-LABEL: name: test_adc_mov 71 ; CHECK: bb.0: 72 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 73 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 74 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 75 ; CHECK: %2:tgpr, $cpsr = tADDrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 76 ; CHECK: %3:tgpr, dead $cpsr = tADC [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg, implicit $cpsr 77 ; CHECK: %4:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 78 ; CHECK: tCMPi8 %3, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 79 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 80 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 81 ; CHECK: bb.1: 82 ; CHECK: $r0 = COPY [[COPY1]] 83 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 84 ; CHECK: bb.2: 85 ; CHECK: %5:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 86 ; CHECK: $r0 = COPY %3 87 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 88 bb.0: 89 successors: %bb.2(0x40000000), %bb.1(0x40000000) 90 liveins: $r0, $r1 91 92 %1:tgpr = COPY $r1 93 %0:tgpr = COPY $r0 94 %3:tgpr, $cpsr = tADDrr %0, %1, 14, $noreg 95 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 96 %5:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 97 tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr 98 tBcc %bb.2, 1, $cpsr 99 tB %bb.1, 14, $noreg 100 101 bb.1: 102 $r0 = COPY %0 103 tBX_RET 14, $noreg, implicit $r0 104 105 bb.2: 106 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 107 $r0 = COPY %2 108 tBX_RET 14, $noreg, implicit $r0 109... 110--- 111name: test_sbc 112liveins: 113 - { reg: '$r0', virtual-reg: '%0' } 114 - { reg: '$r1', virtual-reg: '%1' } 115body: | 116 ; CHECK-LABEL: name: test_sbc 117 ; CHECK: bb.0: 118 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 119 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 120 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 121 ; CHECK: %2:tgpr, $cpsr = tADDrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 122 ; CHECK: %3:tgpr, $cpsr = tSBC [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg, implicit $cpsr 123 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 124 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 125 ; CHECK: bb.1: 126 ; CHECK: $r0 = COPY [[COPY1]] 127 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 128 ; CHECK: bb.2: 129 ; CHECK: %4:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 130 ; CHECK: $r0 = COPY %3 131 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 132 bb.0: 133 successors: %bb.2(0x40000000), %bb.1(0x40000000) 134 liveins: $r0, $r1 135 136 %1:tgpr = COPY $r1 137 %0:tgpr = COPY $r0 138 %3:tgpr, $cpsr = tADDrr %0, %1, 14, $noreg 139 %2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr 140 tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr 141 tBcc %bb.2, 1, $cpsr 142 tB %bb.1, 14, $noreg 143 144 bb.1: 145 $r0 = COPY %0 146 tBX_RET 14, $noreg, implicit $r0 147 148 bb.2: 149 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 150 $r0 = COPY %2 151 tBX_RET 14, $noreg, implicit $r0 152... 153--- 154name: test_rsb 155liveins: 156 - { reg: '$r0', virtual-reg: '%0' } 157body: | 158 ; CHECK-LABEL: name: test_rsb 159 ; CHECK: bb.0: 160 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 161 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0 162 ; CHECK: %1:tgpr, $cpsr = tRSB [[COPY]], 14 /* CC::al */, $noreg 163 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 164 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 165 ; CHECK: bb.1: 166 ; CHECK: $r0 = COPY [[COPY]] 167 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 168 ; CHECK: bb.2: 169 ; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 170 ; CHECK: $r0 = COPY %1 171 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 172 bb.0: 173 successors: %bb.2(0x40000000), %bb.1(0x40000000) 174 liveins: $r0, $r1 175 176 %0:tgpr = COPY $r0 177 %1:tgpr, dead $cpsr = tRSB %0, 14, $noreg 178 tCMPi8 %1, 0, 14, $noreg, implicit-def $cpsr 179 tBcc %bb.2, 1, $cpsr 180 tB %bb.1, 14, $noreg 181 182 bb.1: 183 $r0 = COPY %0 184 tBX_RET 14, $noreg, implicit $r0 185 186 bb.2: 187 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 188 $r0 = COPY %1 189 tBX_RET 14, $noreg, implicit $r0 190... 191--- 192name: test_and 193liveins: 194 - { reg: '$r0', virtual-reg: '%0' } 195 - { reg: '$r1', virtual-reg: '%1' } 196body: | 197 ; CHECK-LABEL: name: test_and 198 ; CHECK: bb.0: 199 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 200 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 201 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 202 ; CHECK: %2:tgpr, $cpsr = tAND [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 203 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 204 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 205 ; CHECK: bb.1: 206 ; CHECK: $r0 = COPY [[COPY1]] 207 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 208 ; CHECK: bb.2: 209 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 210 ; CHECK: $r0 = COPY %2 211 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 212 bb.0: 213 successors: %bb.2(0x40000000), %bb.1(0x40000000) 214 liveins: $r0, $r1 215 216 %1:tgpr = COPY $r1 217 %0:tgpr = COPY $r0 218 %2:tgpr, dead $cpsr = tAND %0, %1, 14, $noreg 219 tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr 220 tBcc %bb.2, 1, $cpsr 221 tB %bb.1, 14, $noreg 222 223 bb.1: 224 $r0 = COPY %0 225 tBX_RET 14, $noreg, implicit $r0 226 227 bb.2: 228 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 229 $r0 = COPY %2 230 tBX_RET 14, $noreg, implicit $r0 231... 232--- 233name: test_orr 234liveins: 235 - { reg: '$r0', virtual-reg: '%0' } 236 - { reg: '$r1', virtual-reg: '%1' } 237body: | 238 ; CHECK-LABEL: name: test_orr 239 ; CHECK: bb.0: 240 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 241 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 242 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 243 ; CHECK: %2:tgpr, $cpsr = tORR [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 244 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 245 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 246 ; CHECK: bb.1: 247 ; CHECK: $r0 = COPY [[COPY1]] 248 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 249 ; CHECK: bb.2: 250 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 251 ; CHECK: $r0 = COPY %2 252 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 253 bb.0: 254 successors: %bb.2(0x40000000), %bb.1(0x40000000) 255 liveins: $r0, $r1 256 257 %1:tgpr = COPY $r1 258 %0:tgpr = COPY $r0 259 %2:tgpr, dead $cpsr = tORR %0, %1, 14, $noreg 260 tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr 261 tBcc %bb.2, 1, $cpsr 262 tB %bb.1, 14, $noreg 263 264 bb.1: 265 $r0 = COPY %0 266 tBX_RET 14, $noreg, implicit $r0 267 268 bb.2: 269 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 270 $r0 = COPY %2 271 tBX_RET 14, $noreg, implicit $r0 272... 273--- 274name: test_eor 275liveins: 276 - { reg: '$r0', virtual-reg: '%0' } 277 - { reg: '$r1', virtual-reg: '%1' } 278body: | 279 ; CHECK-LABEL: name: test_eor 280 ; CHECK: bb.0: 281 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 282 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 283 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 284 ; CHECK: %2:tgpr, $cpsr = tEOR [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 285 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 286 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 287 ; CHECK: bb.1: 288 ; CHECK: $r0 = COPY [[COPY1]] 289 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 290 ; CHECK: bb.2: 291 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 292 ; CHECK: $r0 = COPY %2 293 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 294 bb.0: 295 successors: %bb.2(0x40000000), %bb.1(0x40000000) 296 liveins: $r0, $r1 297 298 %1:tgpr = COPY $r1 299 %0:tgpr = COPY $r0 300 %2:tgpr, dead $cpsr = tEOR %0, %1, 14, $noreg 301 tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr 302 tBcc %bb.2, 1, $cpsr 303 tB %bb.1, 14, $noreg 304 305 bb.1: 306 $r0 = COPY %0 307 tBX_RET 14, $noreg, implicit $r0 308 309 bb.2: 310 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 311 $r0 = COPY %2 312 tBX_RET 14, $noreg, implicit $r0 313... 314--- 315name: test_bic 316liveins: 317 - { reg: '$r0', virtual-reg: '%0' } 318 - { reg: '$r1', virtual-reg: '%1' } 319body: | 320 ; CHECK-LABEL: name: test_bic 321 ; CHECK: bb.0: 322 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 323 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 324 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 325 ; CHECK: %2:tgpr, $cpsr = tBIC [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 326 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 327 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 328 ; CHECK: bb.1: 329 ; CHECK: $r0 = COPY [[COPY1]] 330 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 331 ; CHECK: bb.2: 332 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 333 ; CHECK: $r0 = COPY %2 334 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 335 bb.0: 336 successors: %bb.2(0x40000000), %bb.1(0x40000000) 337 liveins: $r0, $r1 338 339 %1:tgpr = COPY $r1 340 %0:tgpr = COPY $r0 341 %2:tgpr, dead $cpsr = tBIC %0, %1, 14, $noreg 342 tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr 343 tBcc %bb.2, 1, $cpsr 344 tB %bb.1, 14, $noreg 345 346 bb.1: 347 $r0 = COPY %0 348 tBX_RET 14, $noreg, implicit $r0 349 350 bb.2: 351 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 352 $r0 = COPY %2 353 tBX_RET 14, $noreg, implicit $r0 354... 355--- 356name: test_mvn 357liveins: 358 - { reg: '$r0', virtual-reg: '%0' } 359body: | 360 ; CHECK-LABEL: name: test_mvn 361 ; CHECK: bb.0: 362 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 363 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0 364 ; CHECK: %1:tgpr, $cpsr = tMVN [[COPY]], 14 /* CC::al */, $noreg 365 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 366 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 367 ; CHECK: bb.1: 368 ; CHECK: $r0 = COPY [[COPY]] 369 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 370 ; CHECK: bb.2: 371 ; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 372 ; CHECK: $r0 = COPY %1 373 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 374 bb.0: 375 successors: %bb.2(0x40000000), %bb.1(0x40000000) 376 liveins: $r0, $r1 377 378 %0:tgpr = COPY $r0 379 %1:tgpr, dead $cpsr = tMVN %0, 14, $noreg 380 tCMPi8 %1, 0, 14, $noreg, implicit-def $cpsr 381 tBcc %bb.2, 1, $cpsr 382 tB %bb.1, 14, $noreg 383 384 bb.1: 385 $r0 = COPY %0 386 tBX_RET 14, $noreg, implicit $r0 387 388 bb.2: 389 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 390 $r0 = COPY %1 391 tBX_RET 14, $noreg, implicit $r0 392... 393--- 394name: test_asrrr 395liveins: 396 - { reg: '$r0', virtual-reg: '%0' } 397 - { reg: '$r1', virtual-reg: '%1' } 398body: | 399 ; CHECK-LABEL: name: test_asrrr 400 ; CHECK: bb.0: 401 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 402 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 403 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 404 ; CHECK: %2:tgpr, $cpsr = tASRrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 405 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 406 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 407 ; CHECK: bb.1: 408 ; CHECK: $r0 = COPY [[COPY1]] 409 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 410 ; CHECK: bb.2: 411 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 412 ; CHECK: $r0 = COPY %2 413 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 414 bb.0: 415 successors: %bb.2(0x40000000), %bb.1(0x40000000) 416 liveins: $r0, $r1 417 418 %1:tgpr = COPY $r1 419 %0:tgpr = COPY $r0 420 %2:tgpr, dead $cpsr = tASRrr %0, %1, 14, $noreg 421 tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr 422 tBcc %bb.2, 1, $cpsr 423 tB %bb.1, 14, $noreg 424 425 bb.1: 426 $r0 = COPY %0 427 tBX_RET 14, $noreg, implicit $r0 428 429 bb.2: 430 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 431 $r0 = COPY %2 432 tBX_RET 14, $noreg, implicit $r0 433... 434--- 435name: test_asrri 436liveins: 437 - { reg: '$r0', virtual-reg: '%0' } 438body: | 439 ; CHECK-LABEL: name: test_asrri 440 ; CHECK: bb.0: 441 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 442 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0 443 ; CHECK: %1:tgpr, $cpsr = tASRri [[COPY]], 1, 14 /* CC::al */, $noreg 444 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 445 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 446 ; CHECK: bb.1: 447 ; CHECK: $r0 = COPY [[COPY]] 448 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 449 ; CHECK: bb.2: 450 ; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 451 ; CHECK: $r0 = COPY %1 452 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 453 bb.0: 454 successors: %bb.2(0x40000000), %bb.1(0x40000000) 455 liveins: $r0, $r1 456 457 %0:tgpr = COPY $r0 458 %2:tgpr, dead $cpsr = tASRri %0, 1, 14, $noreg 459 tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr 460 tBcc %bb.2, 1, $cpsr 461 tB %bb.1, 14, $noreg 462 463 bb.1: 464 $r0 = COPY %0 465 tBX_RET 14, $noreg, implicit $r0 466 467 bb.2: 468 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 469 $r0 = COPY %2 470 tBX_RET 14, $noreg, implicit $r0 471... 472--- 473name: test_ror 474liveins: 475 - { reg: '$r0', virtual-reg: '%0' } 476 - { reg: '$r1', virtual-reg: '%1' } 477body: | 478 ; CHECK-LABEL: name: test_ror 479 ; CHECK: bb.0: 480 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 481 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 482 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 483 ; CHECK: %2:tgpr, $cpsr = tROR [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 484 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 485 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 486 ; CHECK: bb.1: 487 ; CHECK: $r0 = COPY [[COPY1]] 488 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 489 ; CHECK: bb.2: 490 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 491 ; CHECK: $r0 = COPY %2 492 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 493 bb.0: 494 successors: %bb.2(0x40000000), %bb.1(0x40000000) 495 liveins: $r0, $r1 496 497 %1:tgpr = COPY $r1 498 %0:tgpr = COPY $r0 499 %2:tgpr, dead $cpsr = tROR %0, %1, 14, $noreg 500 tCMPi8 %2, 0, 14, $noreg, implicit-def $cpsr 501 tBcc %bb.2, 1, $cpsr 502 tB %bb.1, 14, $noreg 503 504 bb.1: 505 $r0 = COPY %0 506 tBX_RET 14, $noreg, implicit $r0 507 508 bb.2: 509 %4:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 510 $r0 = COPY %2 511 tBX_RET 14, $noreg, implicit $r0 512... 513