1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc %s -o - -asm-verbose=false | FileCheck %s 3 4target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 5target triple = "thumbv6m-arm-none-eabi" 6 7define i32 @C(i32 %x, ptr nocapture %y) #0 { 8; CHECK-LABEL: C: 9; CHECK: .save {r4, r5, r7, lr} 10; CHECK-NEXT: push {r4, r5, r7, lr} 11; CHECK-NEXT: movs r2, #0 12; CHECK-NEXT: ldr r3, .LCPI0_0 13; CHECK-NEXT: .LBB0_1: 14; CHECK-NEXT: cmp r2, #128 15; CHECK-NEXT: beq .LBB0_5 16; CHECK-NEXT: movs r4, #0 17; CHECK-NEXT: str r4, [r3, #8] 18; CHECK-NEXT: lsls r4, r2, #2 19; CHECK-NEXT: adds r5, r4, r0 20; CHECK-NEXT: str r5, [r3] 21; CHECK-NEXT: movs r5, #1 22; CHECK-NEXT: str r5, [r3, #12] 23; CHECK-NEXT: isb sy 24; CHECK-NEXT: .LBB0_3: 25; CHECK-NEXT: ldr r5, [r3, #12] 26; CHECK-NEXT: cmp r5, #0 27; CHECK-NEXT: bne .LBB0_3 28; CHECK-NEXT: ldr r5, [r3, #4] 29; CHECK-NEXT: str r5, [r1, r4] 30; CHECK-NEXT: adds r2, r2, #1 31; CHECK-NEXT: b .LBB0_1 32; CHECK-NEXT: .LBB0_5: 33; CHECK-NEXT: movs r0, #0 34; CHECK-NEXT: pop {r4, r5, r7, pc} 35; CHECK-NEXT: .p2align 2 36; CHECK-NEXT: .LCPI0_0: 37; CHECK-NEXT: .long 805355524 38entry: 39 br label %for.cond 40 41for.cond: ; preds = %B.exit, %entry 42 %i.0 = phi i32 [ 0, %entry ], [ %inc, %B.exit ] 43 %exitcond = icmp eq i32 %i.0, 128 44 br i1 %exitcond, label %for.end, label %for.body 45 46for.body: ; preds = %for.cond 47 %mul = shl i32 %i.0, 2 48 %add = add i32 %mul, %x 49 store volatile i32 0, ptr inttoptr (i32 805355532 to ptr), align 4 50 store volatile i32 %add, ptr inttoptr (i32 805355524 to ptr), align 4 51 store volatile i32 1, ptr inttoptr (i32 805355536 to ptr), align 16 52 tail call void @llvm.arm.isb(i32 15) #1 53 br label %while.cond.i 54 55while.cond.i: ; preds = %while.cond.i, %for.body 56 %0 = load volatile i32, ptr inttoptr (i32 805355536 to ptr), align 16 57 %tobool.i = icmp eq i32 %0, 0 58 br i1 %tobool.i, label %B.exit, label %while.cond.i 59 60B.exit: ; preds = %while.cond.i 61 %1 = load volatile i32, ptr inttoptr (i32 805355528 to ptr), align 8 62 %arrayidx = getelementptr inbounds i32, ptr %y, i32 %i.0 63 store i32 %1, ptr %arrayidx, align 4 64 %inc = add nuw nsw i32 %i.0, 1 65 br label %for.cond 66 67for.end: ; preds = %for.cond 68 ret i32 0 69} 70 71; Function Attrs: nounwind 72declare void @llvm.arm.isb(i32) #1 73 74attributes #0 = { minsize nounwind optsize } 75attributes #1 = { nounwind } 76