1; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=cortex-m0 -verify-machineinstrs | FileCheck --check-prefix CHECK-T1 %s 2; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=cortex-m3 -verify-machineinstrs | FileCheck --check-prefix CHECK-T2 %s 3 4; CHECK-T1-LABEL: @mov_and_add 5; CHECK-T2-LABEL: @mov_and_add 6; CHECK-T1: movs r0, #255 7; CHECK-T1: adds r0, #12 8; CHECK-T2: movw r0, #267 9define i32 @mov_and_add() { 10 ret i32 267 11} 12 13; CHECK-T1-LABEL: @mov_and_add2 14; CHECK-T2-LABEL: @mov_and_add2 15; CHECK-T1: ldr r0, 16; CHECK-T2: movw r0, #511 17define i32 @mov_and_add2() { 18 ret i32 511 19} 20 21; CHECK-T1-LABEL: @test64 22; CHECK-T2-LABEL: @test64 23; CHECK-T1: movs r4, #0 24; CHECK-T1: mvns r5, r4 25; CHECK-T1: mov r0, r5 26; CHECK-T1: subs r0, #15 27; CHECK-T2: subs.w r0, r{{[0-9]+}}, #15 28; CHECK-T2-NEXT: sbc r1, r{{[0-9]+}}, #0 29define i32 @test64() { 30entry: 31 tail call void @fn1(i64 -1) 32 tail call void @fn1(i64 -1) 33 tail call void @fn1(i64 -16) 34 ret i32 0 35} 36declare void @fn1(i64) ; 37