xref: /llvm-project/llvm/test/CodeGen/Thumb/branchless-cmp.ll (revision e15c982f6d6ae355d8fbf9c9272ac549785b68e2) 
1; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m0 %s -verify-machineinstrs -o - | FileCheck %s
2
3define i32 @test1a(i32 %a, i32 %b) {
4entry:
5  %cmp = icmp ne i32 %a, %b
6  %cond = zext i1 %cmp to i32
7  ret i32 %cond
8; CHECK-LABEL: test1a:
9; CHECK-NOT: b{{(ne)|(eq)}}
10; CHECK:       subs r0, r0, r1
11; CHECK-NEXT:  subs r1, r0, #1
12; CHECK-NEXT:  sbcs r0, r1
13}
14
15define i32 @test1b(i32 %a, i32 %b) {
16entry:
17  %cmp = icmp eq i32 %a, %b
18  %cond = zext i1 %cmp to i32
19  ret i32 %cond
20; CHECK-LABEL: test1b:
21; CHECK-NOT: b{{(ne)|(eq)}}
22; CHECK:       subs    r1, r0, r1
23; CHECK-NEXT:  rsbs    r0, r1, #0
24; CHECK-NEXT:  adcs    r0, r1
25}
26
27define i32 @test2a(i32 %a, i32 %b) {
28entry:
29  %cmp = icmp eq i32 %a, %b
30  %cond = zext i1 %cmp to i32
31  ret i32 %cond
32; CHECK-LABEL: test2a:
33; CHECK-NOT: b{{(ne)|(eq)}}
34; CHECK:       subs    r1, r0, r1
35; CHECK-NEXT:  rsbs    r0, r1, #0
36; CHECK-NEXT:  adcs    r0, r1
37}
38
39define i32 @test2b(i32 %a, i32 %b) {
40entry:
41  %cmp = icmp ne i32 %a, %b
42  %cond = zext i1 %cmp to i32
43  ret i32 %cond
44; CHECK-LABEL: test2b:
45; CHECK-NOT: b{{(ne)|(eq)}}
46; CHECK:       subs    r0, r0, r1
47; CHECK-NEXT:  subs    r1, r0, #1
48; CHECK-NEXT:  sbcs    r0, r1
49}
50
51define i32 @test3a(i32 %a, i32 %b) {
52entry:
53  %cmp = icmp eq i32 %a, %b
54  %cond = select i1 %cmp, i32 0, i32 4
55  ret i32 %cond
56; CHECK-LABEL: test3a:
57; CHECK-NOT: b{{(ne)|(eq)}}
58; CHECK:       subs    r0, r0, r1
59; CHECK-NEXT:  subs    r1, r0, #1
60; CHECK-NEXT:  sbcs    r0, r1
61; CHECK-NEXT:  lsls    r0, r0, #2
62}
63
64define i32 @test3b(i32 %a, i32 %b) {
65entry:
66  %cmp = icmp eq i32 %a, %b
67  %cond = select i1 %cmp, i32 4, i32 0
68  ret i32 %cond
69; CHECK-LABEL: test3b:
70; CHECK-NOT: b{{(ne)|(eq)}}
71; CHECK:      subs	r0, r0, r1
72; CHECK-NEXT: rsbs	r1, r0, #0
73; CHECK-NEXT: adcs	r1, r0
74; CHECK-NEXT: lsls	r0, r1, #2
75}
76
77define i32 @test4a(i32 %a, i32 %b) {
78entry:
79  %cmp = icmp ne i32 %a, %b
80  %cond = select i1 %cmp, i32 0, i32 4
81  ret i32 %cond
82; CHECK-LABEL: test4a:
83; CHECK-NOT: b{{(ne)|(eq)}}
84; CHECK:      subs	r0, r0, r1
85; CHECK-NEXT: rsbs	r1, r0, #0
86; CHECK-NEXT: adcs	r1, r0
87; CHECK-NEXT: lsls	r0, r1, #2
88}
89
90define i32 @test4b(i32 %a, i32 %b) {
91entry:
92  %cmp = icmp ne i32 %a, %b
93  %cond = select i1 %cmp, i32 4, i32 0
94  ret i32 %cond
95; CHECK-LABEL: test4b:
96; CHECK-NOT: b{{(ne)|(eq)}}
97; CHECK:       subs  r0, r0, r1
98; CHECK-NEXT:  subs  r1, r0, #1
99; CHECK-NEXT:  sbcs  r0, r1
100; CHECK-NEXT:  lsls  r0, r0, #2
101}
102