xref: /llvm-project/llvm/test/CodeGen/SystemZ/vec-perm-12.ll (revision 0a76f7d9d8c1fc693568ed26420c47d92a6ba0e7)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; Test inserting a truncated value into a vector element
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | \
5; RUN:   FileCheck -check-prefix=CHECK-CODE %s
6; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | \
7; RUN:   FileCheck -check-prefix=CHECK-VECTOR %s
8
9define <4 x i32> @f1(<4 x i32> %x, i64 %y) {
10; CHECK-CODE-LABEL: f1:
11; CHECK-CODE:       # %bb.0:
12; CHECK-CODE-NEXT:    larl %r1, .LCPI0_0
13; CHECK-CODE-NEXT:    vl %v1, 0(%r1), 3
14; CHECK-CODE-NEXT:    vlvgf %v0, %r2, 0
15; CHECK-CODE-NEXT:    vperm %v24, %v24, %v0, %v1
16; CHECK-CODE-NEXT:    br %r14
17;
18; CHECK-VECTOR-LABEL: f1:
19; CHECK-VECTOR:       # %bb.0:
20; CHECK-VECTOR-NEXT:    larl %r1, .LCPI0_0
21; CHECK-VECTOR-NEXT:    vl %v1, 0(%r1), 3
22; CHECK-VECTOR-NEXT:    vlvgf %v0, %r2, 0
23; CHECK-VECTOR-NEXT:    vperm %v24, %v24, %v0, %v1
24; CHECK-VECTOR-NEXT:    br %r14
25
26
27  %elt0 = extractelement <4 x i32> %x, i32 3
28  %elt1 = extractelement <4 x i32> %x, i32 2
29  %elt2 = extractelement <4 x i32> %x, i32 1
30  %elt3 = trunc i64 %y to i32
31  %vec0 = insertelement <4 x i32> undef, i32 %elt0, i32 0
32  %vec1 = insertelement <4 x i32> %vec0, i32 %elt1, i32 1
33  %vec2 = insertelement <4 x i32> %vec1, i32 %elt2, i32 2
34  %vec3 = insertelement <4 x i32> %vec2, i32 %elt3, i32 3
35  ret <4 x i32> %vec3
36}
37
38