xref: /llvm-project/llvm/test/CodeGen/SystemZ/vec-intrinsics-03.ll (revision 0c568c2535848d1596a612c15248f299ec8c42be) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; Test vector intrinsics added with z15.
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s
5
6declare <16 x i8> @llvm.s390.vsld(<16 x i8>, <16 x i8>, i32)
7declare <16 x i8> @llvm.s390.vsrd(<16 x i8>, <16 x i8>, i32)
8
9declare {<16 x i8>, i32} @llvm.s390.vstrsb(<16 x i8>, <16 x i8>, <16 x i8>)
10declare {<16 x i8>, i32} @llvm.s390.vstrsh(<8 x i16>, <8 x i16>, <16 x i8>)
11declare {<16 x i8>, i32} @llvm.s390.vstrsf(<4 x i32>, <4 x i32>, <16 x i8>)
12declare {<16 x i8>, i32} @llvm.s390.vstrszb(<16 x i8>, <16 x i8>, <16 x i8>)
13declare {<16 x i8>, i32} @llvm.s390.vstrszh(<8 x i16>, <8 x i16>, <16 x i8>)
14declare {<16 x i8>, i32} @llvm.s390.vstrszf(<4 x i32>, <4 x i32>, <16 x i8>)
15
16
17; VSLD with the minimum useful value.
18define <16 x i8> @test_vsld_1(<16 x i8> %a, <16 x i8> %b) {
19; CHECK-LABEL: test_vsld_1:
20; CHECK:       # %bb.0:
21; CHECK-NEXT:    vsld %v24, %v24, %v26, 1
22; CHECK-NEXT:    br %r14
23  %res = call <16 x i8> @llvm.s390.vsld(<16 x i8> %a, <16 x i8> %b, i32 1)
24  ret <16 x i8> %res
25}
26
27; VSLD with the maximum value.
28define <16 x i8> @test_vsld_7(<16 x i8> %a, <16 x i8> %b) {
29; CHECK-LABEL: test_vsld_7:
30; CHECK:       # %bb.0:
31; CHECK-NEXT:    vsld %v24, %v24, %v26, 7
32; CHECK-NEXT:    br %r14
33  %res = call <16 x i8> @llvm.s390.vsld(<16 x i8> %a, <16 x i8> %b, i32 7)
34  ret <16 x i8> %res
35}
36
37; VSRD with the minimum useful value.
38define <16 x i8> @test_vsrd_1(<16 x i8> %a, <16 x i8> %b) {
39; CHECK-LABEL: test_vsrd_1:
40; CHECK:       # %bb.0:
41; CHECK-NEXT:    vsrd %v24, %v24, %v26, 1
42; CHECK-NEXT:    br %r14
43  %res = call <16 x i8> @llvm.s390.vsrd(<16 x i8> %a, <16 x i8> %b, i32 1)
44  ret <16 x i8> %res
45}
46
47; VSRD with the maximum value.
48define <16 x i8> @test_vsrd_7(<16 x i8> %a, <16 x i8> %b) {
49; CHECK-LABEL: test_vsrd_7:
50; CHECK:       # %bb.0:
51; CHECK-NEXT:    vsrd %v24, %v24, %v26, 7
52; CHECK-NEXT:    br %r14
53  %res = call <16 x i8> @llvm.s390.vsrd(<16 x i8> %a, <16 x i8> %b, i32 7)
54  ret <16 x i8> %res
55}
56
57
58; VSTRSB.
59define <16 x i8> @test_vstrsb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c,
60; CHECK-LABEL: test_vstrsb:
61; CHECK:       # %bb.0:
62; CHECK-NEXT:    vstrsb %v24, %v24, %v26, %v28, 0
63; CHECK-NEXT:    ipm %r0
64; CHECK-NEXT:    srl %r0, 28
65; CHECK-NEXT:    st %r0, 0(%r2)
66; CHECK-NEXT:    br %r14
67                              ptr %ccptr) {
68  %call = call {<16 x i8>, i32} @llvm.s390.vstrsb(<16 x i8> %a, <16 x i8> %b,
69                                                  <16 x i8> %c)
70  %res = extractvalue {<16 x i8>, i32} %call, 0
71  %cc = extractvalue {<16 x i8>, i32} %call, 1
72  store i32 %cc, ptr %ccptr
73  ret <16 x i8> %res
74}
75
76; VSTRSH.
77define <16 x i8> @test_vstrsh(<8 x i16> %a, <8 x i16> %b, <16 x i8> %c,
78; CHECK-LABEL: test_vstrsh:
79; CHECK:       # %bb.0:
80; CHECK-NEXT:    vstrsh %v24, %v24, %v26, %v28, 0
81; CHECK-NEXT:    ipm %r0
82; CHECK-NEXT:    srl %r0, 28
83; CHECK-NEXT:    st %r0, 0(%r2)
84; CHECK-NEXT:    br %r14
85                              ptr %ccptr) {
86  %call = call {<16 x i8>, i32} @llvm.s390.vstrsh(<8 x i16> %a, <8 x i16> %b,
87                                                  <16 x i8> %c)
88  %res = extractvalue {<16 x i8>, i32} %call, 0
89  %cc = extractvalue {<16 x i8>, i32} %call, 1
90  store i32 %cc, ptr %ccptr
91  ret <16 x i8> %res
92}
93
94; VSTRSFS.
95define <16 x i8> @test_vstrsf(<4 x i32> %a, <4 x i32> %b, <16 x i8> %c,
96; CHECK-LABEL: test_vstrsf:
97; CHECK:       # %bb.0:
98; CHECK-NEXT:    vstrsf %v24, %v24, %v26, %v28, 0
99; CHECK-NEXT:    ipm %r0
100; CHECK-NEXT:    srl %r0, 28
101; CHECK-NEXT:    st %r0, 0(%r2)
102; CHECK-NEXT:    br %r14
103                              ptr %ccptr) {
104  %call = call {<16 x i8>, i32} @llvm.s390.vstrsf(<4 x i32> %a, <4 x i32> %b,
105                                                  <16 x i8> %c)
106  %res = extractvalue {<16 x i8>, i32} %call, 0
107  %cc = extractvalue {<16 x i8>, i32} %call, 1
108  store i32 %cc, ptr %ccptr
109  ret <16 x i8> %res
110}
111
112; VSTRSZB.
113define <16 x i8> @test_vstrszb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c,
114; CHECK-LABEL: test_vstrszb:
115; CHECK:       # %bb.0:
116; CHECK-NEXT:    vstrszb %v24, %v24, %v26, %v28
117; CHECK-NEXT:    ipm %r0
118; CHECK-NEXT:    srl %r0, 28
119; CHECK-NEXT:    st %r0, 0(%r2)
120; CHECK-NEXT:    br %r14
121                              ptr %ccptr) {
122  %call = call {<16 x i8>, i32} @llvm.s390.vstrszb(<16 x i8> %a, <16 x i8> %b,
123                                                   <16 x i8> %c)
124  %res = extractvalue {<16 x i8>, i32} %call, 0
125  %cc = extractvalue {<16 x i8>, i32} %call, 1
126  store i32 %cc, ptr %ccptr
127  ret <16 x i8> %res
128}
129
130; VSTRSZH.
131define <16 x i8> @test_vstrszh(<8 x i16> %a, <8 x i16> %b, <16 x i8> %c,
132; CHECK-LABEL: test_vstrszh:
133; CHECK:       # %bb.0:
134; CHECK-NEXT:    vstrszh %v24, %v24, %v26, %v28
135; CHECK-NEXT:    ipm %r0
136; CHECK-NEXT:    srl %r0, 28
137; CHECK-NEXT:    st %r0, 0(%r2)
138; CHECK-NEXT:    br %r14
139                              ptr %ccptr) {
140  %call = call {<16 x i8>, i32} @llvm.s390.vstrszh(<8 x i16> %a, <8 x i16> %b,
141                                                   <16 x i8> %c)
142  %res = extractvalue {<16 x i8>, i32} %call, 0
143  %cc = extractvalue {<16 x i8>, i32} %call, 1
144  store i32 %cc, ptr %ccptr
145  ret <16 x i8> %res
146}
147
148; VSTRSZF.
149define <16 x i8> @test_vstrszf(<4 x i32> %a, <4 x i32> %b, <16 x i8> %c,
150; CHECK-LABEL: test_vstrszf:
151; CHECK:       # %bb.0:
152; CHECK-NEXT:    vstrszf %v24, %v24, %v26, %v28
153; CHECK-NEXT:    ipm %r0
154; CHECK-NEXT:    srl %r0, 28
155; CHECK-NEXT:    st %r0, 0(%r2)
156; CHECK-NEXT:    br %r14
157                              ptr %ccptr) {
158  %call = call {<16 x i8>, i32} @llvm.s390.vstrszf(<4 x i32> %a, <4 x i32> %b,
159                                                   <16 x i8> %c)
160  %res = extractvalue {<16 x i8>, i32} %call, 0
161  %cc = extractvalue {<16 x i8>, i32} %call, 1
162  store i32 %cc, ptr %ccptr
163  ret <16 x i8> %res
164}
165
166