1; Test various representations of pack-like operations. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s 4 5; One way of writing a <4 x i32> -> <8 x i16> pack. 6define <8 x i16> @f1(<4 x i32> %val0, <4 x i32> %val1) { 7; CHECK-LABEL: f1: 8; CHECK: vpkf %v24, %v24, %v26 9; CHECK: br %r14 10 %elem0 = extractelement <4 x i32> %val0, i32 0 11 %elem1 = extractelement <4 x i32> %val0, i32 1 12 %elem2 = extractelement <4 x i32> %val0, i32 2 13 %elem3 = extractelement <4 x i32> %val0, i32 3 14 %elem4 = extractelement <4 x i32> %val1, i32 0 15 %elem5 = extractelement <4 x i32> %val1, i32 1 16 %elem6 = extractelement <4 x i32> %val1, i32 2 17 %elem7 = extractelement <4 x i32> %val1, i32 3 18 %hboth0 = bitcast i32 %elem0 to <2 x i16> 19 %hboth1 = bitcast i32 %elem1 to <2 x i16> 20 %hboth2 = bitcast i32 %elem2 to <2 x i16> 21 %hboth3 = bitcast i32 %elem3 to <2 x i16> 22 %hboth4 = bitcast i32 %elem4 to <2 x i16> 23 %hboth5 = bitcast i32 %elem5 to <2 x i16> 24 %hboth6 = bitcast i32 %elem6 to <2 x i16> 25 %hboth7 = bitcast i32 %elem7 to <2 x i16> 26 %hlow0 = shufflevector <2 x i16> %hboth0, <2 x i16> %hboth1, 27 <2 x i32> <i32 1, i32 3> 28 %hlow1 = shufflevector <2 x i16> %hboth2, <2 x i16> %hboth3, 29 <2 x i32> <i32 1, i32 3> 30 %hlow2 = shufflevector <2 x i16> %hboth4, <2 x i16> %hboth5, 31 <2 x i32> <i32 1, i32 3> 32 %hlow3 = shufflevector <2 x i16> %hboth6, <2 x i16> %hboth7, 33 <2 x i32> <i32 1, i32 3> 34 %join0 = shufflevector <2 x i16> %hlow0, <2 x i16> %hlow1, 35 <4 x i32> <i32 0, i32 1, i32 2, i32 3> 36 %join1 = shufflevector <2 x i16> %hlow2, <2 x i16> %hlow3, 37 <4 x i32> <i32 0, i32 1, i32 2, i32 3> 38 %ret = shufflevector <4 x i16> %join0, <4 x i16> %join1, 39 <8 x i32> <i32 0, i32 1, i32 2, i32 3, 40 i32 4, i32 5, i32 6, i32 7> 41 ret <8 x i16> %ret 42} 43 44; A different way of writing a <4 x i32> -> <8 x i16> pack. 45define <8 x i16> @f2(<4 x i32> %val0, <4 x i32> %val1) { 46; CHECK-LABEL: f2: 47; CHECK: vpkf %v24, %v24, %v26 48; CHECK: br %r14 49 %elem0 = extractelement <4 x i32> %val0, i32 0 50 %elem1 = extractelement <4 x i32> %val0, i32 1 51 %elem2 = extractelement <4 x i32> %val0, i32 2 52 %elem3 = extractelement <4 x i32> %val0, i32 3 53 %elem4 = extractelement <4 x i32> %val1, i32 0 54 %elem5 = extractelement <4 x i32> %val1, i32 1 55 %elem6 = extractelement <4 x i32> %val1, i32 2 56 %elem7 = extractelement <4 x i32> %val1, i32 3 57 %wvec0 = insertelement <4 x i32> undef, i32 %elem0, i32 0 58 %wvec1 = insertelement <4 x i32> undef, i32 %elem1, i32 0 59 %wvec2 = insertelement <4 x i32> undef, i32 %elem2, i32 0 60 %wvec3 = insertelement <4 x i32> undef, i32 %elem3, i32 0 61 %wvec4 = insertelement <4 x i32> undef, i32 %elem4, i32 0 62 %wvec5 = insertelement <4 x i32> undef, i32 %elem5, i32 0 63 %wvec6 = insertelement <4 x i32> undef, i32 %elem6, i32 0 64 %wvec7 = insertelement <4 x i32> undef, i32 %elem7, i32 0 65 %hvec0 = bitcast <4 x i32> %wvec0 to <8 x i16> 66 %hvec1 = bitcast <4 x i32> %wvec1 to <8 x i16> 67 %hvec2 = bitcast <4 x i32> %wvec2 to <8 x i16> 68 %hvec3 = bitcast <4 x i32> %wvec3 to <8 x i16> 69 %hvec4 = bitcast <4 x i32> %wvec4 to <8 x i16> 70 %hvec5 = bitcast <4 x i32> %wvec5 to <8 x i16> 71 %hvec6 = bitcast <4 x i32> %wvec6 to <8 x i16> 72 %hvec7 = bitcast <4 x i32> %wvec7 to <8 x i16> 73 %hlow0 = shufflevector <8 x i16> %hvec0, <8 x i16> %hvec1, 74 <8 x i32> <i32 1, i32 9, i32 undef, i32 undef, 75 i32 undef, i32 undef, i32 undef, i32 undef> 76 %hlow1 = shufflevector <8 x i16> %hvec2, <8 x i16> %hvec3, 77 <8 x i32> <i32 1, i32 9, i32 undef, i32 undef, 78 i32 undef, i32 undef, i32 undef, i32 undef> 79 %hlow2 = shufflevector <8 x i16> %hvec4, <8 x i16> %hvec5, 80 <8 x i32> <i32 1, i32 9, i32 undef, i32 undef, 81 i32 undef, i32 undef, i32 undef, i32 undef> 82 %hlow3 = shufflevector <8 x i16> %hvec6, <8 x i16> %hvec7, 83 <8 x i32> <i32 1, i32 9, i32 undef, i32 undef, 84 i32 undef, i32 undef, i32 undef, i32 undef> 85 %join0 = shufflevector <8 x i16> %hlow0, <8 x i16> %hlow1, 86 <8 x i32> <i32 0, i32 1, i32 8, i32 9, 87 i32 undef, i32 undef, i32 undef, i32 undef> 88 %join1 = shufflevector <8 x i16> %hlow2, <8 x i16> %hlow3, 89 <8 x i32> <i32 0, i32 1, i32 8, i32 9, 90 i32 undef, i32 undef, i32 undef, i32 undef> 91 %ret = shufflevector <8 x i16> %join0, <8 x i16> %join1, 92 <8 x i32> <i32 0, i32 1, i32 2, i32 3, 93 i32 8, i32 9, i32 10, i32 11> 94 ret <8 x i16> %ret 95} 96 97; A direct pack operation. 98define <8 x i16> @f3(<4 x i32> %val0, <4 x i32> %val1) { 99; CHECK-LABEL: f3: 100; CHECK: vpkf %v24, %v24, %v26 101; CHECK: br %r14 102 %bitcast0 = bitcast <4 x i32> %val0 to <8 x i16> 103 %bitcast1 = bitcast <4 x i32> %val1 to <8 x i16> 104 %ret = shufflevector <8 x i16> %bitcast0, <8 x i16> %bitcast1, 105 <8 x i32> <i32 1, i32 3, i32 5, i32 7, 106 i32 9, i32 11, i32 13, i32 15> 107 ret <8 x i16> %ret 108} 109 110; One way of writing a <4 x i32> -> <16 x i8> pack. It doesn't matter 111; whether the first pack is VPKF or VPKH since the even bytes of the 112; result are discarded. 113define <16 x i8> @f4(<4 x i32> %val0, <4 x i32> %val1, 114 <4 x i32> %val2, <4 x i32> %val3) { 115; CHECK-LABEL: f4: 116; CHECK-DAG: vpk{{[hf]}} [[REG1:%v[0-9]+]], %v24, %v26 117; CHECK-DAG: vpk{{[hf]}} [[REG2:%v[0-9]+]], %v28, %v30 118; CHECK: vpkh %v24, [[REG1]], [[REG2]] 119; CHECK: br %r14 120 %bitcast0 = bitcast <4 x i32> %val0 to <8 x i16> 121 %bitcast1 = bitcast <4 x i32> %val1 to <8 x i16> 122 %bitcast2 = bitcast <4 x i32> %val2 to <8 x i16> 123 %bitcast3 = bitcast <4 x i32> %val3 to <8 x i16> 124 %join0 = shufflevector <8 x i16> %bitcast0, <8 x i16> %bitcast1, 125 <8 x i32> <i32 1, i32 3, i32 5, i32 7, 126 i32 9, i32 11, i32 13, i32 15> 127 %join1 = shufflevector <8 x i16> %bitcast2, <8 x i16> %bitcast3, 128 <8 x i32> <i32 1, i32 3, i32 5, i32 7, 129 i32 9, i32 11, i32 13, i32 15> 130 %bitcast4 = bitcast <8 x i16> %join0 to <16 x i8> 131 %bitcast5 = bitcast <8 x i16> %join1 to <16 x i8> 132 %ret = shufflevector <16 x i8> %bitcast4, <16 x i8> %bitcast5, 133 <16 x i32> <i32 1, i32 3, i32 5, i32 7, 134 i32 9, i32 11, i32 13, i32 15, 135 i32 17, i32 19, i32 21, i32 23, 136 i32 25, i32 27, i32 29, i32 31> 137 ret <16 x i8> %ret 138} 139 140; Check the same operation, but with elements being extracted from the result. 141define void @f5(<4 x i32> %val0, <4 x i32> %val1, 142 <4 x i32> %val2, <4 x i32> %val3, 143 ptr %base) { 144; CHECK-LABEL: f5: 145; CHECK-DAG: vsteb %v24, 0(%r2), 11 146; CHECK-DAG: vsteb %v26, 1(%r2), 15 147; CHECK-DAG: vsteb %v28, 2(%r2), 3 148; CHECK-DAG: vsteb %v30, 3(%r2), 7 149; CHECK: br %r14 150 %bitcast0 = bitcast <4 x i32> %val0 to <8 x i16> 151 %bitcast1 = bitcast <4 x i32> %val1 to <8 x i16> 152 %bitcast2 = bitcast <4 x i32> %val2 to <8 x i16> 153 %bitcast3 = bitcast <4 x i32> %val3 to <8 x i16> 154 %join0 = shufflevector <8 x i16> %bitcast0, <8 x i16> %bitcast1, 155 <8 x i32> <i32 1, i32 3, i32 5, i32 7, 156 i32 9, i32 11, i32 13, i32 15> 157 %join1 = shufflevector <8 x i16> %bitcast2, <8 x i16> %bitcast3, 158 <8 x i32> <i32 1, i32 3, i32 5, i32 7, 159 i32 9, i32 11, i32 13, i32 15> 160 %bitcast4 = bitcast <8 x i16> %join0 to <16 x i8> 161 %bitcast5 = bitcast <8 x i16> %join1 to <16 x i8> 162 %vec = shufflevector <16 x i8> %bitcast4, <16 x i8> %bitcast5, 163 <16 x i32> <i32 1, i32 3, i32 5, i32 7, 164 i32 9, i32 11, i32 13, i32 15, 165 i32 17, i32 19, i32 21, i32 23, 166 i32 25, i32 27, i32 29, i32 31> 167 168 %ptr1 = getelementptr i8, ptr %base, i64 1 169 %ptr2 = getelementptr i8, ptr %base, i64 2 170 %ptr3 = getelementptr i8, ptr %base, i64 3 171 172 %byte0 = extractelement <16 x i8> %vec, i32 2 173 %byte1 = extractelement <16 x i8> %vec, i32 7 174 %byte2 = extractelement <16 x i8> %vec, i32 8 175 %byte3 = extractelement <16 x i8> %vec, i32 13 176 177 store i8 %byte0, ptr %base 178 store i8 %byte1, ptr %ptr1 179 store i8 %byte2, ptr %ptr2 180 store i8 %byte3, ptr %ptr3 181 182 ret void 183} 184 185; A different way of writing a <4 x i32> -> <16 x i8> pack. 186define <16 x i8> @f6(<4 x i32> %val0, <4 x i32> %val1, 187 <4 x i32> %val2, <4 x i32> %val3) { 188; CHECK-LABEL: f6: 189; CHECK-DAG: vpk{{[hf]}} [[REG1:%v[0-9]+]], %v24, %v26 190; CHECK-DAG: vpk{{[hf]}} [[REG2:%v[0-9]+]], %v28, %v30 191; CHECK: vpkh %v24, [[REG1]], [[REG2]] 192; CHECK: br %r14 193 %elem0 = extractelement <4 x i32> %val0, i32 0 194 %elem1 = extractelement <4 x i32> %val0, i32 1 195 %elem2 = extractelement <4 x i32> %val0, i32 2 196 %elem3 = extractelement <4 x i32> %val0, i32 3 197 %elem4 = extractelement <4 x i32> %val1, i32 0 198 %elem5 = extractelement <4 x i32> %val1, i32 1 199 %elem6 = extractelement <4 x i32> %val1, i32 2 200 %elem7 = extractelement <4 x i32> %val1, i32 3 201 %elem8 = extractelement <4 x i32> %val2, i32 0 202 %elem9 = extractelement <4 x i32> %val2, i32 1 203 %elem10 = extractelement <4 x i32> %val2, i32 2 204 %elem11 = extractelement <4 x i32> %val2, i32 3 205 %elem12 = extractelement <4 x i32> %val3, i32 0 206 %elem13 = extractelement <4 x i32> %val3, i32 1 207 %elem14 = extractelement <4 x i32> %val3, i32 2 208 %elem15 = extractelement <4 x i32> %val3, i32 3 209 %bitcast0 = bitcast i32 %elem0 to <2 x i16> 210 %bitcast1 = bitcast i32 %elem1 to <2 x i16> 211 %bitcast2 = bitcast i32 %elem2 to <2 x i16> 212 %bitcast3 = bitcast i32 %elem3 to <2 x i16> 213 %bitcast4 = bitcast i32 %elem4 to <2 x i16> 214 %bitcast5 = bitcast i32 %elem5 to <2 x i16> 215 %bitcast6 = bitcast i32 %elem6 to <2 x i16> 216 %bitcast7 = bitcast i32 %elem7 to <2 x i16> 217 %bitcast8 = bitcast i32 %elem8 to <2 x i16> 218 %bitcast9 = bitcast i32 %elem9 to <2 x i16> 219 %bitcast10 = bitcast i32 %elem10 to <2 x i16> 220 %bitcast11 = bitcast i32 %elem11 to <2 x i16> 221 %bitcast12 = bitcast i32 %elem12 to <2 x i16> 222 %bitcast13 = bitcast i32 %elem13 to <2 x i16> 223 %bitcast14 = bitcast i32 %elem14 to <2 x i16> 224 %bitcast15 = bitcast i32 %elem15 to <2 x i16> 225 %low0 = shufflevector <2 x i16> %bitcast0, <2 x i16> %bitcast1, 226 <2 x i32> <i32 1, i32 3> 227 %low1 = shufflevector <2 x i16> %bitcast2, <2 x i16> %bitcast3, 228 <2 x i32> <i32 1, i32 3> 229 %low2 = shufflevector <2 x i16> %bitcast4, <2 x i16> %bitcast5, 230 <2 x i32> <i32 1, i32 3> 231 %low3 = shufflevector <2 x i16> %bitcast6, <2 x i16> %bitcast7, 232 <2 x i32> <i32 1, i32 3> 233 %low4 = shufflevector <2 x i16> %bitcast8, <2 x i16> %bitcast9, 234 <2 x i32> <i32 1, i32 3> 235 %low5 = shufflevector <2 x i16> %bitcast10, <2 x i16> %bitcast11, 236 <2 x i32> <i32 1, i32 3> 237 %low6 = shufflevector <2 x i16> %bitcast12, <2 x i16> %bitcast13, 238 <2 x i32> <i32 1, i32 3> 239 %low7 = shufflevector <2 x i16> %bitcast14, <2 x i16> %bitcast15, 240 <2 x i32> <i32 1, i32 3> 241 %bytes0 = bitcast <2 x i16> %low0 to <4 x i8> 242 %bytes1 = bitcast <2 x i16> %low1 to <4 x i8> 243 %bytes2 = bitcast <2 x i16> %low2 to <4 x i8> 244 %bytes3 = bitcast <2 x i16> %low3 to <4 x i8> 245 %bytes4 = bitcast <2 x i16> %low4 to <4 x i8> 246 %bytes5 = bitcast <2 x i16> %low5 to <4 x i8> 247 %bytes6 = bitcast <2 x i16> %low6 to <4 x i8> 248 %bytes7 = bitcast <2 x i16> %low7 to <4 x i8> 249 %blow0 = shufflevector <4 x i8> %bytes0, <4 x i8> %bytes1, 250 <4 x i32> <i32 1, i32 3, i32 5, i32 7> 251 %blow1 = shufflevector <4 x i8> %bytes2, <4 x i8> %bytes3, 252 <4 x i32> <i32 1, i32 3, i32 5, i32 7> 253 %blow2 = shufflevector <4 x i8> %bytes4, <4 x i8> %bytes5, 254 <4 x i32> <i32 1, i32 3, i32 5, i32 7> 255 %blow3 = shufflevector <4 x i8> %bytes6, <4 x i8> %bytes7, 256 <4 x i32> <i32 1, i32 3, i32 5, i32 7> 257 %join0 = shufflevector <4 x i8> %blow0, <4 x i8> %blow1, 258 <8 x i32> <i32 0, i32 1, i32 2, i32 3, 259 i32 4, i32 5, i32 6, i32 7> 260 %join1 = shufflevector <4 x i8> %blow2, <4 x i8> %blow3, 261 <8 x i32> <i32 0, i32 1, i32 2, i32 3, 262 i32 4, i32 5, i32 6, i32 7> 263 %ret = shufflevector <8 x i8> %join0, <8 x i8> %join1, 264 <16 x i32> <i32 0, i32 1, i32 2, i32 3, 265 i32 4, i32 5, i32 6, i32 7, 266 i32 8, i32 9, i32 10, i32 11, 267 i32 12, i32 13, i32 14, i32 15> 268 ret <16 x i8> %ret 269} 270 271; One way of writing a <2 x i64> -> <16 x i8> pack. 272define <16 x i8> @f7(<2 x i64> %val0, <2 x i64> %val1, 273 <2 x i64> %val2, <2 x i64> %val3, 274 <2 x i64> %val4, <2 x i64> %val5, 275 <2 x i64> %val6, <2 x i64> %val7) { 276; CHECK-LABEL: f7: 277; CHECK-DAG: vpk{{[hfg]}} [[REG1:%v[0-9]+]], %v24, %v26 278; CHECK-DAG: vpk{{[hfg]}} [[REG2:%v[0-9]+]], %v28, %v30 279; CHECK-DAG: vpk{{[hfg]}} [[REG3:%v[0-9]+]], %v25, %v27 280; CHECK-DAG: vpk{{[hfg]}} [[REG4:%v[0-9]+]], %v29, %v31 281; CHECK-DAG: vpk{{[hf]}} [[REG5:%v[0-9]+]], [[REG1]], [[REG2]] 282; CHECK-DAG: vpk{{[hf]}} [[REG6:%v[0-9]+]], [[REG3]], [[REG4]] 283; CHECK: vpkh %v24, [[REG5]], [[REG6]] 284; CHECK: br %r14 285 %elem0 = extractelement <2 x i64> %val0, i32 0 286 %elem1 = extractelement <2 x i64> %val0, i32 1 287 %elem2 = extractelement <2 x i64> %val1, i32 0 288 %elem3 = extractelement <2 x i64> %val1, i32 1 289 %elem4 = extractelement <2 x i64> %val2, i32 0 290 %elem5 = extractelement <2 x i64> %val2, i32 1 291 %elem6 = extractelement <2 x i64> %val3, i32 0 292 %elem7 = extractelement <2 x i64> %val3, i32 1 293 %elem8 = extractelement <2 x i64> %val4, i32 0 294 %elem9 = extractelement <2 x i64> %val4, i32 1 295 %elem10 = extractelement <2 x i64> %val5, i32 0 296 %elem11 = extractelement <2 x i64> %val5, i32 1 297 %elem12 = extractelement <2 x i64> %val6, i32 0 298 %elem13 = extractelement <2 x i64> %val6, i32 1 299 %elem14 = extractelement <2 x i64> %val7, i32 0 300 %elem15 = extractelement <2 x i64> %val7, i32 1 301 %bitcast0 = bitcast i64 %elem0 to <2 x i32> 302 %bitcast1 = bitcast i64 %elem1 to <2 x i32> 303 %bitcast2 = bitcast i64 %elem2 to <2 x i32> 304 %bitcast3 = bitcast i64 %elem3 to <2 x i32> 305 %bitcast4 = bitcast i64 %elem4 to <2 x i32> 306 %bitcast5 = bitcast i64 %elem5 to <2 x i32> 307 %bitcast6 = bitcast i64 %elem6 to <2 x i32> 308 %bitcast7 = bitcast i64 %elem7 to <2 x i32> 309 %bitcast8 = bitcast i64 %elem8 to <2 x i32> 310 %bitcast9 = bitcast i64 %elem9 to <2 x i32> 311 %bitcast10 = bitcast i64 %elem10 to <2 x i32> 312 %bitcast11 = bitcast i64 %elem11 to <2 x i32> 313 %bitcast12 = bitcast i64 %elem12 to <2 x i32> 314 %bitcast13 = bitcast i64 %elem13 to <2 x i32> 315 %bitcast14 = bitcast i64 %elem14 to <2 x i32> 316 %bitcast15 = bitcast i64 %elem15 to <2 x i32> 317 %low0 = shufflevector <2 x i32> %bitcast0, <2 x i32> %bitcast1, 318 <2 x i32> <i32 1, i32 3> 319 %low1 = shufflevector <2 x i32> %bitcast2, <2 x i32> %bitcast3, 320 <2 x i32> <i32 1, i32 3> 321 %low2 = shufflevector <2 x i32> %bitcast4, <2 x i32> %bitcast5, 322 <2 x i32> <i32 1, i32 3> 323 %low3 = shufflevector <2 x i32> %bitcast6, <2 x i32> %bitcast7, 324 <2 x i32> <i32 1, i32 3> 325 %low4 = shufflevector <2 x i32> %bitcast8, <2 x i32> %bitcast9, 326 <2 x i32> <i32 1, i32 3> 327 %low5 = shufflevector <2 x i32> %bitcast10, <2 x i32> %bitcast11, 328 <2 x i32> <i32 1, i32 3> 329 %low6 = shufflevector <2 x i32> %bitcast12, <2 x i32> %bitcast13, 330 <2 x i32> <i32 1, i32 3> 331 %low7 = shufflevector <2 x i32> %bitcast14, <2 x i32> %bitcast15, 332 <2 x i32> <i32 1, i32 3> 333 %half0 = bitcast <2 x i32> %low0 to <4 x i16> 334 %half1 = bitcast <2 x i32> %low1 to <4 x i16> 335 %half2 = bitcast <2 x i32> %low2 to <4 x i16> 336 %half3 = bitcast <2 x i32> %low3 to <4 x i16> 337 %half4 = bitcast <2 x i32> %low4 to <4 x i16> 338 %half5 = bitcast <2 x i32> %low5 to <4 x i16> 339 %half6 = bitcast <2 x i32> %low6 to <4 x i16> 340 %half7 = bitcast <2 x i32> %low7 to <4 x i16> 341 %hlow0 = shufflevector <4 x i16> %half0, <4 x i16> %half1, 342 <4 x i32> <i32 1, i32 3, i32 5, i32 7> 343 %hlow1 = shufflevector <4 x i16> %half2, <4 x i16> %half3, 344 <4 x i32> <i32 1, i32 3, i32 5, i32 7> 345 %hlow2 = shufflevector <4 x i16> %half4, <4 x i16> %half5, 346 <4 x i32> <i32 1, i32 3, i32 5, i32 7> 347 %hlow3 = shufflevector <4 x i16> %half6, <4 x i16> %half7, 348 <4 x i32> <i32 1, i32 3, i32 5, i32 7> 349 %bytes0 = bitcast <4 x i16> %hlow0 to <8 x i8> 350 %bytes1 = bitcast <4 x i16> %hlow1 to <8 x i8> 351 %bytes2 = bitcast <4 x i16> %hlow2 to <8 x i8> 352 %bytes3 = bitcast <4 x i16> %hlow3 to <8 x i8> 353 %join0 = shufflevector <8 x i8> %bytes0, <8 x i8> %bytes1, 354 <8 x i32> <i32 1, i32 3, i32 5, i32 7, 355 i32 9, i32 11, i32 13, i32 15> 356 %join1 = shufflevector <8 x i8> %bytes2, <8 x i8> %bytes3, 357 <8 x i32> <i32 1, i32 3, i32 5, i32 7, 358 i32 9, i32 11, i32 13, i32 15> 359 %ret = shufflevector <8 x i8> %join0, <8 x i8> %join1, 360 <16 x i32> <i32 0, i32 1, i32 2, i32 3, 361 i32 4, i32 5, i32 6, i32 7, 362 i32 8, i32 9, i32 10, i32 11, 363 i32 12, i32 13, i32 14, i32 15> 364 ret <16 x i8> %ret 365} 366 367; Test a <2 x i64> -> <4 x f32> pack in which only individual elements are 368; needed. 369define float @f8(i64 %scalar0, i64 %scalar1, i64 %scalar2, i64 %scalar3) { 370; CHECK-LABEL: f8: 371; CHECK-NOT: vperm 372; CHECK-NOT: vpk 373; CHECK-NOT: vmrh 374; CHECK: aebr {{%f[0-7]}}, 375; CHECK: aebr {{%f[0-7]}}, 376; CHECK: meebr %f0, 377; CHECK: br %r14 378 %vec0 = insertelement <2 x i64> undef, i64 %scalar0, i32 0 379 %vec1 = insertelement <2 x i64> undef, i64 %scalar1, i32 0 380 %vec2 = insertelement <2 x i64> undef, i64 %scalar2, i32 0 381 %vec3 = insertelement <2 x i64> undef, i64 %scalar3, i32 0 382 %join0 = shufflevector <2 x i64> %vec0, <2 x i64> %vec1, 383 <2 x i32> <i32 0, i32 2> 384 %join1 = shufflevector <2 x i64> %vec2, <2 x i64> %vec3, 385 <2 x i32> <i32 0, i32 2> 386 %bitcast0 = bitcast <2 x i64> %join0 to <4 x float> 387 %bitcast1 = bitcast <2 x i64> %join1 to <4 x float> 388 %pack = shufflevector <4 x float> %bitcast0, <4 x float> %bitcast1, 389 <4 x i32> <i32 1, i32 3, i32 5, i32 7> 390 %elt0 = extractelement <4 x float> %pack, i32 0 391 %elt1 = extractelement <4 x float> %pack, i32 1 392 %elt2 = extractelement <4 x float> %pack, i32 2 393 %elt3 = extractelement <4 x float> %pack, i32 3 394 %add0 = fadd float %elt0, %elt2 395 %add1 = fadd float %elt1, %elt3 396 %ret = fmul float %add0, %add1 397 ret float %ret 398} 399 400; Test a <2 x f64> -> <4 x i32> pack in which only individual elements are 401; needed. 402define i32 @f9(double %scalar0, double %scalar1, double %scalar2, 403 double %scalar3) { 404; CHECK-LABEL: f9: 405; CHECK-NOT: vperm 406; CHECK-NOT: vpk 407; CHECK-NOT: vmrh 408; CHECK: ar {{%r[0-5]}}, 409; CHECK: ar {{%r[0-5]}}, 410; CHECK: ork %r2, 411; CHECK: br %r14 412 %vec0 = insertelement <2 x double> undef, double %scalar0, i32 0 413 %vec1 = insertelement <2 x double> undef, double %scalar1, i32 0 414 %vec2 = insertelement <2 x double> undef, double %scalar2, i32 0 415 %vec3 = insertelement <2 x double> undef, double %scalar3, i32 0 416 %join0 = shufflevector <2 x double> %vec0, <2 x double> %vec1, 417 <2 x i32> <i32 0, i32 2> 418 %join1 = shufflevector <2 x double> %vec2, <2 x double> %vec3, 419 <2 x i32> <i32 0, i32 2> 420 %bitcast0 = bitcast <2 x double> %join0 to <4 x i32> 421 %bitcast1 = bitcast <2 x double> %join1 to <4 x i32> 422 %pack = shufflevector <4 x i32> %bitcast0, <4 x i32> %bitcast1, 423 <4 x i32> <i32 1, i32 3, i32 5, i32 7> 424 %elt0 = extractelement <4 x i32> %pack, i32 0 425 %elt1 = extractelement <4 x i32> %pack, i32 1 426 %elt2 = extractelement <4 x i32> %pack, i32 2 427 %elt3 = extractelement <4 x i32> %pack, i32 3 428 %add0 = add i32 %elt0, %elt2 429 %add1 = add i32 %elt1, %elt3 430 %ret = or i32 %add0, %add1 431 ret i32 %ret 432} 433