1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; Test three-operand shifts. 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s 5 6; Check that we use SLLK over SLL where useful. 7define i32 @f1(i32 %a, i32 %b, i32 %amt) { 8; CHECK-LABEL: f1: 9; CHECK: # %bb.0: 10; CHECK-NEXT: sllk %r2, %r3, 15(%r4) 11; CHECK-NEXT: br %r14 12 %add = add i32 %amt, 15 13 %shift = shl i32 %b, %add 14 ret i32 %shift 15} 16 17; Check that we use SLL over SLLK where possible. 18define i32 @f2(i32 %a, i32 %amt) { 19; CHECK-LABEL: f2: 20; CHECK: # %bb.0: 21; CHECK-NEXT: sll %r2, 15(%r3) 22; CHECK-NEXT: br %r14 23 %add = add i32 %amt, 15 24 %shift = shl i32 %a, %add 25 ret i32 %shift 26} 27 28; Check that we use SRLK over SRL where useful. 29define i32 @f3(i32 %a, i32 %b, i32 %amt) { 30; CHECK-LABEL: f3: 31; CHECK: # %bb.0: 32; CHECK-NEXT: srlk %r2, %r3, 15(%r4) 33; CHECK-NEXT: br %r14 34 %add = add i32 %amt, 15 35 %shift = lshr i32 %b, %add 36 ret i32 %shift 37} 38 39; Check that we use SRL over SRLK where possible. 40define i32 @f4(i32 %a, i32 %amt) { 41; CHECK-LABEL: f4: 42; CHECK: # %bb.0: 43; CHECK-NEXT: srl %r2, 15(%r3) 44; CHECK-NEXT: br %r14 45 %add = add i32 %amt, 15 46 %shift = lshr i32 %a, %add 47 ret i32 %shift 48} 49 50; Check that we use SRAK over SRA where useful. 51define i32 @f5(i32 %a, i32 %b, i32 %amt) { 52; CHECK-LABEL: f5: 53; CHECK: # %bb.0: 54; CHECK-NEXT: srak %r2, %r3, 15(%r4) 55; CHECK-NEXT: br %r14 56 %add = add i32 %amt, 15 57 %shift = ashr i32 %b, %add 58 ret i32 %shift 59} 60 61; Check that we use SRA over SRAK where possible. 62define i32 @f6(i32 %a, i32 %amt) { 63; CHECK-LABEL: f6: 64; CHECK: # %bb.0: 65; CHECK-NEXT: sra %r2, 15(%r3) 66; CHECK-NEXT: br %r14 67 %add = add i32 %amt, 15 68 %shift = ashr i32 %a, %add 69 ret i32 %shift 70} 71