xref: /llvm-project/llvm/test/CodeGen/SystemZ/regalloc-GR128.ll (revision a65ccc1b9fe740c9f65d9cf2b627de50278aad56) 
1; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 -O3 -o /dev/null
2; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -O3 -o /dev/null
3;
4; Test that regalloc does not run out of registers
5
6; This test will include a GR128 virtual reg.
7define void @test0(i64 %dividend, i64 %divisor) {
8  %rem = urem i64 %dividend, %divisor
9  call void asm sideeffect "", "{r0},{r1},{r2},{r3},{r4},{r5},{r6},{r7},{r8},{r9},{r10},{r11},{r12},{r13},{r14}"(i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 %rem)
10  ret void
11}
12
13; This test will include an ADDR128 virtual reg.
14define i64 @test1(i64 %dividend, i64 %divisor) {
15%rem = urem i64 %dividend, %divisor
16call void asm sideeffect "", "{r2},{r3},{r4},{r5},{r6},{r7},{r8},{r9},{r10},{r11},{r12},{r13},{r14}"(i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 %rem)
17%ret = add i64 %rem, 1
18ret i64 %ret
19}
20