xref: /llvm-project/llvm/test/CodeGen/SystemZ/is_fpclass.ll (revision c96cc500f0b31bd881d38b2b16ee9c1fef0307e4)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; Test intrinsic 'is_fpclass'.
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5
6declare i1 @llvm.is.fpclass.f32(float, i32)
7declare i1 @llvm.is.fpclass.f64(double, i32)
8declare i1 @llvm.is.fpclass.f128(fp128, i32)
9
10
11define i1 @isnan_f(float %x) {
12; CHECK-LABEL: isnan_f:
13; CHECK:       # %bb.0:
14; CHECK-NEXT:    tceb %f0, 15
15; CHECK-NEXT:    ipm %r2
16; CHECK-NEXT:    srl %r2, 28
17; CHECK-NEXT:    br %r14
18  %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 3)  ; nan
19  ret i1 %1
20}
21
22define i1 @isnan_d(double %x) {
23; CHECK-LABEL: isnan_d:
24; CHECK:       # %bb.0:
25; CHECK-NEXT:    tcdb %f0, 15
26; CHECK-NEXT:    ipm %r2
27; CHECK-NEXT:    srl %r2, 28
28; CHECK-NEXT:    br %r14
29  %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 3)  ; nan
30  ret i1 %1
31}
32
33define i1 @isnan_x(fp128 %x) {
34; CHECK-LABEL: isnan_x:
35; CHECK:       # %bb.0:
36; CHECK-NEXT:    ld %f0, 0(%r2)
37; CHECK-NEXT:    ld %f2, 8(%r2)
38; CHECK-NEXT:    tcxb %f0, 15
39; CHECK-NEXT:    ipm %r2
40; CHECK-NEXT:    srl %r2, 28
41; CHECK-NEXT:    br %r14
42  %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 3)  ; nan
43  ret i1 %1
44}
45
46define i1 @isqnan_f(float %x) {
47; CHECK-LABEL: isqnan_f:
48; CHECK:       # %bb.0:
49; CHECK-NEXT:    tceb %f0, 12
50; CHECK-NEXT:    ipm %r2
51; CHECK-NEXT:    srl %r2, 28
52; CHECK-NEXT:    br %r14
53  %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 2)  ; qnan
54  ret i1 %1
55}
56
57define i1 @issnan_f(float %x) {
58; CHECK-LABEL: issnan_f:
59; CHECK:       # %bb.0:
60; CHECK-NEXT:    tceb %f0, 3
61; CHECK-NEXT:    ipm %r2
62; CHECK-NEXT:    srl %r2, 28
63; CHECK-NEXT:    br %r14
64  %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 1)  ; snan
65  ret i1 %1
66}
67
68define i1 @isinf_f(float %x) {
69; CHECK-LABEL: isinf_f:
70; CHECK:       # %bb.0:
71; CHECK-NEXT:    tceb %f0, 48
72; CHECK-NEXT:    ipm %r2
73; CHECK-NEXT:    srl %r2, 28
74; CHECK-NEXT:    br %r14
75  %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 516)  ; 0x204 = "inf"
76  ret i1 %1
77}
78
79define i1 @isposinf_f(float %x) {
80; CHECK-LABEL: isposinf_f:
81; CHECK:       # %bb.0:
82; CHECK-NEXT:    tceb %f0, 32
83; CHECK-NEXT:    ipm %r2
84; CHECK-NEXT:    srl %r2, 28
85; CHECK-NEXT:    br %r14
86  %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 512)  ; 0x200 = "+inf"
87  ret i1 %1
88}
89
90define i1 @isneginf_f(float %x) {
91; CHECK-LABEL: isneginf_f:
92; CHECK:       # %bb.0:
93; CHECK-NEXT:    tceb %f0, 16
94; CHECK-NEXT:    ipm %r2
95; CHECK-NEXT:    srl %r2, 28
96; CHECK-NEXT:    br %r14
97  %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 4)  ; "-inf"
98  ret i1 %1
99}
100
101define i1 @isfinite_f(float %x) {
102; CHECK-LABEL: isfinite_f:
103; CHECK:       # %bb.0:
104; CHECK-NEXT:    tceb %f0, 4032
105; CHECK-NEXT:    ipm %r2
106; CHECK-NEXT:    srl %r2, 28
107; CHECK-NEXT:    br %r14
108  %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 504)  ; 0x1f8 = "finite"
109  ret i1 %1
110}
111
112define i1 @isposfinite_f(float %x) {
113; CHECK-LABEL: isposfinite_f:
114; CHECK:       # %bb.0:
115; CHECK-NEXT:    tceb %f0, 2688
116; CHECK-NEXT:    ipm %r2
117; CHECK-NEXT:    srl %r2, 28
118; CHECK-NEXT:    br %r14
119  %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 448)  ; 0x1c0 = "+finite"
120  ret i1 %1
121}
122
123define i1 @isnegfinite_f(float %x) {
124; CHECK-LABEL: isnegfinite_f:
125; CHECK:       # %bb.0:
126; CHECK-NEXT:    tceb %f0, 1344
127; CHECK-NEXT:    ipm %r2
128; CHECK-NEXT:    srl %r2, 28
129; CHECK-NEXT:    br %r14
130  %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 56)  ; 0x38 = "-finite"
131  ret i1 %1
132}
133
134define i1 @isnotfinite_f(float %x) {
135; CHECK-LABEL: isnotfinite_f:
136; CHECK:       # %bb.0:
137; CHECK-NEXT:    tceb %f0, 63
138; CHECK-NEXT:    ipm %r2
139; CHECK-NEXT:    srl %r2, 28
140; CHECK-NEXT:    br %r14
141  %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 519)  ; ox207 = "inf|nan"
142  ret i1 %1
143}
144
145