1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2; Test 32-bit subtraction in which the second operand is variable. 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 5 6declare i32 @foo() 7 8; Check SLR. 9define zeroext i1 @f1(i32 %dummy, i32 %a, i32 %b, ptr %res) { 10; CHECK-LABEL: f1: 11; CHECK: # %bb.0: 12; CHECK-NEXT: slr %r3, %r4 13; CHECK-NEXT: ipm %r0 14; CHECK-NEXT: afi %r0, -536870912 15; CHECK-NEXT: risbg %r2, %r0, 63, 191, 33 16; CHECK-NEXT: st %r3, 0(%r5) 17; CHECK-NEXT: br %r14 18 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 19 %val = extractvalue {i32, i1} %t, 0 20 %obit = extractvalue {i32, i1} %t, 1 21 store i32 %val, ptr %res 22 ret i1 %obit 23} 24 25; Check using the overflow result for a branch. 26define void @f2(i32 %dummy, i32 %a, i32 %b, ptr %res) { 27; CHECK-LABEL: f2: 28; CHECK: # %bb.0: 29; CHECK-NEXT: slr %r3, %r4 30; CHECK-NEXT: st %r3, 0(%r5) 31; CHECK-NEXT: jgle foo@PLT 32; CHECK-NEXT: .LBB1_1: # %exit 33; CHECK-NEXT: br %r14 34 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 35 %val = extractvalue {i32, i1} %t, 0 36 %obit = extractvalue {i32, i1} %t, 1 37 store i32 %val, ptr %res 38 br i1 %obit, label %call, label %exit 39 40call: 41 tail call i32 @foo() 42 br label %exit 43 44exit: 45 ret void 46} 47 48; ... and the same with the inverted direction. 49define void @f3(i32 %dummy, i32 %a, i32 %b, ptr %res) { 50; CHECK-LABEL: f3: 51; CHECK: # %bb.0: 52; CHECK-NEXT: slr %r3, %r4 53; CHECK-NEXT: st %r3, 0(%r5) 54; CHECK-NEXT: jgnle foo@PLT 55; CHECK-NEXT: .LBB2_1: # %exit 56; CHECK-NEXT: br %r14 57 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 58 %val = extractvalue {i32, i1} %t, 0 59 %obit = extractvalue {i32, i1} %t, 1 60 store i32 %val, ptr %res 61 br i1 %obit, label %exit, label %call 62 63call: 64 tail call i32 @foo() 65 br label %exit 66 67exit: 68 ret void 69} 70 71; Check the low end of the SL range. 72define zeroext i1 @f4(i32 %dummy, i32 %a, ptr %src, ptr %res) { 73; CHECK-LABEL: f4: 74; CHECK: # %bb.0: 75; CHECK-NEXT: sl %r3, 0(%r4) 76; CHECK-NEXT: ipm %r0 77; CHECK-NEXT: afi %r0, -536870912 78; CHECK-NEXT: risbg %r2, %r0, 63, 191, 33 79; CHECK-NEXT: st %r3, 0(%r5) 80; CHECK-NEXT: br %r14 81 %b = load i32, ptr %src 82 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 83 %val = extractvalue {i32, i1} %t, 0 84 %obit = extractvalue {i32, i1} %t, 1 85 store i32 %val, ptr %res 86 ret i1 %obit 87} 88 89; Check the high end of the aligned SL range. 90define zeroext i1 @f5(i32 %dummy, i32 %a, ptr %src, ptr %res) { 91; CHECK-LABEL: f5: 92; CHECK: # %bb.0: 93; CHECK-NEXT: sl %r3, 4092(%r4) 94; CHECK-NEXT: ipm %r0 95; CHECK-NEXT: afi %r0, -536870912 96; CHECK-NEXT: risbg %r2, %r0, 63, 191, 33 97; CHECK-NEXT: st %r3, 0(%r5) 98; CHECK-NEXT: br %r14 99 %ptr = getelementptr i32, ptr %src, i64 1023 100 %b = load i32, ptr %ptr 101 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 102 %val = extractvalue {i32, i1} %t, 0 103 %obit = extractvalue {i32, i1} %t, 1 104 store i32 %val, ptr %res 105 ret i1 %obit 106} 107 108; Check the next word up, which should use SLY instead of SL. 109define zeroext i1 @f6(i32 %dummy, i32 %a, ptr %src, ptr %res) { 110; CHECK-LABEL: f6: 111; CHECK: # %bb.0: 112; CHECK-NEXT: sly %r3, 4096(%r4) 113; CHECK-NEXT: ipm %r0 114; CHECK-NEXT: afi %r0, -536870912 115; CHECK-NEXT: risbg %r2, %r0, 63, 191, 33 116; CHECK-NEXT: st %r3, 0(%r5) 117; CHECK-NEXT: br %r14 118 %ptr = getelementptr i32, ptr %src, i64 1024 119 %b = load i32, ptr %ptr 120 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 121 %val = extractvalue {i32, i1} %t, 0 122 %obit = extractvalue {i32, i1} %t, 1 123 store i32 %val, ptr %res 124 ret i1 %obit 125} 126 127; Check the high end of the aligned SLY range. 128define zeroext i1 @f7(i32 %dummy, i32 %a, ptr %src, ptr %res) { 129; CHECK-LABEL: f7: 130; CHECK: # %bb.0: 131; CHECK-NEXT: sly %r3, 524284(%r4) 132; CHECK-NEXT: ipm %r0 133; CHECK-NEXT: afi %r0, -536870912 134; CHECK-NEXT: risbg %r2, %r0, 63, 191, 33 135; CHECK-NEXT: st %r3, 0(%r5) 136; CHECK-NEXT: br %r14 137 %ptr = getelementptr i32, ptr %src, i64 131071 138 %b = load i32, ptr %ptr 139 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 140 %val = extractvalue {i32, i1} %t, 0 141 %obit = extractvalue {i32, i1} %t, 1 142 store i32 %val, ptr %res 143 ret i1 %obit 144} 145 146; Check the next word up, which needs separate address logic. 147; Other sequences besides this one would be OK. 148define zeroext i1 @f8(i32 %dummy, i32 %a, ptr %src, ptr %res) { 149; CHECK-LABEL: f8: 150; CHECK: # %bb.0: 151; CHECK-NEXT: agfi %r4, 524288 152; CHECK-NEXT: sl %r3, 0(%r4) 153; CHECK-NEXT: ipm %r0 154; CHECK-NEXT: afi %r0, -536870912 155; CHECK-NEXT: risbg %r2, %r0, 63, 191, 33 156; CHECK-NEXT: st %r3, 0(%r5) 157; CHECK-NEXT: br %r14 158 %ptr = getelementptr i32, ptr %src, i64 131072 159 %b = load i32, ptr %ptr 160 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 161 %val = extractvalue {i32, i1} %t, 0 162 %obit = extractvalue {i32, i1} %t, 1 163 store i32 %val, ptr %res 164 ret i1 %obit 165} 166 167; Check the high end of the negative aligned SLY range. 168define zeroext i1 @f9(i32 %dummy, i32 %a, ptr %src, ptr %res) { 169; CHECK-LABEL: f9: 170; CHECK: # %bb.0: 171; CHECK-NEXT: sly %r3, -4(%r4) 172; CHECK-NEXT: ipm %r0 173; CHECK-NEXT: afi %r0, -536870912 174; CHECK-NEXT: risbg %r2, %r0, 63, 191, 33 175; CHECK-NEXT: st %r3, 0(%r5) 176; CHECK-NEXT: br %r14 177 %ptr = getelementptr i32, ptr %src, i64 -1 178 %b = load i32, ptr %ptr 179 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 180 %val = extractvalue {i32, i1} %t, 0 181 %obit = extractvalue {i32, i1} %t, 1 182 store i32 %val, ptr %res 183 ret i1 %obit 184} 185 186; Check the low end of the SLY range. 187define zeroext i1 @f10(i32 %dummy, i32 %a, ptr %src, ptr %res) { 188; CHECK-LABEL: f10: 189; CHECK: # %bb.0: 190; CHECK-NEXT: sly %r3, -524288(%r4) 191; CHECK-NEXT: ipm %r0 192; CHECK-NEXT: afi %r0, -536870912 193; CHECK-NEXT: risbg %r2, %r0, 63, 191, 33 194; CHECK-NEXT: st %r3, 0(%r5) 195; CHECK-NEXT: br %r14 196 %ptr = getelementptr i32, ptr %src, i64 -131072 197 %b = load i32, ptr %ptr 198 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 199 %val = extractvalue {i32, i1} %t, 0 200 %obit = extractvalue {i32, i1} %t, 1 201 store i32 %val, ptr %res 202 ret i1 %obit 203} 204 205; Check the next word down, which needs separate address logic. 206; Other sequences besides this one would be OK. 207define zeroext i1 @f11(i32 %dummy, i32 %a, ptr %src, ptr %res) { 208; CHECK-LABEL: f11: 209; CHECK: # %bb.0: 210; CHECK-NEXT: agfi %r4, -524292 211; CHECK-NEXT: sl %r3, 0(%r4) 212; CHECK-NEXT: ipm %r0 213; CHECK-NEXT: afi %r0, -536870912 214; CHECK-NEXT: risbg %r2, %r0, 63, 191, 33 215; CHECK-NEXT: st %r3, 0(%r5) 216; CHECK-NEXT: br %r14 217 %ptr = getelementptr i32, ptr %src, i64 -131073 218 %b = load i32, ptr %ptr 219 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 220 %val = extractvalue {i32, i1} %t, 0 221 %obit = extractvalue {i32, i1} %t, 1 222 store i32 %val, ptr %res 223 ret i1 %obit 224} 225 226; Check that SL allows an index. 227define zeroext i1 @f12(i64 %src, i64 %index, i32 %a, ptr %res) { 228; CHECK-LABEL: f12: 229; CHECK: # %bb.0: 230; CHECK-NEXT: sl %r4, 4092(%r3,%r2) 231; CHECK-NEXT: ipm %r0 232; CHECK-NEXT: afi %r0, -536870912 233; CHECK-NEXT: risbg %r2, %r0, 63, 191, 33 234; CHECK-NEXT: st %r4, 0(%r5) 235; CHECK-NEXT: br %r14 236 %add1 = add i64 %src, %index 237 %add2 = add i64 %add1, 4092 238 %ptr = inttoptr i64 %add2 to ptr 239 %b = load i32, ptr %ptr 240 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 241 %val = extractvalue {i32, i1} %t, 0 242 %obit = extractvalue {i32, i1} %t, 1 243 store i32 %val, ptr %res 244 ret i1 %obit 245} 246 247; Check that SLY allows an index. 248define zeroext i1 @f13(i64 %src, i64 %index, i32 %a, ptr %res) { 249; CHECK-LABEL: f13: 250; CHECK: # %bb.0: 251; CHECK-NEXT: sly %r4, 4096(%r3,%r2) 252; CHECK-NEXT: ipm %r0 253; CHECK-NEXT: afi %r0, -536870912 254; CHECK-NEXT: risbg %r2, %r0, 63, 191, 33 255; CHECK-NEXT: st %r4, 0(%r5) 256; CHECK-NEXT: br %r14 257 %add1 = add i64 %src, %index 258 %add2 = add i64 %add1, 4096 259 %ptr = inttoptr i64 %add2 to ptr 260 %b = load i32, ptr %ptr 261 %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b) 262 %val = extractvalue {i32, i1} %t, 0 263 %obit = extractvalue {i32, i1} %t, 1 264 store i32 %val, ptr %res 265 ret i1 %obit 266} 267 268; Check that subtractions of spilled values can use SL rather than SLR. 269define zeroext i1 @f14(ptr %ptr0) { 270; CHECK-LABEL: f14: 271; CHECK: # %bb.0: 272; CHECK-NEXT: stmg %r6, %r15, 48(%r15) 273; CHECK-NEXT: .cfi_offset %r6, -112 274; CHECK-NEXT: .cfi_offset %r7, -104 275; CHECK-NEXT: .cfi_offset %r8, -96 276; CHECK-NEXT: .cfi_offset %r9, -88 277; CHECK-NEXT: .cfi_offset %r10, -80 278; CHECK-NEXT: .cfi_offset %r11, -72 279; CHECK-NEXT: .cfi_offset %r12, -64 280; CHECK-NEXT: .cfi_offset %r13, -56 281; CHECK-NEXT: .cfi_offset %r14, -48 282; CHECK-NEXT: .cfi_offset %r15, -40 283; CHECK-NEXT: aghi %r15, -168 284; CHECK-NEXT: .cfi_def_cfa_offset 328 285; CHECK-NEXT: l %r6, 0(%r2) 286; CHECK-NEXT: l %r13, 8(%r2) 287; CHECK-NEXT: l %r12, 16(%r2) 288; CHECK-NEXT: l %r7, 24(%r2) 289; CHECK-NEXT: l %r8, 32(%r2) 290; CHECK-NEXT: l %r9, 40(%r2) 291; CHECK-NEXT: l %r10, 48(%r2) 292; CHECK-NEXT: l %r11, 56(%r2) 293; CHECK-NEXT: mvc 160(4,%r15), 64(%r2) # 4-byte Folded Spill 294; CHECK-NEXT: mvc 164(4,%r15), 72(%r2) # 4-byte Folded Spill 295; CHECK-NEXT: brasl %r14, foo@PLT 296; CHECK-NEXT: slr %r2, %r6 297; CHECK-NEXT: ipm %r0 298; CHECK-NEXT: afi %r0, -536870912 299; CHECK-NEXT: srl %r0, 31 300; CHECK-NEXT: slr %r2, %r13 301; CHECK-NEXT: ipm %r1 302; CHECK-NEXT: afi %r1, -536870912 303; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 33 304; CHECK-NEXT: slr %r2, %r12 305; CHECK-NEXT: ipm %r1 306; CHECK-NEXT: afi %r1, -536870912 307; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 33 308; CHECK-NEXT: slr %r2, %r7 309; CHECK-NEXT: ipm %r1 310; CHECK-NEXT: afi %r1, -536870912 311; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 33 312; CHECK-NEXT: slr %r2, %r8 313; CHECK-NEXT: ipm %r1 314; CHECK-NEXT: afi %r1, -536870912 315; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 33 316; CHECK-NEXT: slr %r2, %r9 317; CHECK-NEXT: ipm %r1 318; CHECK-NEXT: afi %r1, -536870912 319; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 33 320; CHECK-NEXT: slr %r2, %r10 321; CHECK-NEXT: ipm %r1 322; CHECK-NEXT: afi %r1, -536870912 323; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 33 324; CHECK-NEXT: slr %r2, %r11 325; CHECK-NEXT: ipm %r1 326; CHECK-NEXT: afi %r1, -536870912 327; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 33 328; CHECK-NEXT: sl %r2, 160(%r15) # 4-byte Folded Reload 329; CHECK-NEXT: ipm %r1 330; CHECK-NEXT: afi %r1, -536870912 331; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 33 332; CHECK-NEXT: sl %r2, 164(%r15) # 4-byte Folded Reload 333; CHECK-NEXT: ipm %r1 334; CHECK-NEXT: afi %r1, -536870912 335; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 33 336; CHECK-NEXT: risbg %r2, %r0, 63, 191, 0 337; CHECK-NEXT: lmg %r6, %r15, 216(%r15) 338; CHECK-NEXT: br %r14 339 %ptr1 = getelementptr i32, ptr %ptr0, i64 2 340 %ptr2 = getelementptr i32, ptr %ptr0, i64 4 341 %ptr3 = getelementptr i32, ptr %ptr0, i64 6 342 %ptr4 = getelementptr i32, ptr %ptr0, i64 8 343 %ptr5 = getelementptr i32, ptr %ptr0, i64 10 344 %ptr6 = getelementptr i32, ptr %ptr0, i64 12 345 %ptr7 = getelementptr i32, ptr %ptr0, i64 14 346 %ptr8 = getelementptr i32, ptr %ptr0, i64 16 347 %ptr9 = getelementptr i32, ptr %ptr0, i64 18 348 349 %val0 = load i32, ptr %ptr0 350 %val1 = load i32, ptr %ptr1 351 %val2 = load i32, ptr %ptr2 352 %val3 = load i32, ptr %ptr3 353 %val4 = load i32, ptr %ptr4 354 %val5 = load i32, ptr %ptr5 355 %val6 = load i32, ptr %ptr6 356 %val7 = load i32, ptr %ptr7 357 %val8 = load i32, ptr %ptr8 358 %val9 = load i32, ptr %ptr9 359 360 %ret = call i32 @foo() 361 362 %t0 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %ret, i32 %val0) 363 %add0 = extractvalue {i32, i1} %t0, 0 364 %obit0 = extractvalue {i32, i1} %t0, 1 365 %t1 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %add0, i32 %val1) 366 %add1 = extractvalue {i32, i1} %t1, 0 367 %obit1 = extractvalue {i32, i1} %t1, 1 368 %res1 = or i1 %obit0, %obit1 369 %t2 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %add1, i32 %val2) 370 %add2 = extractvalue {i32, i1} %t2, 0 371 %obit2 = extractvalue {i32, i1} %t2, 1 372 %res2 = or i1 %res1, %obit2 373 %t3 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %add2, i32 %val3) 374 %add3 = extractvalue {i32, i1} %t3, 0 375 %obit3 = extractvalue {i32, i1} %t3, 1 376 %res3 = or i1 %res2, %obit3 377 %t4 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %add3, i32 %val4) 378 %add4 = extractvalue {i32, i1} %t4, 0 379 %obit4 = extractvalue {i32, i1} %t4, 1 380 %res4 = or i1 %res3, %obit4 381 %t5 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %add4, i32 %val5) 382 %add5 = extractvalue {i32, i1} %t5, 0 383 %obit5 = extractvalue {i32, i1} %t5, 1 384 %res5 = or i1 %res4, %obit5 385 %t6 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %add5, i32 %val6) 386 %add6 = extractvalue {i32, i1} %t6, 0 387 %obit6 = extractvalue {i32, i1} %t6, 1 388 %res6 = or i1 %res5, %obit6 389 %t7 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %add6, i32 %val7) 390 %add7 = extractvalue {i32, i1} %t7, 0 391 %obit7 = extractvalue {i32, i1} %t7, 1 392 %res7 = or i1 %res6, %obit7 393 %t8 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %add7, i32 %val8) 394 %add8 = extractvalue {i32, i1} %t8, 0 395 %obit8 = extractvalue {i32, i1} %t8, 1 396 %res8 = or i1 %res7, %obit8 397 %t9 = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %add8, i32 %val9) 398 %add9 = extractvalue {i32, i1} %t9, 0 399 %obit9 = extractvalue {i32, i1} %t9, 1 400 %res9 = or i1 %res8, %obit9 401 402 ret i1 %res9 403} 404 405declare {i32, i1} @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone 406 407