xref: /llvm-project/llvm/test/CodeGen/SystemZ/int-mul-16.ll (revision 8424bf207efd89eacf2fe893b67be98d535e1db6)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; Test high-part i128->i256 multiplications on arch15.
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch15 | FileCheck %s
5
6; Multiply high signed.
7define i128 @f1(i128 %a, i128 %b) {
8; CHECK-LABEL: f1:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vl %v0, 0(%r4), 3
11; CHECK-NEXT:    vl %v1, 0(%r3), 3
12; CHECK-NEXT:    vmhq %v0, %v1, %v0
13; CHECK-NEXT:    vst %v0, 0(%r2), 3
14; CHECK-NEXT:    br %r14
15  %exta = sext i128 %a to i256
16  %extb = sext i128 %b to i256
17  %extres = mul i256 %exta, %extb
18  %shiftres = lshr i256 %extres, 128
19  %res = trunc i256 %shiftres to i128
20  ret i128 %res
21}
22
23; Multiply high unsigned.
24define i128 @f2(i128 %a, i128 %b) {
25; CHECK-LABEL: f2:
26; CHECK:       # %bb.0:
27; CHECK-NEXT:    vl %v0, 0(%r4), 3
28; CHECK-NEXT:    vl %v1, 0(%r3), 3
29; CHECK-NEXT:    vmlhq %v0, %v1, %v0
30; CHECK-NEXT:    vst %v0, 0(%r2), 3
31; CHECK-NEXT:    br %r14
32  %exta = zext i128 %a to i256
33  %extb = zext i128 %b to i256
34  %extres = mul i256 %exta, %extb
35  %shiftres = lshr i256 %extres, 128
36  %res = trunc i256 %shiftres to i128
37  ret i128 %res
38}
39
40;; ; Multiply-and-add high signed.
41;; define i128 @f3(i128 %a, i128 %b, i128 %add) {
42;; ; CHECX-LABEL: f3:
43;; ; CHECX:       # %bb.0:
44;; ; CHECX-NEXT:    vl %v0, 0(%r3), 3
45;; ; CHECX-NEXT:    vl %v1, 0(%r4), 3
46;; ; CHECX-NEXT:    vl %v2, 0(%r5), 3
47;; ; CHECX-NEXT:    vmhq %v0, %v0, %v1, %v2
48;; ; CHECX-NEXT:    vst %v0, 0(%r2), 3
49;; ; CHECX-NEXT:    br %r14
50;;   %exta = sext i128 %a to i256
51;;   %extb = sext i128 %b to i256
52;;   %extadd = sext i128 %add to i256
53;;   %extmul = mul i256 %exta, %extb
54;;   %extres = add i256 %extmul, %extadd
55;;   %shiftres = lshr i256 %extres, 128
56;;   %res = trunc i256 %shiftres to i128
57;;   ret i128 %res
58;; }
59