1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s 3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s 4 5; 6; Test strict 32-bit square root. 7; 8 9declare float @llvm.experimental.constrained.sqrt.f32(float, metadata, metadata) 10 11; Check register square root. 12define float @f1(float %val) #0 { 13; CHECK-LABEL: f1: 14; CHECK: # %bb.0: 15; CHECK-NEXT: sqebr %f0, %f0 16; CHECK-NEXT: br %r14 17 %res = call float @llvm.experimental.constrained.sqrt.f32( 18 float %val, 19 metadata !"round.dynamic", 20 metadata !"fpexcept.strict") #0 21 ret float %res 22} 23 24; Check the low end of the SQEB range. 25define float @f2(ptr %ptr) #0 { 26; CHECK-LABEL: f2: 27; CHECK: # %bb.0: 28; CHECK-NEXT: sqeb %f0, 0(%r2) 29; CHECK-NEXT: br %r14 30 %val = load float, ptr %ptr 31 %res = call float @llvm.experimental.constrained.sqrt.f32( 32 float %val, 33 metadata !"round.dynamic", 34 metadata !"fpexcept.strict") #0 35 ret float %res 36} 37 38; Check the high end of the aligned SQEB range. 39define float @f3(ptr %base) #0 { 40; CHECK-LABEL: f3: 41; CHECK: # %bb.0: 42; CHECK-NEXT: sqeb %f0, 4092(%r2) 43; CHECK-NEXT: br %r14 44 %ptr = getelementptr float, ptr %base, i64 1023 45 %val = load float, ptr %ptr 46 %res = call float @llvm.experimental.constrained.sqrt.f32( 47 float %val, 48 metadata !"round.dynamic", 49 metadata !"fpexcept.strict") #0 50 ret float %res 51} 52 53; Check the next word up, which needs separate address logic. 54; Other sequences besides this one would be OK. 55define float @f4(ptr %base) #0 { 56; CHECK-LABEL: f4: 57; CHECK: # %bb.0: 58; CHECK-NEXT: aghi %r2, 4096 59; CHECK-NEXT: sqeb %f0, 0(%r2) 60; CHECK-NEXT: br %r14 61 %ptr = getelementptr float, ptr %base, i64 1024 62 %val = load float, ptr %ptr 63 %res = call float @llvm.experimental.constrained.sqrt.f32( 64 float %val, 65 metadata !"round.dynamic", 66 metadata !"fpexcept.strict") #0 67 ret float %res 68} 69 70; Check negative displacements, which also need separate address logic. 71define float @f5(ptr %base) #0 { 72; CHECK-LABEL: f5: 73; CHECK: # %bb.0: 74; CHECK-NEXT: aghi %r2, -4 75; CHECK-NEXT: sqeb %f0, 0(%r2) 76; CHECK-NEXT: br %r14 77 %ptr = getelementptr float, ptr %base, i64 -1 78 %val = load float, ptr %ptr 79 %res = call float @llvm.experimental.constrained.sqrt.f32( 80 float %val, 81 metadata !"round.dynamic", 82 metadata !"fpexcept.strict") #0 83 ret float %res 84} 85 86; Check that SQEB allows indices. 87define float @f6(ptr %base, i64 %index) #0 { 88; CHECK-LABEL: f6: 89; CHECK: # %bb.0: 90; CHECK-NEXT: sllg %r1, %r3, 2 91; CHECK-NEXT: sqeb %f0, 400(%r1,%r2) 92; CHECK-NEXT: br %r14 93 %ptr1 = getelementptr float, ptr %base, i64 %index 94 %ptr2 = getelementptr float, ptr %ptr1, i64 100 95 %val = load float, ptr %ptr2 96 %res = call float @llvm.experimental.constrained.sqrt.f32( 97 float %val, 98 metadata !"round.dynamic", 99 metadata !"fpexcept.strict") #0 100 ret float %res 101} 102 103attributes #0 = { strictfp } 104