xref: /llvm-project/llvm/test/CodeGen/SystemZ/foldmemop-imm-01.ll (revision a1710eb3cd5823c5d14899112ca3086acbdbe9cb)
1; RUN: llc < %s -mtriple=s390x-linux-gnu -O3 -mcpu=z10 | FileCheck %s
2; RUN: llc < %s -mtriple=s390x-linux-gnu -O3 -mcpu=z14 | FileCheck %s
3;
4; Test folding of spilled immediate loads and compares.
5
6define i32 @fun0(ptr %src, i32 %arg) nounwind {
7; CHECK-LABEL: fun0:
8; CHECK: 	mvhi	160(%r15), 0            # 4-byte Folded Spill
9; CHECK:	mvc	160(4,%r15), 0(%r2)     # 4-byte Folded Spill
10; CHECK-LABEL: .LBB0_2:
11; CHECK:	chsi	160(%r15), 2            # 4-byte Folded Reload
12
13entry:
14  %cmp  = icmp eq i32 %arg, 0
15  br i1 %cmp, label %cond, label %exit
16
17cond:
18  %val0 = load i32, ptr %src
19  call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
20  br label %exit
21
22exit:
23  %tmp0 = phi i32 [0, %entry], [%val0, %cond]
24  call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
25  %cmp0 = icmp ne i32 %tmp0, 2
26  %zxt0 = zext i1 %cmp0 to i32
27  %and0 = and i32 %arg, %zxt0
28
29  ret i32 %and0
30}
31
32define i64 @fun1(ptr %src, i64 %arg) nounwind {
33; CHECK-LABEL: fun1:
34; CHECK: 	mvghi	160(%r15), 0            # 8-byte Folded Spill
35; CHECK:	mvc	160(8,%r15), 0(%r2)     # 8-byte Folded Spill
36; CHECK-LABEL: .LBB1_2:
37; CHECK:	cghsi	160(%r15), 2            # 8-byte Folded Reload
38entry:
39  %cmp  = icmp eq i64 %arg, 0
40  br i1 %cmp, label %cond, label %exit
41
42cond:
43  %val0 = load i64, ptr %src
44  call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
45  br label %exit
46
47exit:
48  %tmp0 = phi i64 [0, %entry], [%val0, %cond]
49  call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
50  %cmp0 = icmp ne i64 %tmp0, 2
51  %zxt0 = zext i1 %cmp0 to i64
52  %and0 = and i64 %arg, %zxt0
53
54  ret i64 %and0
55}
56