1# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z16 -start-before=peephole-opt \ 2# RUN: -stop-after=peephole-opt %s -o - | FileCheck %s 3 4--- | 5 define double @f1(ptr %x, i32 %a, i32 %b, i32 %limit, ptr %dst) #0 { 6 %arrayidx1 = getelementptr inbounds double, ptr %x, i64 1 7 ret double 0.0 8 } 9 define double @f2(ptr %x, i32 %a, i32 %b, i32 %limit, ptr %dst) #0 { 10 %arrayidx1 = getelementptr inbounds double, ptr %x, i64 1 11 ret double 0.0 12 } 13 14... 15 16# Do not fold where CC is live. 17# CHECK: name: f1 18# CHECK: {{.*}} WFADB 19--- 20name: f1 21alignment: 16 22tracksRegLiveness: true 23registers: 24 - { id: 0, class: addr64bit } 25 - { id: 1, class: gr32bit } 26 - { id: 2, class: gr32bit } 27 - { id: 3, class: gr32bit } 28 - { id: 4, class: addr64bit } 29 - { id: 5, class: vr64bit } 30 - { id: 6, class: vr64bit } 31 - { id: 7, class: vr64bit } 32 - { id: 8, class: grx32bit } 33liveins: 34 - { reg: '$r2d', virtual-reg: '%0' } 35 - { reg: '$r3l', virtual-reg: '%1' } 36 - { reg: '$r4l', virtual-reg: '%2' } 37 - { reg: '$r5l', virtual-reg: '%3' } 38 - { reg: '$r6d', virtual-reg: '%4' } 39frameInfo: 40 maxAlignment: 1 41machineFunctionInfo: {} 42body: | 43 bb.0: 44 liveins: $r2d, $r3l, $r4l, $r5l, $r6d 45 46 %4:addr64bit = COPY $r6d 47 %3:gr32bit = COPY $r5l 48 %2:gr32bit = COPY $r4l 49 %1:gr32bit = COPY $r3l 50 %0:addr64bit = COPY $r2d 51 CLFIMux %3, 42, implicit-def $cc 52 %5:vr64bit = VL64 %0, 0, $noreg :: (load (s64) from %ir.x) 53 %6:vr64bit = VL64 %0, 8, $noreg :: (load (s64) from %ir.arrayidx1) 54 %7:vr64bit = nsz arcp contract afn reassoc nofpexcept WFADB killed %6, killed %5, implicit $fpc 55 %8:grx32bit = SELRMux %2, %1, 14, 4, implicit $cc 56 STMux killed %8, %4, 0, $noreg :: (store (s32) into %ir.dst) 57 $f0d = COPY %7 58 Return implicit $f0d 59 60... 61 62# Do not fold where CC is live in. 63# CHECK: name: f2 64# CHECK: {{.*}} WFADB 65--- 66name: f2 67alignment: 16 68tracksRegLiveness: true 69registers: 70 - { id: 0, class: addr64bit } 71 - { id: 1, class: gr32bit } 72 - { id: 2, class: gr32bit } 73 - { id: 3, class: gr32bit } 74 - { id: 4, class: addr64bit } 75 - { id: 5, class: vr64bit } 76 - { id: 6, class: vr64bit } 77 - { id: 7, class: vr64bit } 78 - { id: 8, class: grx32bit } 79liveins: 80 - { reg: '$r2d', virtual-reg: '%0' } 81 - { reg: '$r3l', virtual-reg: '%1' } 82 - { reg: '$r4l', virtual-reg: '%2' } 83 - { reg: '$r5l', virtual-reg: '%3' } 84 - { reg: '$r6d', virtual-reg: '%4' } 85frameInfo: 86 maxAlignment: 1 87machineFunctionInfo: {} 88body: | 89 bb.0: 90 liveins: $r2d, $r3l, $r4l, $r5l, $r6d, $cc 91 92 %4:addr64bit = COPY $r6d 93 %3:gr32bit = COPY $r5l 94 %2:gr32bit = COPY $r4l 95 %1:gr32bit = COPY $r3l 96 %0:addr64bit = COPY $r2d 97 %5:vr64bit = VL64 %0, 0, $noreg :: (load (s64) from %ir.x) 98 %6:vr64bit = VL64 %0, 8, $noreg :: (load (s64) from %ir.arrayidx1) 99 %7:vr64bit = nsz arcp contract afn reassoc nofpexcept WFADB killed %6, killed %5, implicit $fpc 100 %8:grx32bit = SELRMux %2, %1, 14, 4, implicit $cc 101 STMux killed %8, %4, 0, $noreg :: (store (s32) into %ir.dst) 102 $f0d = COPY %7 103 Return implicit $f0d 104 105... 106