1; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s 2; 3; Test that a spill/reload of a VR32/VR64 reg uses the FP opcode supporting 4; 20-bit displacement if needed and possible. 5 6define void @f1(i32 %arg, ...) { 7; CHECK-LABEL: f1: 8; CHECK-NOT: lay 9; CHECK: stdy %f0, 4400(%r15) 10bb: 11 %i = alloca [4096 x i8] 12 ret void 13} 14 15define void @f2(float %Arg) { 16; CHECK-LABEL: f2: 17; CHECK-NOT: lay 18; CHECK: stey %f0, 4172(%r15) 19bb: 20 %i = alloca [1000 x float] 21 %i2 = getelementptr inbounds [1000 x float], ptr %i, i64 0, i64 999 22 br i1 undef, label %bb3, label %bb2 23 24bb2: 25 store float %Arg , ptr %i2 26 br label %bb3 27 28bb3: 29 ret void 30} 31 32define void @f3(ptr %Dst) { 33; CHECK-LABEL: f3: 34; CHECK-NOT: lay 35; CHECK: ldy %f0, 4168(%r15) 36bb: 37 %i = alloca [500 x double] 38 br i1 undef, label %bb3, label %bb2 39 40bb2: 41 %i12 = getelementptr inbounds [500 x double], ptr %i, i64 0, i64 499 42 %i13 = load double, ptr %i12 43 %i14 = fdiv double %i13, 0.000000e+00 44 store double %i14, ptr %Dst 45 br label %bb3 46 47bb3: 48 ret void 49} 50 51define void @f4(ptr %Dst) { 52; CHECK-LABEL: f4: 53; CHECK-NOT: lay 54; CHECK: ley %f0, 4172(%r15) 55bb: 56 %i = alloca [1000 x float] 57 br i1 undef, label %bb3, label %bb2 58 59bb2: 60 %i12 = getelementptr inbounds [1000 x float], ptr %i, i64 0, i64 999 61 %i13 = load float, ptr %i12 62 %i14 = fdiv float %i13, 0.000000e+00 63 store float %i14, ptr %Dst 64 br label %bb3 65 66bb3: 67 ret void 68} 69