1# Check that the backend can handle consecutive select instructions also in 2# the presence of DEBUG_VALUE machine instructions, which should be moved. 3# 4# RUN: llc %s -mtriple=s390x-linux-gnu -mcpu=z13 -run-pass=finalize-isel \ 5# RUN: -o - 2>&1 | FileCheck %s 6# RUN: llc %s -mtriple=s390x-linux-gnu -mcpu=z13 -passes=finalize-isel \ 7# RUN: -o - 2>&1 | FileCheck %s 8# 9# CHECK-LABEL: bb.1 (%ir-block.0): 10# CHECK-NEXT: %5:fp32bit = PHI %1, %bb.0, %2, %bb.2 11# CHECK-NEXT: %6:fp32bit = PHI %3, %bb.0, %4, %bb.2 12# CHECK-NEXT: %7:fp32bit = PHI %1, %bb.0, %4, %bb.2 13# CHECK-NEXT: DBG_VALUE %5, $noreg, !5, !DIExpression(), debug-location !9 14# CHECK-NEXT: DBG_VALUE %6, $noreg, !5, !DIExpression(), debug-location !9 15# CHECK-NEXT: %8:fp32bit = AEBR %5, killed %6, implicit-def dead $cc, implicit $fpc 16 17--- | 18 ; ModuleID = 'tc.ll' 19 source_filename = "tc.ll" 20 target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64" 21 22 define float @fun(i1 %cmp, float %arg0, float %arg1, float %arg2, float %arg3, float %arg4) #0 { 23 %fs0 = select i1 %cmp, float %arg0, float %arg1 24 ; Keep the dbg metadata live by referencing it in the IR. 25 call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !7, metadata !DIExpression()), !dbg !9 26 %fs1 = select i1 %cmp, float %arg2, float %arg3 27 call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !7, metadata !DIExpression()), !dbg !9 28 %fs2 = select i1 %cmp, float %arg0, float %arg3 29 %s0 = fadd float %fs0, %fs1 30 %s1 = fadd float %s0, %fs2 31 ret float %s1 32 } 33 34 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 35 36 attributes #0 = { "target-cpu"="z13" } 37 38 !llvm.dbg.cu = !{!0} 39 !llvm.module.flags = !{!3, !4} 40 41 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "llvm", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2) 42 !1 = !DIFile(filename: "test.ll", directory: "/tmp") 43 !2 = !{} 44 !3 = !{i32 2, !"Dwarf Version", i32 4} 45 !4 = !{i32 2, !"Debug Info Version", i32 3} 46 !5 = distinct !DISubprogram(name: "test_dbg_value", scope: !1, file: !1, line: 1, type: !6, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2) 47 !6 = !DISubroutineType(types: !2) 48 !7 = !DILocalVariable(name: "in", arg: 1, scope: !5, file: !1, line: 1, type: !8) 49 !8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) 50 !9 = !DILocation(line: 1, column: 1, scope: !5) 51 52... 53--- 54name: fun 55alignment: 16 56tracksRegLiveness: true 57registers: 58 - { id: 0, class: gr32bit } 59 - { id: 1, class: fp32bit } 60 - { id: 2, class: fp32bit } 61 - { id: 3, class: fp32bit } 62 - { id: 4, class: fp32bit } 63 - { id: 5, class: fp32bit } 64 - { id: 6, class: fp32bit } 65 - { id: 7, class: fp32bit } 66 - { id: 8, class: fp32bit } 67 - { id: 9, class: fp32bit } 68liveins: 69 - { reg: '$r2l', virtual-reg: '%0' } 70 - { reg: '$f0s', virtual-reg: '%1' } 71 - { reg: '$f2s', virtual-reg: '%2' } 72 - { reg: '$f4s', virtual-reg: '%3' } 73 - { reg: '$f6s', virtual-reg: '%4' } 74frameInfo: 75 maxAlignment: 8 76fixedStack: 77 - { id: 0, size: 4, alignment: 8, stack-id: default, isImmutable: true } 78body: | 79 bb.0 (%ir-block.0): 80 liveins: $r2l, $f0s, $f2s, $f4s, $f6s 81 82 %4:fp32bit = COPY $f6s 83 %3:fp32bit = COPY $f4s 84 %2:fp32bit = COPY $f2s 85 %1:fp32bit = COPY $f0s 86 %0:gr32bit = COPY $r2l 87 TMLMux %0, 1, implicit-def $cc 88 %5:fp32bit = SelectVR32 %1, %2, 15, 7, implicit $cc 89 DBG_VALUE %5, $noreg, !7, !DIExpression(), debug-location !9 90 %6:fp32bit = SelectVR32 %3, %4, 15, 7, implicit $cc 91 DBG_VALUE %6, $noreg, !7, !DIExpression(), debug-location !9 92 %7:fp32bit = SelectVR32 %1, %4, 15, 7, implicit $cc 93 %8:fp32bit = AEBR %5, killed %6, implicit-def dead $cc, implicit $fpc 94 %9:fp32bit = AEBR %8, killed %7, implicit-def dead $cc, implicit $fpc 95 $f0s = COPY %9 96 Return implicit $f0s 97 98... 99