1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s 3; 4; Test that DAGCombiner does not change the addressing as the displacements 5; are known to be out of range. Only one addition is needed. 6 7define void @fun(ptr %Src, ptr %Dst) { 8; CHECK-LABEL: fun: 9; CHECK: # %bb.0: 10; CHECK-NEXT: aghi %r2, 4096 11; CHECK-NEXT: vl %v0, 0(%r2), 3 12; CHECK-NEXT: vst %v0, 0(%r3), 3 13; CHECK-NEXT: vl %v0, 16(%r2), 3 14; CHECK-NEXT: vst %v0, 0(%r3), 3 15; CHECK-NEXT: br %r14 16 17 %splitgep = getelementptr i8, ptr %Src, i64 4096 18 %V0 = load <2 x i64>, ptr %splitgep, align 8 19 store volatile <2 x i64> %V0, ptr %Dst, align 8 20 21 %1 = getelementptr i8, ptr %splitgep, i64 16 22 %V1 = load <2 x i64>, ptr %1, align 8 23 store volatile <2 x i64> %V1, ptr %Dst, align 8 24 25 ret void 26} 27