xref: /llvm-project/llvm/test/CodeGen/SystemZ/dag-combine-03.ll (revision f9ab4f5f4e9011e5aa0ad2d14622fd1a019d8706)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s  | FileCheck %s
3
4; Test that DAGCombiner gets helped by getKnownBitsForTargetNode() when
5; BITCAST nodes are involved on a big-endian target.
6;
7; The EXTRACT_VECTOR_ELT is done first into an i32, and then AND:ed with
8; 1. The AND is not actually necessary since the element contains a CC (i1)
9; value. Test that the BITCAST nodes in the DAG when computing KnownBits is
10; handled so that the AND is removed. If this succeeds, this results in a CHI
11; instead of TMLL.
12
13define void @fun(i64 %a0) {
14; CHECK-LABEL: fun:
15; CHECK:       # %bb.0: # %entry
16; CHECK-NEXT:    lghi %r1, 0
17; CHECK-NEXT:  .LBB0_1: # %lab0
18; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
19; CHECK-NEXT:    la %r0, 2(%r1)
20; CHECK-NEXT:    la %r1, 1(%r1)
21; CHECK-NEXT:    cgr %r1, %r2
22; CHECK-NEXT:    lhi %r3, 0
23; CHECK-NEXT:    lochie %r3, 1
24; CHECK-NEXT:    cgr %r0, %r2
25; CHECK-NEXT:    lhi %r0, 0
26; CHECK-NEXT:    lochie %r0, 1
27; CHECK-NEXT:    vlvgp %v0, %r3, %r3
28; CHECK-NEXT:    vlvgp %v1, %r0, %r0
29; CHECK-NEXT:    vx %v0, %v0, %v1
30; CHECK-NEXT:    vlgvf %r0, %v0, 1
31; CHECK-NEXT:    chi %r0, 0
32; CHECK-NEXT:    locghie %r1, 0
33; CHECK-NEXT:    j .LBB0_1
34entry:
35  br label %lab0
36
37lab0:
38  %phi = phi i64 [ %sel, %lab0 ], [ 0, %entry ]
39  %add = add nuw nsw i64 %phi, 1
40  %add2 = add nuw nsw i64 %phi, 2
41  %cmp = icmp eq i64 %add, %a0
42  %cmp2 = icmp eq i64 %add2, %a0
43  %ins = insertelement <2 x i1> undef, i1 %cmp, i32 0
44  %ins2 = insertelement <2 x i1> undef, i1 %cmp2, i32 0
45  %xor = xor <2 x i1> %ins, %ins2
46  %extr = extractelement <2 x i1> %xor, i32 0
47
48  %sel = select i1 %extr, i64 %add, i64 0
49  br label %lab0
50}
51