1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; Test i128 byteswaps on z13 and higher. 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s 5 6declare i128 @llvm.bswap.i128(i128 %a) 7 8; Check 128-bit register-to-register byteswaps. 9define i128 @f1(i128 %a, i128 %b, i128 %c) { 10; CHECK-LABEL: f1: 11; CHECK: # %bb.0: 12; CHECK-NEXT: vl %v1, 0(%r4), 3 13; CHECK-NEXT: vl %v2, 0(%r3), 3 14; CHECK-NEXT: larl %r1, .LCPI0_0 15; CHECK-NEXT: vaq %v1, %v2, %v1 16; CHECK-NEXT: vl %v2, 0(%r1), 3 17; CHECK-NEXT: vl %v0, 0(%r5), 3 18; CHECK-NEXT: vperm %v1, %v1, %v1, %v2 19; CHECK-NEXT: vaq %v0, %v1, %v0 20; CHECK-NEXT: vst %v0, 0(%r2), 3 21; CHECK-NEXT: br %r14 22 %in = add i128 %a, %b 23 %swapped = call i128 @llvm.bswap.i128(i128 %in) 24 %out = add i128 %swapped, %c 25 ret i128 %out 26} 27 28; Check 128-bit register-to-memory byteswaps. 29define i128 @f2(i128 %a, i128 %b) { 30; CHECK-LABEL: f2: 31; CHECK: # %bb.0: 32; CHECK-NEXT: vl %v0, 0(%r4), 3 33; CHECK-NEXT: vl %v1, 0(%r3), 3 34; CHECK-NEXT: larl %r1, .LCPI1_0 35; CHECK-NEXT: vaq %v0, %v1, %v0 36; CHECK-NEXT: vl %v1, 0(%r1), 3 37; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 38; CHECK-NEXT: vst %v0, 0(%r2), 3 39; CHECK-NEXT: br %r14 40 %in = add i128 %a, %b 41 %swapped = call i128 @llvm.bswap.i128(i128 %in) 42 ret i128 %swapped 43} 44 45; Check 128-bit memory-to-register byteswaps. 46define i128 @f3(i128 %a, i128 %b) { 47; CHECK-LABEL: f3: 48; CHECK: # %bb.0: 49; CHECK-NEXT: larl %r1, .LCPI2_0 50; CHECK-NEXT: vl %v1, 0(%r3), 3 51; CHECK-NEXT: vl %v2, 0(%r1), 3 52; CHECK-NEXT: vl %v0, 0(%r4), 3 53; CHECK-NEXT: vperm %v1, %v1, %v1, %v2 54; CHECK-NEXT: vaq %v0, %v1, %v0 55; CHECK-NEXT: vst %v0, 0(%r2), 3 56; CHECK-NEXT: br %r14 57 %swapped = call i128 @llvm.bswap.i128(i128 %a) 58 %out = add i128 %swapped, %b 59 ret i128 %out 60} 61 62