1; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=SPV 2 3;; The IR was generated from the following source: 4;; void __kernel K(global float* A, int B) { 5;; bool Cmp = B > 0; 6;; A[0] = Cmp; 7;; } 8;; Command line: 9;; clang -x cl -cl-std=CL2.0 -target spir64 -emit-llvm -S -c test.cl 10 11 12; SPV-DAG: OpName %[[#s1:]] "s1" 13; SPV-DAG: OpName %[[#s2:]] "s2" 14; SPV-DAG: OpName %[[#s3:]] "s3" 15; SPV-DAG: OpName %[[#s4:]] "s4" 16; SPV-DAG: OpName %[[#s5:]] "s5" 17; SPV-DAG: OpName %[[#s6:]] "s6" 18; SPV-DAG: OpName %[[#s7:]] "s7" 19; SPV-DAG: OpName %[[#s8:]] "s8" 20; SPV-DAG: OpName %[[#z1:]] "z1" 21; SPV-DAG: OpName %[[#z2:]] "z2" 22; SPV-DAG: OpName %[[#z3:]] "z3" 23; SPV-DAG: OpName %[[#z4:]] "z4" 24; SPV-DAG: OpName %[[#z5:]] "z5" 25; SPV-DAG: OpName %[[#z6:]] "z6" 26; SPV-DAG: OpName %[[#z7:]] "z7" 27; SPV-DAG: OpName %[[#z8:]] "z8" 28; SPV-DAG: OpName %[[#ufp1:]] "ufp1" 29; SPV-DAG: OpName %[[#ufp2:]] "ufp2" 30; SPV-DAG: OpName %[[#sfp1:]] "sfp1" 31; SPV-DAG: OpName %[[#sfp2:]] "sfp2" 32; SPV-DAG: %[[#int_32:]] = OpTypeInt 32 0 33; SPV-DAG: %[[#int_8:]] = OpTypeInt 8 0 34; SPV-DAG: %[[#int_16:]] = OpTypeInt 16 0 35; SPV-DAG: %[[#int_64:]] = OpTypeInt 64 0 36; SPV-DAG: %[[#zero_32:]] = OpConstant %[[#int_32]] 0 37; SPV-DAG: %[[#one_32:]] = OpConstant %[[#int_32]] 1 38; SPV-DAG: %[[#zero_8:]] = OpConstantNull %[[#int_8]] 39; SPV-DAG: %[[#mone_8:]] = OpConstant %[[#int_8]] 255 40; SPV-DAG: %[[#zero_16:]] = OpConstantNull %[[#int_16]] 41; SPV-DAG: %[[#mone_16:]] = OpConstant %[[#int_16]] 65535 42; SPV-DAG: %[[#mone_32:]] = OpConstant %[[#int_32]] 4294967295 43; SPV-DAG: %[[#zero_64:]] = OpConstantNull %[[#int_64]] 44; SPV-DAG: %[[#mone_64:]] = OpConstant %[[#int_64]] 18446744073709551615 45; SPV-DAG: %[[#one_8:]] = OpConstant %[[#int_8]] 1 46; SPV-DAG: %[[#one_16:]] = OpConstant %[[#int_16]] 1 47; SPV-DAG: %[[#one_64:]] = OpConstant %[[#int_64]] 1 48; SPV-DAG: %[[#void:]] = OpTypeVoid 49; SPV-DAG: %[[#float:]] = OpTypeFloat 32 50; SPV-DAG: %[[#bool:]] = OpTypeBool 51; SPV-DAG: %[[#vec_8:]] = OpTypeVector %[[#int_8]] 2 52; SPV-DAG: %[[#vec_1:]] = OpTypeVector %[[#bool]] 2 53; SPV-DAG: %[[#vec_16:]] = OpTypeVector %[[#int_16]] 2 54; SPV-DAG: %[[#vec_32:]] = OpTypeVector %[[#int_32]] 2 55; SPV-DAG: %[[#vec_64:]] = OpTypeVector %[[#int_64]] 2 56; SPV-DAG: %[[#vec_float:]] = OpTypeVector %[[#float]] 2 57; SPV-DAG: %[[#zeros_8:]] = OpConstantNull %[[#vec_8]] 58; SPV-DAG: %[[#mones_8:]] = OpConstantComposite %[[#vec_8]] %[[#mone_8]] %[[#mone_8]] 59; SPV-DAG: %[[#zeros_16:]] = OpConstantNull %[[#vec_16]] 60; SPV-DAG: %[[#mones_16:]] = OpConstantComposite %[[#vec_16]] %[[#mone_16]] %[[#mone_16]] 61; SPV-DAG: %[[#zeros_32:]] = OpConstantNull %[[#vec_32]] 62; SPV-DAG: %[[#mones_32:]] = OpConstantComposite %[[#vec_32]] %[[#mone_32]] %[[#mone_32]] 63; SPV-DAG: %[[#zeros_64:]] = OpConstantNull %[[#vec_64]] 64; SPV-DAG: %[[#mones_64:]] = OpConstantComposite %[[#vec_64]] %[[#mone_64]] %[[#mone_64]] 65; SPV-DAG: %[[#ones_8:]] = OpConstantComposite %[[#vec_8]] %[[#one_8]] %[[#one_8]] 66; SPV-DAG: %[[#ones_16:]] = OpConstantComposite %[[#vec_16]] %[[#one_16]] %[[#one_16]] 67; SPV-DAG: %[[#ones_32:]] = OpConstantComposite %[[#vec_32]] %[[#one_32]] %[[#one_32]] 68; SPV-DAG: %[[#ones_64:]] = OpConstantComposite %[[#vec_64]] %[[#one_64]] %[[#one_64]] 69; SPV-DAG: %[[#pointer:]] = OpTypePointer CrossWorkgroup %[[#float]] 70 71; SPV-DAG: OpFunction 72; SPV-DAG: %[[#A:]] = OpFunctionParameter %[[#pointer]] 73; SPV-DAG: %[[#B:]] = OpFunctionParameter %[[#]] 74; SPV-DAG: %[[#i1s:]] = OpFunctionParameter %[[#]] 75; SPV-DAG: %[[#i1v:]] = OpFunctionParameter %[[#]] 76 77define dso_local spir_kernel void @K(float addrspace(1)* nocapture %A, i32 %B, i1 %i1s, <2 x i1> %i1v) local_unnamed_addr { 78entry: 79 80; SPV-DAG: %[[#cmp_res:]] = OpSGreaterThan %[[#bool]] %[[#B]] %[[#zero_32]] 81 %cmp = icmp sgt i32 %B, 0 82; SPV-DAG: %[[#select_res:]] = OpSelect %[[#int_32]] %[[#cmp_res]] %[[#one_32]] %[[#zero_32]] 83; SPV-DAG: %[[#utof_res:]] = OpConvertUToF %[[#float]] %[[#select_res]] 84 %conv = uitofp i1 %cmp to float 85; SPV-DAG: OpStore %[[#A]] %[[#utof_res]] 86 store float %conv, float addrspace(1)* %A, align 4; 87 88; SPV-DAG: %[[#s1]] = OpSelect %[[#int_8]] %[[#i1s]] %[[#mone_8]] %[[#zero_8]] 89 %s1 = sext i1 %i1s to i8 90; SPV-DAG: %[[#s2]] = OpSelect %[[#int_16]] %[[#i1s]] %[[#mone_16]] %[[#zero_16]] 91 %s2 = sext i1 %i1s to i16 92; SPV-DAG: %[[#s3]] = OpSelect %[[#int_32]] %[[#i1s]] %[[#mone_32]] %[[#zero_32]] 93 %s3 = sext i1 %i1s to i32 94; SPV-DAG: %[[#s4]] = OpSelect %[[#int_64]] %[[#i1s]] %[[#mone_64]] %[[#zero_64]] 95 %s4 = sext i1 %i1s to i64 96; SPV-DAG: %[[#s5]] = OpSelect %[[#vec_8]] %[[#i1v]] %[[#mones_8]] %[[#zeros_8]] 97 %s5 = sext <2 x i1> %i1v to <2 x i8> 98; SPV-DAG: %[[#s6]] = OpSelect %[[#vec_16]] %[[#i1v]] %[[#mones_16]] %[[#zeros_16]] 99 %s6 = sext <2 x i1> %i1v to <2 x i16> 100; SPV-DAG: %[[#s7]] = OpSelect %[[#vec_32]] %[[#i1v]] %[[#mones_32]] %[[#zeros_32]] 101 %s7 = sext <2 x i1> %i1v to <2 x i32> 102; SPV-DAG: %[[#s8]] = OpSelect %[[#vec_64]] %[[#i1v]] %[[#mones_64]] %[[#zeros_64]] 103 %s8 = sext <2 x i1> %i1v to <2 x i64> 104; SPV-DAG: %[[#z1]] = OpSelect %[[#int_8]] %[[#i1s]] %[[#one_8]] %[[#zero_8]] 105 %z1 = zext i1 %i1s to i8 106; SPV-DAG: %[[#z2]] = OpSelect %[[#int_16]] %[[#i1s]] %[[#one_16]] %[[#zero_16]] 107 %z2 = zext i1 %i1s to i16 108; SPV-DAG: %[[#z3]] = OpSelect %[[#int_32]] %[[#i1s]] %[[#one_32]] %[[#zero_32]] 109 %z3 = zext i1 %i1s to i32 110; SPV-DAG: %[[#z4]] = OpSelect %[[#int_64]] %[[#i1s]] %[[#one_64]] %[[#zero_64]] 111 %z4 = zext i1 %i1s to i64 112; SPV-DAG: %[[#z5]] = OpSelect %[[#vec_8]] %[[#i1v]] %[[#ones_8]] %[[#zeros_8]] 113 %z5 = zext <2 x i1> %i1v to <2 x i8> 114; SPV-DAG: %[[#z6]] = OpSelect %[[#vec_16]] %[[#i1v]] %[[#ones_16]] %[[#zeros_16]] 115 %z6 = zext <2 x i1> %i1v to <2 x i16> 116; SPV-DAG: %[[#z7]] = OpSelect %[[#vec_32]] %[[#i1v]] %[[#ones_32]] %[[#zeros_32]] 117 %z7 = zext <2 x i1> %i1v to <2 x i32> 118; SPV-DAG: %[[#z8]] = OpSelect %[[#vec_64]] %[[#i1v]] %[[#ones_64]] %[[#zeros_64]] 119 %z8 = zext <2 x i1> %i1v to <2 x i64> 120; SPV-DAG: %[[#ufp1_res:]] = OpSelect %[[#int_32]] %[[#i1s]] %[[#one_32]] %[[#zero_32]] 121; SPV-DAG: %[[#ufp1]] = OpConvertUToF %[[#float]] %[[#ufp1_res]] 122 %ufp1 = uitofp i1 %i1s to float 123; SPV-DAG: %[[#ufp2_res:]] = OpSelect %[[#vec_32]] %[[#i1v]] %[[#ones_32]] %[[#zeros_32]] 124; SPV-DAG: %[[#ufp2]] = OpConvertUToF %[[#vec_float]] %[[#ufp2_res]] 125 %ufp2 = uitofp <2 x i1> %i1v to <2 x float> 126; SPV-DAG: %[[#sfp1_res:]] = OpSelect %[[#int_32]] %[[#i1s]] %[[#one_32]] %[[#zero_32]] 127; SPV-DAG: %[[#sfp1]] = OpConvertSToF %[[#float]] %[[#sfp1_res]] 128 %sfp1 = sitofp i1 %i1s to float 129; SPV-DAG: %[[#sfp2_res:]] = OpSelect %[[#vec_32]] %[[#i1v]] %[[#ones_32]] %[[#zeros_32]] 130; SPV-DAG: %[[#sfp2]] = OpConvertSToF %[[#vec_float]] %[[#sfp2_res]] 131 %sfp2 = sitofp <2 x i1> %i1v to <2 x float> 132 ret void 133} 134