xref: /llvm-project/llvm/test/CodeGen/SPIRV/transcoding/spec_const.ll (revision dfb9bf35c42a04a8f152dabf0a9d1a52e451f942) 
1; RUN: llc -O0 -mtriple=spirv32-unknown-unknown --avoid-spirv-capabilities=Shader %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown --avoid-spirv-capabilities=Shader %s -o - -filetype=obj | spirv-val %}
3
4; CHECK-SPIRV-DAG: OpCapability Kernel
5; CHECK-SPIRV-NOT: OpCapability Matrix
6; CHECK-SPIRV-NOT: OpCapability Shader
7
8; CHECK-SPIRV-DAG: OpDecorate %[[#SC0:]] SpecId 0
9; CHECK-SPIRV-DAG: OpDecorate %[[#SC1:]] SpecId 1
10; CHECK-SPIRV-DAG: OpDecorate %[[#SC2:]] SpecId 2
11; CHECK-SPIRV-DAG: OpDecorate %[[#SC3:]] SpecId 3
12; CHECK-SPIRV-DAG: OpDecorate %[[#SC4:]] SpecId 4
13; CHECK-SPIRV-DAG: OpDecorate %[[#SC5:]] SpecId 5
14; CHECK-SPIRV-DAG: OpDecorate %[[#SC6:]] SpecId 6
15; CHECK-SPIRV-DAG: OpDecorate %[[#SC7:]] SpecId 7
16
17; CHECK-SPIRV-DAG: %[[#SC0]] = OpSpecConstantFalse %[[#]]
18; CHECK-SPIRV-DAG: %[[#SC1]] = OpSpecConstant %[[#]] 100
19; CHECK-SPIRV-DAG: %[[#SC2]] = OpSpecConstant %[[#]] 1
20; CHECK-SPIRV-DAG: %[[#SC3]] = OpSpecConstant %[[#]] 2
21; CHECK-SPIRV-DAG: %[[#SC4]] = OpSpecConstant %[[#]] 3 0
22; CHECK-SPIRV-DAG: %[[#SC5]] = OpSpecConstant %[[#]] 14336
23; CHECK-SPIRV-DAG: %[[#SC6]] = OpSpecConstant %[[#]] 1067450368
24; CHECK-SPIRV-DAG: %[[#SC7]] = OpSpecConstant %[[#]] 0 1073807360
25
26define spir_kernel void @foo(i8 addrspace(1)* nocapture %b, i8 addrspace(1)* nocapture %c, i16 addrspace(1)* nocapture %s, i32 addrspace(1)* nocapture %i, i64 addrspace(1)* nocapture %l, half addrspace(1)* nocapture %h, float addrspace(1)* nocapture %f, double addrspace(1)* nocapture %d) local_unnamed_addr {
27entry:
28  %0 = call i1 @_Z20__spirv_SpecConstantib(i32 0, i1 false)
29  %conv = zext i1 %0 to i8
30  store i8 %conv, i8 addrspace(1)* %b, align 1
31
32  %1 = call i8 @_Z20__spirv_SpecConstantia(i32 1, i8 100)
33  store i8 %1, i8 addrspace(1)* %c, align 1
34
35  %2 = call i16 @_Z20__spirv_SpecConstantis(i32 2, i16 1)
36  store i16 %2, i16 addrspace(1)* %s, align 2
37
38  %3 = call i32 @_Z20__spirv_SpecConstantii(i32 3, i32 2)
39  store i32 %3, i32 addrspace(1)* %i, align 4
40
41  %4 = call i64 @_Z20__spirv_SpecConstantix(i32 4, i64 3)
42  store i64 %4, i64 addrspace(1)* %l, align 8
43
44  %5 = call half @_Z20__spirv_SpecConstantih(i32 5, half 0xH3800)
45  store half %5, half addrspace(1)* %h, align 2
46
47  %6 = call float @_Z20__spirv_SpecConstantif(i32 6, float 1.250000e+00)
48  store float %6, float addrspace(1)* %f, align 4
49
50  %7 = call double @_Z20__spirv_SpecConstantid(i32 7, double 2.125000e+00)
51  store double %7, double addrspace(1)* %d, align 8
52  ret void
53}
54
55declare i1 @_Z20__spirv_SpecConstantib(i32, i1)
56declare i8 @_Z20__spirv_SpecConstantia(i32, i8)
57declare i16 @_Z20__spirv_SpecConstantis(i32, i16)
58declare i32 @_Z20__spirv_SpecConstantii(i32, i32)
59declare i64 @_Z20__spirv_SpecConstantix(i32, i64)
60declare half @_Z20__spirv_SpecConstantih(i32, half)
61declare float @_Z20__spirv_SpecConstantif(i32, float)
62declare double @_Z20__spirv_SpecConstantid(i32, double)
63