1; RUN: llc -mtriple=spirv-unknown-vulkan-compute -O0 %s -o - | FileCheck %s 2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan-compute %s -o - -filetype=obj | spirv-val %} 3 4; static int foo() { return 200; } 5; 6; static int process() { 7; int a = 0; 8; int b = 0; 9; int c = 0; 10; const int r = 20; 11; const int s = 40; 12; const int t = 3*r+2*s; 13; 14; switch(int d = 5) { 15; case 1: 16; b += 1; 17; c += foo(); 18; case 2: 19; b += 2; 20; break; 21; case 3: 22; { 23; b += 3; 24; break; 25; } 26; case t: 27; b += t; 28; case 4: 29; case 5: 30; b += 5; 31; break; 32; case 6: { 33; case 7: 34; break;} 35; default: 36; break; 37; } 38; 39; return a + b + c; 40; } 41; 42; [numthreads(1, 1, 1)] 43; void main() { 44; process(); 45; } 46 47; CHECK: %[[#func:]] = OpFunction %[[#]] DontInline %[[#]] 48; CHECK: %[[#bb30:]] = OpLabel 49; CHECK: OpSelectionMerge %[[#bb31:]] None 50; CHECK: OpBranchConditional %[[#]] %[[#bb32:]] %[[#bb33:]] 51 52; CHECK: %[[#bb33]] = OpLabel 53; CHECK: OpUnreachable 54 55; CHECK: %[[#bb32]] = OpLabel 56; CHECK: OpSelectionMerge %[[#bb34:]] None 57; CHECK: OpBranchConditional %[[#]] %[[#bb35:]] %[[#bb36:]] 58 59; CHECK: %[[#bb36]] = OpLabel 60; CHECK: OpUnreachable 61 62; CHECK: %[[#bb35]] = OpLabel 63; CHECK: OpSelectionMerge %[[#bb37:]] None 64; CHECK: OpBranchConditional %[[#]] %[[#bb38:]] %[[#bb39:]] 65 66; CHECK: %[[#bb39]] = OpLabel 67; CHECK: OpUnreachable 68 69; CHECK: %[[#bb38]] = OpLabel 70; CHECK: OpSelectionMerge %[[#bb40:]] None 71; CHECK: OpSwitch %[[#]] %[[#bb41:]] 1 %[[#bb42:]] 2 %[[#bb43:]] 3 %[[#bb44:]] 140 %[[#bb45:]] 4 %[[#bb46:]] 5 %[[#bb47:]] 6 %[[#bb48:]] 7 %[[#bb49:]] 72 73; CHECK: %[[#bb49]] = OpLabel 74; CHECK: OpBranch %[[#bb40]] 75; CHECK: %[[#bb48]] = OpLabel 76; CHECK: OpBranch %[[#bb40]] 77; CHECK: %[[#bb47]] = OpLabel 78; CHECK: OpBranch %[[#bb40]] 79; CHECK: %[[#bb46]] = OpLabel 80; CHECK: OpBranch %[[#bb40]] 81; CHECK: %[[#bb45]] = OpLabel 82; CHECK: OpBranch %[[#bb40]] 83; CHECK: %[[#bb44]] = OpLabel 84; CHECK: OpBranch %[[#bb40]] 85; CHECK: %[[#bb43]] = OpLabel 86; CHECK: OpBranch %[[#bb40]] 87; CHECK: %[[#bb42]] = OpLabel 88; CHECK: OpBranch %[[#bb40]] 89; CHECK: %[[#bb41]] = OpLabel 90; CHECK: OpBranch %[[#bb40]] 91 92; CHECK: %[[#bb40]] = OpLabel 93; CHECK: OpSelectionMerge %[[#bb50:]] None 94; CHECK: OpSwitch %[[#]] %[[#bb50]] 1 %[[#bb51:]] 2 %[[#bb52:]] 3 %[[#bb53:]] 95; CHECK: %[[#bb53]] = OpLabel 96; CHECK: OpBranch %[[#bb50]] 97; CHECK: %[[#bb52]] = OpLabel 98; CHECK: OpBranch %[[#bb50]] 99; CHECK: %[[#bb51]] = OpLabel 100; CHECK: OpBranch %[[#bb50]] 101; CHECK: %[[#bb50]] = OpLabel 102; CHECK: OpBranch %[[#bb37]] 103 104; CHECK: %[[#bb37]] = OpLabel 105; CHECK: OpSelectionMerge %[[#bb54:]] None 106; CHECK: OpSwitch %[[#]] %[[#bb54]] 1 %[[#bb55:]] 2 %[[#bb56:]] 107; CHECK: %[[#bb56]] = OpLabel 108; CHECK: OpBranch %[[#bb54]] 109; CHECK: %[[#bb55]] = OpLabel 110; CHECK: OpBranch %[[#bb54]] 111; CHECK: %[[#bb54]] = OpLabel 112; CHECK: OpBranch %[[#bb34]] 113 114; CHECK: %[[#bb34]] = OpLabel 115; CHECK: OpBranch %[[#bb31]] 116 117; CHECK: %[[#bb31]] = OpLabel 118; CHECK: OpReturn 119; CHECK: OpFunctionEnd 120 121 122 123target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-G1" 124target triple = "spirv-unknown-vulkan1.3-compute" 125 126; Function Attrs: convergent noinline norecurse 127define void @main() #0 { 128entry: 129 %a.i = alloca i32, align 4 130 %b.i = alloca i32, align 4 131 %c.i = alloca i32, align 4 132 %r.i = alloca i32, align 4 133 %s.i = alloca i32, align 4 134 %t.i = alloca i32, align 4 135 %d.i = alloca i32, align 4 136 %0 = call token @llvm.experimental.convergence.entry() 137 store i32 0, ptr %a.i, align 4 138 store i32 0, ptr %b.i, align 4 139 store i32 0, ptr %c.i, align 4 140 store i32 20, ptr %r.i, align 4 141 store i32 40, ptr %s.i, align 4 142 store i32 140, ptr %t.i, align 4 143 store i32 5, ptr %d.i, align 4 144 %1 = load i32, ptr %d.i, align 4 145 switch i32 %1, label %sw.default.i [ 146 i32 1, label %sw.bb.i 147 i32 2, label %sw.bb3.i 148 i32 3, label %sw.bb5.i 149 i32 140, label %sw.bb7.i 150 i32 4, label %sw.bb9.i 151 i32 5, label %sw.bb9.i 152 i32 6, label %sw.bb11.i 153 i32 7, label %sw.bb12.i 154 ] 155 156sw.bb.i: 157 %2 = load i32, ptr %b.i, align 4 158 %add.i = add nsw i32 %2, 1 159 store i32 %add.i, ptr %b.i, align 4 160 %3 = load i32, ptr %c.i, align 4 161 %add2.i = add nsw i32 %3, 200 162 store i32 %add2.i, ptr %c.i, align 4 163 br label %sw.bb3.i 164 165sw.bb3.i: 166 %4 = load i32, ptr %b.i, align 4 167 %add4.i = add nsw i32 %4, 2 168 store i32 %add4.i, ptr %b.i, align 4 169 br label %_ZL7processv.exit 170 171sw.bb5.i: 172 %5 = load i32, ptr %b.i, align 4 173 %add6.i = add nsw i32 %5, 3 174 store i32 %add6.i, ptr %b.i, align 4 175 br label %_ZL7processv.exit 176 177sw.bb7.i: 178 %6 = load i32, ptr %b.i, align 4 179 %add8.i = add nsw i32 %6, 140 180 store i32 %add8.i, ptr %b.i, align 4 181 br label %sw.bb9.i 182 183sw.bb9.i: 184 %7 = load i32, ptr %b.i, align 4 185 %add10.i = add nsw i32 %7, 5 186 store i32 %add10.i, ptr %b.i, align 4 187 br label %_ZL7processv.exit 188 189sw.bb11.i: 190 br label %sw.bb12.i 191 192sw.bb12.i: 193 br label %_ZL7processv.exit 194 195sw.default.i: 196 br label %_ZL7processv.exit 197 198_ZL7processv.exit: 199 %8 = load i32, ptr %a.i, align 4 200 %9 = load i32, ptr %b.i, align 4 201 %add13.i = add nsw i32 %8, %9 202 %10 = load i32, ptr %c.i, align 4 203 %add14.i = add nsw i32 %add13.i, %10 204 ret void 205} 206 207declare token @llvm.experimental.convergence.entry() #1 208 209attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } 210attributes #1 = { convergent nocallback nofree nosync nounwind willreturn memory(none) } 211