xref: /llvm-project/llvm/test/CodeGen/SPIRV/instructions/bitwise-i1.ll (revision 949d70d5e023b34b741b7d577c61a7ef60c3316f)
1; This test ensures that LLVM IR bitwise instructions result in logical SPIR-V instructions
2; when applied to i1 type
3
4; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
5; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
6
7; CHECK-DAG: %[[#Char:]] = OpTypeInt 8 0
8; CHECK-DAG: %[[#Vec2Char:]] = OpTypeVector %[[#Char]] 2
9; CHECK-DAG: %[[#Bool:]] = OpTypeBool
10; CHECK-DAG: %[[#Vec2Bool:]] = OpTypeVector %[[#Bool]] 2
11
12; CHECK: OpBitwiseAnd %[[#Char]]
13; CHECK: OpBitwiseOr %[[#Char]]
14; CHECK: OpBitwiseXor %[[#Char]]
15; CHECK: OpBitwiseAnd %[[#Vec2Char]]
16; CHECK: OpBitwiseOr %[[#Vec2Char]]
17; CHECK: OpBitwiseXor %[[#Vec2Char]]
18
19; CHECK: OpLogicalAnd %[[#Bool]]
20
21; CHECK: OpLogicalAnd %[[#Bool]]
22; CHECK: OpLogicalOr %[[#Bool]]
23; CHECK: OpLogicalNotEqual %[[#Bool]]
24; CHECK: OpLogicalAnd %[[#Vec2Bool]]
25; CHECK: OpLogicalOr %[[#Vec2Bool]]
26; CHECK: OpLogicalNotEqual %[[#Vec2Bool]]
27
28define void @test1(i8 noundef %arg1, i8 noundef %arg2) {
29  %cond1 = and i8 %arg1, %arg2
30  %cond2 = or i8 %arg1, %arg2
31  %cond3 = xor i8 %arg1, %arg2
32  ret void
33}
34
35define void @test1v(<2 x i8> noundef %arg1, <2 x i8> noundef %arg2) {
36  %cond1 = and <2 x i8> %arg1, %arg2
37  %cond2 = or <2 x i8> %arg1, %arg2
38  %cond3 = xor <2 x i8> %arg1, %arg2
39  ret void
40}
41
42define void @test2(float noundef %real, float noundef %imag) {
43entry:
44  %realabs = tail call spir_func noundef float @_Z16__spirv_ocl_fabsf(float noundef %real)
45  %cond1 = fcmp oeq float %realabs, 1.000000e+00
46  %cond2 = fcmp oeq float %imag, 0.000000e+00
47  %cond3 = and i1 %cond1, %cond2
48  br i1 %cond3, label %midlbl, label %cleanup
49midlbl:
50  br label %cleanup
51cleanup:
52  ret void
53}
54
55define void @test3(i1 noundef %arg1, i1 noundef %arg2) {
56  %cond1 = and i1 %arg1, %arg2
57  %cond2 = or i1 %arg1, %arg2
58  %cond3 = xor i1 %arg1, %arg2
59  ret void
60}
61
62define void @test3v(<2 x i1> noundef %arg1, <2 x i1> noundef %arg2) {
63  %cond1 = and <2 x i1> %arg1, %arg2
64  %cond2 = or <2 x i1> %arg1, %arg2
65  %cond3 = xor <2 x i1> %arg1, %arg2
66  ret void
67}
68
69declare dso_local spir_func noundef float @_Z16__spirv_ocl_fabsf(float noundef)
70