xref: /llvm-project/llvm/test/CodeGen/SPARC/fp128-select.ll (revision ac16ea89dbcfc362c6bef841ab543df08bf9e6ec)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=sparcv9 -verify-machineinstrs < %s | FileCheck %s --check-prefix=V9
3
4define fp128 @f128_select_soft(fp128 %a, fp128 %b) #0 {
5; V9-LABEL: f128_select_soft:
6; V9:         .cfi_startproc
7; V9-NEXT:  ! %bb.0: ! %entry
8; V9-NEXT:    add %sp, -144, %sp
9; V9-NEXT:    .cfi_def_cfa_register %fp
10; V9-NEXT:    .cfi_window_save
11; V9-NEXT:    .cfi_register %o7, %i7
12; V9-NEXT:    add %sp, 2175, %o0
13; V9-NEXT:    or %o0, 8, %o0
14; V9-NEXT:    std %f6, [%o0]
15; V9-NEXT:    std %f4, [%sp+2175]
16; V9-NEXT:    ldx [%o0], %o0
17; V9-NEXT:    ldx [%sp+2175], %o1
18; V9-NEXT:    sethi 0, %o2
19; V9-NEXT:    or %o2, 0, %o2
20; V9-NEXT:    sethi 2097152, %o3
21; V9-NEXT:    or %o3, 0, %o3
22; V9-NEXT:    sllx %o3, 32, %o3
23; V9-NEXT:    or %o3, %o2, %o2
24; V9-NEXT:    xor %o1, %o2, %o1
25; V9-NEXT:    or %o0, %o1, %o0
26; V9-NEXT:    cmp %o0, 0
27; V9-NEXT:    bne %xcc, .LBB0_2
28; V9-NEXT:    nop
29; V9-NEXT:  ! %bb.1:
30; V9-NEXT:    sethi %h44(.LCPI0_0), %o0
31; V9-NEXT:    add %o0, %m44(.LCPI0_0), %o0
32; V9-NEXT:    sllx %o0, 12, %o0
33; V9-NEXT:    ldd [%o0+%l44(.LCPI0_0)], %f0
34; V9-NEXT:    add %o0, %l44(.LCPI0_0), %o0
35; V9-NEXT:    ldd [%o0+8], %f2
36; V9-NEXT:  .LBB0_2: ! %entry
37; V9-NEXT:    retl
38; V9-NEXT:    add %sp, 144, %sp
39entry:
40  %0 = bitcast fp128 %b to i128
41  %xor.i = xor i128 %0, 0
42  %cmp19.i = icmp eq i128 %xor.i, -170141183460469231731687303715884105728
43  %spec.select277.i = select i1 %cmp19.i, fp128 0xL00000000000000007FFF800000000000, fp128 %a
44  ret fp128 %spec.select277.i
45}
46
47define fp128 @f128_select_hard(fp128 %a, fp128 %b) #1 {
48; V9-LABEL: f128_select_hard:
49; V9:         .cfi_startproc
50; V9-NEXT:  ! %bb.0: ! %entry
51; V9-NEXT:    add %sp, -144, %sp
52; V9-NEXT:    .cfi_def_cfa_register %fp
53; V9-NEXT:    .cfi_window_save
54; V9-NEXT:    .cfi_register %o7, %i7
55; V9-NEXT:    stq %f4, [%sp+2175]
56; V9-NEXT:    add %sp, 2175, %o0
57; V9-NEXT:    or %o0, 8, %o0
58; V9-NEXT:    ldx [%o0], %o0
59; V9-NEXT:    ldx [%sp+2175], %o1
60; V9-NEXT:    sethi 0, %o2
61; V9-NEXT:    or %o2, 0, %o2
62; V9-NEXT:    sethi %h44(.LCPI1_0), %o3
63; V9-NEXT:    add %o3, %m44(.LCPI1_0), %o3
64; V9-NEXT:    sllx %o3, 12, %o3
65; V9-NEXT:    ldq [%o3+%l44(.LCPI1_0)], %f4
66; V9-NEXT:    sethi 2097152, %o3
67; V9-NEXT:    or %o3, 0, %o3
68; V9-NEXT:    sllx %o3, 32, %o3
69; V9-NEXT:    or %o3, %o2, %o2
70; V9-NEXT:    xor %o1, %o2, %o1
71; V9-NEXT:    or %o0, %o1, %o0
72; V9-NEXT:    fmovrqz %o0, %f4, %f0
73; V9-NEXT:    retl
74; V9-NEXT:    add %sp, 144, %sp
75entry:
76  %0 = bitcast fp128 %b to i128
77  %xor.i = xor i128 %0, 0
78  %cmp19.i = icmp eq i128 %xor.i, -170141183460469231731687303715884105728
79  %spec.select277.i = select i1 %cmp19.i, fp128 0xL00000000000000007FFF800000000000, fp128 %a
80  ret fp128 %spec.select277.i
81}
82
83attributes #0 = { "target-features"="-hard-quad-float" }
84attributes #1 = { "target-features"="+hard-quad-float" }
85