xref: /llvm-project/llvm/test/CodeGen/RISCV/zmmul.ll (revision 3198364e6e4943512ed48f2a1c1ab4c418b72f42)
1; RUN: llc -mtriple=riscv32 -mattr=+zmmul -verify-machineinstrs < %s \
2; RUN:  | not FileCheck -check-prefix=CHECK-DIV %s
3; RUN: llc -mtriple=riscv64 -mattr=+zmmul -verify-machineinstrs < %s \
4; RUN:  | not FileCheck -check-prefix=CHECK-DIV %s
5; RUN: llc -mtriple=riscv32 -mattr=+zmmul -verify-machineinstrs < %s \
6; RUN:  | not FileCheck -check-prefix=CHECK-REM %s
7; RUN: llc -mtriple=riscv64 -mattr=+zmmul -verify-machineinstrs < %s \
8; RUN:  | not FileCheck -check-prefix=CHECK-REM %s
9
10; RUN: llc -mtriple=riscv32 -mattr=+zmmul -verify-machineinstrs < %s \
11; RUN:  | not FileCheck -check-prefix=CHECK-UDIV %s
12; RUN: llc -mtriple=riscv64 -mattr=+zmmul -verify-machineinstrs < %s \
13; RUN:  | not FileCheck -check-prefix=CHECK-UDIV %s
14; RUN: llc -mtriple=riscv32 -mattr=+zmmul -verify-machineinstrs < %s \
15; RUN:  | not FileCheck -check-prefix=CHECK-UREM %s
16; RUN: llc -mtriple=riscv64 -mattr=+zmmul -verify-machineinstrs < %s \
17; RUN:  | not FileCheck -check-prefix=CHECK-UREM %s
18
19; RUN: llc -mtriple=riscv32 -mattr=+zmmul -verify-machineinstrs < %s \
20; RUN:  | FileCheck -check-prefix=CHECK-MUL %s
21; RUN: llc -mtriple=riscv64 -mattr=+zmmul -verify-machineinstrs < %s \
22; RUN:  | FileCheck -check-prefix=CHECK-MUL %s
23
24; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \
25; RUN:  | FileCheck -check-prefixes=CHECK-MUL,CHECK-UDIV,CHECK-DIV,CHECK-UREM,CHECK-REM %s
26; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \
27; RUN:  | FileCheck -check-prefixes=CHECK-MUL,CHECK-UDIV,CHECK-DIV,CHECK-UREM,CHECK-REM %s
28
29define i32 @foo(i32 %a, i32 %b) {
30; CHECK-UDIV: divu{{w?}} {{[as]}}{{[0-9]}}, {{[as]}}{{[0-9]}}, {{[as]}}{{[0-9]}}
31  %1 = udiv i32 %a, %b
32; CHECK-DIV: div{{w?}} {{[as]}}{{[0-9]}}, {{[as]}}{{[0-9]}}, {{[as]}}{{[0-9]}}
33  %2 = sdiv i32 %a, %1
34; CHECK-MUL: mul{{w?}} {{[as]}}{{[0-9]}}, {{[as]}}{{[0-9]}}, {{[as]}}{{[0-9]}}
35  %3 = mul i32 %b, %2
36; CHECK-UREM: remu{{w?}} {{[as]}}{{[0-9]}}, {{[as]}}{{[0-9]}}, {{[as]}}{{[0-9]}}
37  %4 = urem i32 %3, %b
38; CHECK-REM: rem{{w?}} {{[as]}}{{[0-9]}}, {{[as]}}{{[0-9]}}, {{[as]}}{{[0-9]}}
39  %5 = srem i32 %4, %a
40  ret i32 %5
41}
42