1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc < %s -mtriple=riscv32 -mattr=+zdinx | FileCheck %s 3 4; This test previously asserted because TailMerge created a PseudoRV32ZdinxSD 5; with 2 memoperands which RISCVExpandPseudo could not handle. 6 7define i32 @foo(double %x, ptr %y, i64 %0, i64 %1, i1 %cmp6.not, ptr %arrayidx13, ptr %arrayidx20) { 8; CHECK-LABEL: foo: 9; CHECK: # %bb.0: # %entry 10; CHECK-NEXT: andi a0, a7, 1 11; CHECK-NEXT: beqz a0, .LBB0_2 12; CHECK-NEXT: # %bb.1: # %if.else 13; CHECK-NEXT: lw a0, 4(sp) 14; CHECK-NEXT: j .LBB0_3 15; CHECK-NEXT: .LBB0_2: # %if.then7 16; CHECK-NEXT: lw a0, 0(sp) 17; CHECK-NEXT: .LBB0_3: # %common.ret 18; CHECK-NEXT: fcvt.d.w a2, zero 19; CHECK-NEXT: sw a2, 0(a0) 20; CHECK-NEXT: sw a3, 4(a0) 21; CHECK-NEXT: li a0, 0 22; CHECK-NEXT: ret 23entry: 24 br i1 %cmp6.not, label %if.else, label %if.then7 25 26common.ret: ; preds = %if.else, %if.then7 27 ret i32 0 28 29if.then7: ; preds = %entry 30 store double 0.000000e+00, ptr %arrayidx13, align 8 31 br label %common.ret 32 33if.else: ; preds = %entry 34 store double 0.000000e+00, ptr %arrayidx20, align 8 35 br label %common.ret 36} 37 38