xref: /llvm-project/llvm/test/CodeGen/RISCV/zcb-regalloc-hints.ll (revision d360963aaa90710752d684035404db80c3dc1645)
1*d360963aSCraig Topper; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2*d360963aSCraig Topper; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zba,+zbb,+zcb | FileCheck %s
3*d360963aSCraig Topper
4*d360963aSCraig Topperdefine i64 @c_not(i64 %x, i64 %y, i64 %z) {
5*d360963aSCraig Topper; CHECK-LABEL: c_not:
6*d360963aSCraig Topper; CHECK:       # %bb.0:
7*d360963aSCraig Topper; CHECK-NEXT:    not a1, a1
8*d360963aSCraig Topper; CHECK-NEXT:    li a0, 1234
9*d360963aSCraig Topper; CHECK-NEXT:    mul a0, a0, a1
10*d360963aSCraig Topper; CHECK-NEXT:    ret
11*d360963aSCraig Topper  %a = xor i64 %y, -1
12*d360963aSCraig Topper  %b = mul i64 %a, 1234
13*d360963aSCraig Topper  ret i64 %b
14*d360963aSCraig Topper}
15*d360963aSCraig Topper
16*d360963aSCraig Topperdefine i64 @c_mul(i64 %x, i64 %y, i64 %z, i64 %w) {
17*d360963aSCraig Topper; CHECK-LABEL: c_mul:
18*d360963aSCraig Topper; CHECK:       # %bb.0:
19*d360963aSCraig Topper; CHECK-NEXT:    mul a1, a1, a2
20*d360963aSCraig Topper; CHECK-NEXT:    lui a0, 1
21*d360963aSCraig Topper; CHECK-NEXT:    or a0, a0, a1
22*d360963aSCraig Topper; CHECK-NEXT:    ret
23*d360963aSCraig Topper  %a = mul i64 %y, %z
24*d360963aSCraig Topper  %b = or i64 %a, 4096
25*d360963aSCraig Topper  ret i64 %b
26*d360963aSCraig Topper}
27*d360963aSCraig Topper
28*d360963aSCraig Topperdefine i64 @c_sext_b(i64 %x, i8 %y, i64 %z) {
29*d360963aSCraig Topper; CHECK-LABEL: c_sext_b:
30*d360963aSCraig Topper; CHECK:       # %bb.0:
31*d360963aSCraig Topper; CHECK-NEXT:    sext.b a1, a1
32*d360963aSCraig Topper; CHECK-NEXT:    lui a0, 1
33*d360963aSCraig Topper; CHECK-NEXT:    or a0, a0, a1
34*d360963aSCraig Topper; CHECK-NEXT:    ret
35*d360963aSCraig Topper  %a = sext i8 %y to i64
36*d360963aSCraig Topper  %b = or i64 %a, 4096
37*d360963aSCraig Topper  ret i64 %b
38*d360963aSCraig Topper}
39*d360963aSCraig Topper
40*d360963aSCraig Topperdefine i64 @c_sext_h(i64 %x, i16 %y, i64 %z) {
41*d360963aSCraig Topper; CHECK-LABEL: c_sext_h:
42*d360963aSCraig Topper; CHECK:       # %bb.0:
43*d360963aSCraig Topper; CHECK-NEXT:    sext.h a1, a1
44*d360963aSCraig Topper; CHECK-NEXT:    lui a0, 1
45*d360963aSCraig Topper; CHECK-NEXT:    or a0, a0, a1
46*d360963aSCraig Topper; CHECK-NEXT:    ret
47*d360963aSCraig Topper  %a = sext i16 %y to i64
48*d360963aSCraig Topper  %b = or i64 %a, 4096
49*d360963aSCraig Topper  ret i64 %b
50*d360963aSCraig Topper}
51*d360963aSCraig Topper
52*d360963aSCraig Topperdefine i64 @c_zext_b(i64 %x, i8 %y, i64 %z) {
53*d360963aSCraig Topper; CHECK-LABEL: c_zext_b:
54*d360963aSCraig Topper; CHECK:       # %bb.0:
55*d360963aSCraig Topper; CHECK-NEXT:    andi a1, a1, 255
56*d360963aSCraig Topper; CHECK-NEXT:    lui a0, 1
57*d360963aSCraig Topper; CHECK-NEXT:    or a0, a0, a1
58*d360963aSCraig Topper; CHECK-NEXT:    ret
59*d360963aSCraig Topper  %a = zext i8 %y to i64
60*d360963aSCraig Topper  %b = or i64 %a, 4096
61*d360963aSCraig Topper  ret i64 %b
62*d360963aSCraig Topper}
63*d360963aSCraig Topper
64*d360963aSCraig Topperdefine i64 @c_zext_h(i64 %x, i16 %y) {
65*d360963aSCraig Topper; CHECK-LABEL: c_zext_h:
66*d360963aSCraig Topper; CHECK:       # %bb.0:
67*d360963aSCraig Topper; CHECK-NEXT:    zext.h a1, a1
68*d360963aSCraig Topper; CHECK-NEXT:    lui a0, 4096
69*d360963aSCraig Topper; CHECK-NEXT:    or a0, a0, a1
70*d360963aSCraig Topper; CHECK-NEXT:    ret
71*d360963aSCraig Topper  %a = zext i16 %y to i64
72*d360963aSCraig Topper  %b = or i64 %a, 16777216
73*d360963aSCraig Topper  ret i64 %b
74*d360963aSCraig Topper}
75*d360963aSCraig Topper
76*d360963aSCraig Topperdefine i64 @c_zext_w(i64 %x, i32 %y) {
77*d360963aSCraig Topper; CHECK-LABEL: c_zext_w:
78*d360963aSCraig Topper; CHECK:       # %bb.0:
79*d360963aSCraig Topper; CHECK-NEXT:    zext.w a1, a1
80*d360963aSCraig Topper; CHECK-NEXT:    li a0, 1234
81*d360963aSCraig Topper; CHECK-NEXT:    mul a0, a0, a1
82*d360963aSCraig Topper; CHECK-NEXT:    ret
83*d360963aSCraig Topper  %a = zext i32 %y to i64
84*d360963aSCraig Topper  %b = mul i64 %a, 1234
85*d360963aSCraig Topper  ret i64 %b
86*d360963aSCraig Topper}
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