xref: /llvm-project/llvm/test/CodeGen/RISCV/xcvmem-heuristic.ll (revision f590963db836ccbf7c547a3dea9dc719f24444d1)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -O3 -mtriple=riscv32 -mattr=+m,+xcvmem -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s --check-prefixes=CHECK
4
5define i32 @test_heuristic(ptr %b, i32 %e, i1 %0) {
6; CHECK-LABEL: test_heuristic:
7; CHECK:       # %bb.0: # %entry
8; CHECK-NEXT:    add a3, a0, a1
9; CHECK-NEXT:    andi a2, a2, 1
10; CHECK-NEXT:  .LBB0_1: # %loop
11; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
12; CHECK-NEXT:    cv.lbu a1, (a3), 1
13; CHECK-NEXT:    addi a0, a0, 1
14; CHECK-NEXT:    beqz a2, .LBB0_1
15; CHECK-NEXT:  # %bb.2: # %exit
16; CHECK-NEXT:    mv a0, a1
17; CHECK-NEXT:    ret
18entry:
19  %1 = getelementptr i8, ptr %b, i32 %e
20  br label %loop
21
22loop:                                             ; preds = %loop, %entry
23  %2 = phi ptr [ %b, %entry ], [ %7, %loop ]
24  %3 = phi ptr [ %1, %entry ], [ %8, %loop ]
25  %4 = load i8, ptr %2, align 1
26  %5 = load i8, ptr %3, align 1
27  %6 = zext i8 %5 to i32
28  %7 = getelementptr i8, ptr %2, i32 1
29  %8 = getelementptr i8, ptr %3, i32 1
30  br i1 %0, label %exit, label %loop
31
32exit:                                             ; preds = %loop
33  ret i32 %6
34}
35