xref: /llvm-project/llvm/test/CodeGen/RISCV/xcvbitmanip.ll (revision 3eaed9e6f574f59d76389c055b047ef5c50afb8a)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -O0 -mtriple=riscv32 -mattr=+xcvbitmanip -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s --check-prefixes=CHECK,CHECK-O0
4; RUN: llc -O3 -mtriple=riscv32 -mattr=+xcvbitmanip -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s --check-prefixes=CHECK,CHECK-O3
6
7declare i32 @llvm.riscv.cv.bitmanip.extract(i32, i32)
8
9define i32 @test.cv.extractr(i32 %a, i32 %b) {
10; CHECK-LABEL: test.cv.extractr:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    cv.extractr a0, a0, a1
13; CHECK-NEXT:    ret
14  %1 = call i32 @llvm.riscv.cv.bitmanip.extract(i32 %a, i32 %b)
15  ret i32 %1
16}
17
18define i32 @test.cv.extract(i32 %a) {
19; CHECK-LABEL: test.cv.extract:
20; CHECK:       # %bb.0:
21; CHECK-NEXT:    cv.extract a0, a0, 2, 1
22; CHECK-NEXT:    ret
23  %1 = call i32 @llvm.riscv.cv.bitmanip.extract(i32 %a, i32 65)
24  ret i32 %1
25}
26
27define i32 @test.cv.extract1023(i32 %a) {
28; CHECK-LABEL: test.cv.extract1023:
29; CHECK:       # %bb.0:
30; CHECK-NEXT:    cv.extract a0, a0, 31, 31
31; CHECK-NEXT:    ret
32  %1 = call i32 @llvm.riscv.cv.bitmanip.extract(i32 %a, i32 1023)
33  ret i32 %1
34}
35
36declare i32 @llvm.riscv.cv.bitmanip.extractu(i32, i32)
37
38define i32 @test.cv.extractur(i32 %a, i32 %b) {
39; CHECK-LABEL: test.cv.extractur:
40; CHECK:       # %bb.0:
41; CHECK-NEXT:    cv.extractur a0, a0, a1
42; CHECK-NEXT:    ret
43  %1 = call i32 @llvm.riscv.cv.bitmanip.extractu(i32 %a, i32 %b)
44  ret i32 %1
45}
46
47define i32 @test.cv.extractu(i32 %a) {
48; CHECK-LABEL: test.cv.extractu:
49; CHECK:       # %bb.0:
50; CHECK-NEXT:    cv.extractu a0, a0, 2, 1
51; CHECK-NEXT:    ret
52  %1 = call i32 @llvm.riscv.cv.bitmanip.extractu(i32 %a, i32 65)
53  ret i32 %1
54}
55
56declare i32 @llvm.riscv.cv.bitmanip.insert(i32, i32, i32)
57
58define i32 @test.cv.insert(i32 %c, i32 %a) {
59; CHECK-LABEL: test.cv.insert:
60; CHECK:       # %bb.0:
61; CHECK-NEXT:    cv.insert a0, a1, 2, 1
62; CHECK-NEXT:    ret
63  %1 = call i32 @llvm.riscv.cv.bitmanip.insert(i32 %a, i32 65, i32 %c)
64  ret i32 %1
65}
66
67define i32 @test.cv.insertr(i32 %c, i32 %b, i32 %a) {
68; CHECK-LABEL: test.cv.insertr:
69; CHECK:       # %bb.0:
70; CHECK-NEXT:    cv.insertr a0, a2, a1
71; CHECK-NEXT:    ret
72  %1 = call i32 @llvm.riscv.cv.bitmanip.insert(i32 %a, i32 %b, i32 %c)
73  ret i32 %1
74}
75
76declare i32 @llvm.riscv.cv.bitmanip.bclr(i32, i32)
77
78define i32 @test.cv.bclrr(i32 %a, i32 %b) {
79; CHECK-LABEL: test.cv.bclrr:
80; CHECK:       # %bb.0:
81; CHECK-NEXT:    cv.bclrr a0, a0, a1
82; CHECK-NEXT:    ret
83  %1 = call i32 @llvm.riscv.cv.bitmanip.bclr(i32 %a, i32 %b)
84  ret i32 %1
85}
86
87define i32 @test.cv.bclr(i32 %a) {
88; CHECK-LABEL: test.cv.bclr:
89; CHECK:       # %bb.0:
90; CHECK-NEXT:    cv.bclr a0, a0, 2, 1
91; CHECK-NEXT:    ret
92  %1 = call i32 @llvm.riscv.cv.bitmanip.bclr(i32 %a, i32 65)
93  ret i32 %1
94}
95
96declare i32 @llvm.riscv.cv.bitmanip.bset(i32, i32)
97
98define i32 @test.cv.bsetr(i32 %a, i32 %b) {
99; CHECK-LABEL: test.cv.bsetr:
100; CHECK:       # %bb.0:
101; CHECK-NEXT:    cv.bsetr a0, a0, a1
102; CHECK-NEXT:    ret
103  %1 = call i32 @llvm.riscv.cv.bitmanip.bset(i32 %a, i32 %b)
104  ret i32 %1
105}
106
107define i32 @test.cv.bset(i32 %a) {
108; CHECK-LABEL: test.cv.bset:
109; CHECK:       # %bb.0:
110; CHECK-NEXT:    cv.bset a0, a0, 2, 1
111; CHECK-NEXT:    ret
112  %1 = call i32 @llvm.riscv.cv.bitmanip.bset(i32 %a, i32 65)
113  ret i32 %1
114}
115
116declare i32 @llvm.cttz.i32(i32, i1)
117
118define i32 @test.cv.ff1(i32 %a) {
119; CHECK-LABEL: test.cv.ff1:
120; CHECK:       # %bb.0:
121; CHECK-NEXT:    cv.ff1 a0, a0
122; CHECK-NEXT:    ret
123  %1 = call i32 @llvm.cttz.i32(i32 %a, i1 0)
124  ret i32 %1
125}
126
127declare i32 @llvm.ctlz.i32(i32, i1)
128
129define i32 @test.cv.fl1(i32 %a) {
130; CHECK-LABEL: test.cv.fl1:
131; CHECK:       # %bb.0:
132; CHECK-NEXT:    cv.fl1 a0, a0
133; CHECK-NEXT:    ret
134  %1 = call i32 @llvm.ctlz.i32(i32 %a, i1 0)
135  ret i32 %1
136}
137
138declare i32 @llvm.riscv.cv.bitmanip.clb(i32)
139
140define i32 @test.cv.clb(i32 %a) {
141; CHECK-LABEL: test.cv.clb:
142; CHECK:       # %bb.0:
143; CHECK-NEXT:    cv.clb a0, a0
144; CHECK-NEXT:    ret
145  %1 = call i32 @llvm.riscv.cv.bitmanip.clb(i32 %a)
146  ret i32 %1
147}
148
149declare i32 @llvm.ctpop(i32)
150
151define i32 @test.cv.cnt(i32 %a) {
152; CHECK-LABEL: test.cv.cnt:
153; CHECK:       # %bb.0:
154; CHECK-NEXT:    cv.cnt a0, a0
155; CHECK-NEXT:    ret
156  %1 = call i32 @llvm.ctpop(i32 %a)
157  ret i32 %1
158}
159
160declare i32 @llvm.fshl.i32(i32, i32, i32)
161
162define i32 @test.llvm.fshl.imm(i32 %a) {
163; CHECK-LABEL: test.llvm.fshl.imm:
164; CHECK:       # %bb.0:
165; CHECK-NEXT:    li a1, 30
166; CHECK-NEXT:    cv.ror a0, a0, a1
167; CHECK-NEXT:    ret
168  %1 = call i32 @llvm.fshl.i32(i32 %a, i32 %a, i32 2)
169  ret i32 %1
170}
171
172define i32 @test.llvm.fshl.reg(i32 %a, i32 %b) {
173; CHECK-O0-LABEL: test.llvm.fshl.reg:
174; CHECK-O0:       # %bb.0:
175; CHECK-O0-NEXT:    mv a2, a1
176; CHECK-O0-NEXT:    li a1, 0
177; CHECK-O0-NEXT:    sub a1, a1, a2
178; CHECK-O0-NEXT:    cv.ror a0, a0, a1
179; CHECK-O0-NEXT:    ret
180;
181; CHECK-O3-LABEL: test.llvm.fshl.reg:
182; CHECK-O3:       # %bb.0:
183; CHECK-O3-NEXT:    neg a1, a1
184; CHECK-O3-NEXT:    cv.ror a0, a0, a1
185; CHECK-O3-NEXT:    ret
186  %1 = call i32 @llvm.fshl.i32(i32 %a, i32 %a, i32 %b)
187  ret i32 %1
188}
189
190declare i32 @llvm.fshr.i32(i32, i32, i32)
191
192define i32 @test.llvm.fshr.imm(i32 %a) {
193; CHECK-LABEL: test.llvm.fshr.imm:
194; CHECK:       # %bb.0:
195; CHECK-NEXT:    li a1, 2
196; CHECK-NEXT:    cv.ror a0, a0, a1
197; CHECK-NEXT:    ret
198  %1 = call i32 @llvm.fshr.i32(i32 %a, i32 %a, i32 2)
199  ret i32 %1
200}
201
202define i32 @test.llvm.fshr.reg(i32 %a, i32 %b) {
203; CHECK-LABEL: test.llvm.fshr.reg:
204; CHECK:       # %bb.0:
205; CHECK-NEXT:    cv.ror a0, a0, a1
206; CHECK-NEXT:    ret
207  %1 = call i32 @llvm.fshr.i32(i32 %a, i32 %a, i32 %b)
208  ret i32 %1
209}
210
211declare i32 @llvm.riscv.cv.bitmanip.bitrev(i32, i32, i32)
212
213define i32 @test.cv.bitrev(i32 %a) {
214; CHECK-LABEL: test.cv.bitrev:
215; CHECK:       # %bb.0:
216; CHECK-NEXT:    cv.bitrev a0, a0, 2, 1
217; CHECK-NEXT:    ret
218  %1 = call i32 @llvm.riscv.cv.bitmanip.bitrev(i32 %a, i32 1, i32 2)
219  ret i32 %1
220}
221
222declare i32 @llvm.bitreverse(i32)
223
224define i32 @test.llvm.bitrev(i32 %a) {
225; CHECK-LABEL: test.llvm.bitrev:
226; CHECK:       # %bb.0:
227; CHECK-NEXT:    cv.bitrev a0, a0, 0, 0
228; CHECK-NEXT:    ret
229  %1 = call i32 @llvm.bitreverse(i32 %a)
230  ret i32 %1
231}
232