xref: /llvm-project/llvm/test/CodeGen/RISCV/xcvalu.ll (revision 00128a20eec27246719d73ba427bf821883b00b4) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -O0 -mtriple=riscv32 -mattr=+m -mattr=+xcvalu -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s
4
5declare i32 @llvm.abs.i32(i32, i1)
6declare i32 @llvm.smin.i32(i32, i32)
7declare i32 @llvm.smax.i32(i32, i32)
8declare i32 @llvm.umin.i32(i32, i32)
9declare i32 @llvm.umax.i32(i32, i32)
10
11define i32 @abs(i32 %a) {
12; CHECK-LABEL: abs:
13; CHECK:       # %bb.0:
14; CHECK-NEXT:    cv.abs a0, a0
15; CHECK-NEXT:    ret
16  %1 = call i32 @llvm.abs.i32(i32 %a, i1 false)
17  ret i32 %1
18}
19
20define i1 @slet(i32 %a, i32 %b) {
21; CHECK-LABEL: slet:
22; CHECK:       # %bb.0:
23; CHECK-NEXT:    cv.sle a0, a0, a1
24; CHECK-NEXT:    ret
25  %1 = icmp sle i32 %a, %b
26  ret i1 %1
27}
28
29define i1 @sletu(i32 %a, i32 %b) {
30; CHECK-LABEL: sletu:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    cv.sleu a0, a0, a1
33; CHECK-NEXT:    ret
34  %1 = icmp ule i32 %a, %b
35  ret i1 %1
36}
37
38define i32 @smin(i32 %a, i32 %b) {
39; CHECK-LABEL: smin:
40; CHECK:       # %bb.0:
41; CHECK-NEXT:    cv.min a0, a0, a1
42; CHECK-NEXT:    ret
43  %1 = call i32 @llvm.smin.i32(i32 %a, i32 %b)
44  ret i32 %1
45}
46
47define i32 @umin(i32 %a, i32 %b) {
48; CHECK-LABEL: umin:
49; CHECK:       # %bb.0:
50; CHECK-NEXT:    cv.minu a0, a0, a1
51; CHECK-NEXT:    ret
52  %1 = call i32 @llvm.umin.i32(i32 %a, i32 %b)
53  ret i32 %1
54}
55
56define i32 @smax(i32 %a, i32 %b) {
57; CHECK-LABEL: smax:
58; CHECK:       # %bb.0:
59; CHECK-NEXT:    cv.max a0, a0, a1
60; CHECK-NEXT:    ret
61  %1 = call i32 @llvm.smax.i32(i32 %a, i32 %b)
62  ret i32 %1
63}
64
65define i32 @umax(i32 %a, i32 %b) {
66; CHECK-LABEL: umax:
67; CHECK:       # %bb.0:
68; CHECK-NEXT:    cv.maxu a0, a0, a1
69; CHECK-NEXT:    ret
70  %1 = call i32 @llvm.umax.i32(i32 %a, i32 %b)
71  ret i32 %1
72}
73
74define i32 @exths(i16 %a) {
75; CHECK-LABEL: exths:
76; CHECK:       # %bb.0:
77; CHECK-NEXT:    # kill: def $x11 killed $x10
78; CHECK-NEXT:    cv.exths a0, a0
79; CHECK-NEXT:    ret
80  %1 = sext i16 %a to i32
81  ret i32 %1
82}
83
84define i32 @exthz(i16 %a) {
85; CHECK-LABEL: exthz:
86; CHECK:       # %bb.0:
87; CHECK-NEXT:    # kill: def $x11 killed $x10
88; CHECK-NEXT:    cv.exthz a0, a0
89; CHECK-NEXT:    ret
90  %1 = zext i16 %a to i32
91  ret i32 %1
92}
93
94define i32 @extbs(i8 %a) {
95; CHECK-LABEL: extbs:
96; CHECK:       # %bb.0:
97; CHECK-NEXT:    # kill: def $x11 killed $x10
98; CHECK-NEXT:    cv.extbs a0, a0
99; CHECK-NEXT:    ret
100  %1 = sext i8 %a to i32
101  ret i32 %1
102}
103
104define i32 @extbz(i8 %a) {
105; CHECK-LABEL: extbz:
106; CHECK:       # %bb.0:
107; CHECK-NEXT:    # kill: def $x11 killed $x10
108; CHECK-NEXT:    cv.extbz a0, a0
109; CHECK-NEXT:    ret
110  %1 = zext i8 %a to i32
111  ret i32 %1
112}
113
114declare i32 @llvm.riscv.cv.alu.clip(i32, i32)
115
116define i32 @test.cv.alu.clip.case.a(i32 %a) {
117; CHECK-LABEL: test.cv.alu.clip.case.a:
118; CHECK:       # %bb.0:
119; CHECK-NEXT:    cv.clip a0, a0, 5
120; CHECK-NEXT:    ret
121  %1 = call i32 @llvm.riscv.cv.alu.clip(i32 %a, i32 15)
122  ret i32 %1
123}
124
125define i32 @test.cv.alu.clip.case.b(i32 %a) {
126; CHECK-LABEL: test.cv.alu.clip.case.b:
127; CHECK:       # %bb.0:
128; CHECK-NEXT:    li a1, 10
129; CHECK-NEXT:    cv.clipr a0, a0, a1
130; CHECK-NEXT:    ret
131  %1 = call i32 @llvm.riscv.cv.alu.clip(i32 %a, i32 10)
132  ret i32 %1
133}
134
135declare i32 @llvm.riscv.cv.alu.clipu(i32, i32)
136
137define i32 @test.cv.alu.clipu.case.a(i32 %a) {
138; CHECK-LABEL: test.cv.alu.clipu.case.a:
139; CHECK:       # %bb.0:
140; CHECK-NEXT:    cv.clipu a0, a0, 9
141; CHECK-NEXT:    ret
142  %1 = call i32 @llvm.riscv.cv.alu.clipu(i32 %a, i32 255)
143  ret i32 %1
144}
145
146define i32 @test.cv.alu.clipu.case.b(i32 %a) {
147; CHECK-LABEL: test.cv.alu.clipu.case.b:
148; CHECK:       # %bb.0:
149; CHECK-NEXT:    li a1, 200
150; CHECK-NEXT:    cv.clipur a0, a0, a1
151; CHECK-NEXT:    ret
152  %1 = call i32 @llvm.riscv.cv.alu.clipu(i32 %a, i32 200)
153  ret i32 %1
154}
155
156declare i32 @llvm.riscv.cv.alu.addN(i32, i32, i32)
157
158define i32 @test.cv.alu.addN.case.a(i32 %a, i32 %b) {
159; CHECK-LABEL: test.cv.alu.addN.case.a:
160; CHECK:       # %bb.0:
161; CHECK-NEXT:    cv.addn a0, a0, a1, 15
162; CHECK-NEXT:    ret
163  %1 = call i32 @llvm.riscv.cv.alu.addN(i32 %a, i32 %b, i32 15)
164  ret i32 %1
165}
166
167define i32 @test.cv.alu.addN.case.b(i32 %a, i32 %b) {
168; CHECK-LABEL: test.cv.alu.addN.case.b:
169; CHECK:       # %bb.0:
170; CHECK-NEXT:    li a2, 32
171; CHECK-NEXT:    cv.addnr a0, a1, a2
172; CHECK-NEXT:    ret
173  %1 = call i32 @llvm.riscv.cv.alu.addN(i32 %a, i32 %b, i32 32)
174  ret i32 %1
175}
176
177declare i32 @llvm.riscv.cv.alu.adduN(i32, i32, i32)
178
179define i32 @test.cv.alu.adduN.case.a(i32 %a, i32 %b) {
180; CHECK-LABEL: test.cv.alu.adduN.case.a:
181; CHECK:       # %bb.0:
182; CHECK-NEXT:    cv.addun a0, a0, a1, 15
183; CHECK-NEXT:    ret
184  %1 = call i32 @llvm.riscv.cv.alu.adduN(i32 %a, i32 %b, i32 15)
185  ret i32 %1
186}
187
188define i32 @test.cv.alu.adduN.case.b(i32 %a, i32 %b) {
189; CHECK-LABEL: test.cv.alu.adduN.case.b:
190; CHECK:       # %bb.0:
191; CHECK-NEXT:    li a2, 32
192; CHECK-NEXT:    cv.addunr a0, a1, a2
193; CHECK-NEXT:    ret
194  %1 = call i32 @llvm.riscv.cv.alu.adduN(i32 %a, i32 %b, i32 32)
195  ret i32 %1
196}
197
198declare i32 @llvm.riscv.cv.alu.addRN(i32, i32, i32)
199
200define i32 @test.cv.alu.addRN.case.a(i32 %a, i32 %b) {
201; CHECK-LABEL: test.cv.alu.addRN.case.a:
202; CHECK:       # %bb.0:
203; CHECK-NEXT:    cv.addrn a0, a0, a1, 15
204; CHECK-NEXT:    ret
205  %1 = call i32 @llvm.riscv.cv.alu.addRN(i32 %a, i32 %b, i32 15)
206  ret i32 %1
207}
208
209define i32 @test.cv.alu.addRN.case.b(i32 %a, i32 %b) {
210; CHECK-LABEL: test.cv.alu.addRN.case.b:
211; CHECK:       # %bb.0:
212; CHECK-NEXT:    li a2, 32
213; CHECK-NEXT:    cv.addrnr a0, a1, a2
214; CHECK-NEXT:    ret
215  %1 = call i32 @llvm.riscv.cv.alu.addRN(i32 %a, i32 %b, i32 32)
216  ret i32 %1
217}
218
219declare i32 @llvm.riscv.cv.alu.adduRN(i32, i32, i32)
220
221define i32 @test.cv.alu.adduRN.case.a(i32 %a, i32 %b) {
222; CHECK-LABEL: test.cv.alu.adduRN.case.a:
223; CHECK:       # %bb.0:
224; CHECK-NEXT:    cv.addurn a0, a0, a1, 15
225; CHECK-NEXT:    ret
226  %1 = call i32 @llvm.riscv.cv.alu.adduRN(i32 %a, i32 %b, i32 15)
227  ret i32 %1
228}
229
230define i32 @test.cv.alu.adduRN.case.b(i32 %a, i32 %b) {
231; CHECK-LABEL: test.cv.alu.adduRN.case.b:
232; CHECK:       # %bb.0:
233; CHECK-NEXT:    li a2, 32
234; CHECK-NEXT:    cv.addurnr a0, a1, a2
235; CHECK-NEXT:    ret
236  %1 = call i32 @llvm.riscv.cv.alu.adduRN(i32 %a, i32 %b, i32 32)
237  ret i32 %1
238}
239
240declare i32 @llvm.riscv.cv.alu.subN(i32, i32, i32)
241
242define i32 @test.cv.alu.subN.case.a(i32 %a, i32 %b) {
243; CHECK-LABEL: test.cv.alu.subN.case.a:
244; CHECK:       # %bb.0:
245; CHECK-NEXT:    cv.subn a0, a0, a1, 15
246; CHECK-NEXT:    ret
247  %1 = call i32 @llvm.riscv.cv.alu.subN(i32 %a, i32 %b, i32 15)
248  ret i32 %1
249}
250
251define i32 @test.cv.alu.subN.case.b(i32 %a, i32 %b) {
252; CHECK-LABEL: test.cv.alu.subN.case.b:
253; CHECK:       # %bb.0:
254; CHECK-NEXT:    li a2, 32
255; CHECK-NEXT:    cv.subnr a0, a1, a2
256; CHECK-NEXT:    ret
257  %1 = call i32 @llvm.riscv.cv.alu.subN(i32 %a, i32 %b, i32 32)
258  ret i32 %1
259}
260
261declare i32 @llvm.riscv.cv.alu.subuN(i32, i32, i32)
262
263define i32 @test.cv.alu.subuN.case.a(i32 %a, i32 %b) {
264; CHECK-LABEL: test.cv.alu.subuN.case.a:
265; CHECK:       # %bb.0:
266; CHECK-NEXT:    cv.subun a0, a0, a1, 15
267; CHECK-NEXT:    ret
268  %1 = call i32 @llvm.riscv.cv.alu.subuN(i32 %a, i32 %b, i32 15)
269  ret i32 %1
270}
271
272define i32 @test.cv.alu.subuN.case.b(i32 %a, i32 %b) {
273; CHECK-LABEL: test.cv.alu.subuN.case.b:
274; CHECK:       # %bb.0:
275; CHECK-NEXT:    li a2, 32
276; CHECK-NEXT:    cv.subunr a0, a1, a2
277; CHECK-NEXT:    ret
278  %1 = call i32 @llvm.riscv.cv.alu.subuN(i32 %a, i32 %b, i32 32)
279  ret i32 %1
280}
281
282declare i32 @llvm.riscv.cv.alu.subRN(i32, i32, i32)
283
284define i32 @test.cv.alu.subRN.case.a(i32 %a, i32 %b) {
285; CHECK-LABEL: test.cv.alu.subRN.case.a:
286; CHECK:       # %bb.0:
287; CHECK-NEXT:    cv.subrn a0, a0, a1, 15
288; CHECK-NEXT:    ret
289  %1 = call i32 @llvm.riscv.cv.alu.subRN(i32 %a, i32 %b, i32 15)
290  ret i32 %1
291}
292
293define i32 @test.cv.alu.subRN.case.b(i32 %a, i32 %b) {
294; CHECK-LABEL: test.cv.alu.subRN.case.b:
295; CHECK:       # %bb.0:
296; CHECK-NEXT:    li a2, 32
297; CHECK-NEXT:    cv.subrnr a0, a1, a2
298; CHECK-NEXT:    ret
299  %1 = call i32 @llvm.riscv.cv.alu.subRN(i32 %a, i32 %b, i32 32)
300  ret i32 %1
301}
302
303declare i32 @llvm.riscv.cv.alu.subuRN(i32, i32, i32)
304
305define i32 @test.cv.alu.subuRN.case.a(i32 %a, i32 %b) {
306; CHECK-LABEL: test.cv.alu.subuRN.case.a:
307; CHECK:       # %bb.0:
308; CHECK-NEXT:    cv.suburn a0, a0, a1, 15
309; CHECK-NEXT:    ret
310  %1 = call i32 @llvm.riscv.cv.alu.subuRN(i32 %a, i32 %b, i32 15)
311  ret i32 %1
312}
313
314define i32 @test.cv.alu.subuRN.case.b(i32 %a, i32 %b) {
315; CHECK-LABEL: test.cv.alu.subuRN.case.b:
316; CHECK:       # %bb.0:
317; CHECK-NEXT:    li a2, 32
318; CHECK-NEXT:    cv.suburnr a0, a1, a2
319; CHECK-NEXT:    ret
320  %1 = call i32 @llvm.riscv.cv.alu.subuRN(i32 %a, i32 %b, i32 32)
321  ret i32 %1
322}
323