xref: /llvm-project/llvm/test/CodeGen/RISCV/vscale-demanded-bits.ll (revision 95d2d1cba0e1428718bbdce0504292f62b212920)
1a4f437f0SCraig Topper; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2a4f437f0SCraig Topper; RUN: llc -mtriple riscv64 -mattr +v -filetype asm -o - %s | FileCheck %s
3a4f437f0SCraig Topper
4a4f437f0SCraig Topperdeclare i8 @llvm.vscale.i8()
5*95d2d1cbSMaciej Gabkadeclare <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
6a4f437f0SCraig Topper
7a4f437f0SCraig Topperdefine <vscale x 8 x i8> @f() #0 {
8a4f437f0SCraig Topper; CHECK-LABEL: f:
9a4f437f0SCraig Topper; CHECK:       # %bb.0: # %entry
10a4f437f0SCraig Topper; CHECK-NEXT:    csrr a0, vlenb
11a4f437f0SCraig Topper; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, ma
12a4f437f0SCraig Topper; CHECK-NEXT:    vid.v v8
13a4f437f0SCraig Topper; CHECK-NEXT:    vadd.vx v8, v8, a0
14a4f437f0SCraig Topper; CHECK-NEXT:    ret
15a4f437f0SCraig Topperentry:
16a4f437f0SCraig Topper  %0 = tail call i8 @llvm.vscale.i8()
17a4f437f0SCraig Topper  %1 = shl i8 %0, 3
18a4f437f0SCraig Topper  %.splat.insert = insertelement <vscale x 8 x i8> poison, i8 %1, i64 0
19a4f437f0SCraig Topper  %.splat = shufflevector <vscale x 8 x i8> %.splat.insert, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
20*95d2d1cbSMaciej Gabka  %2 = tail call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
21a4f437f0SCraig Topper  %3 = add <vscale x 8 x i8> %2, %.splat
22a4f437f0SCraig Topper  ret <vscale x 8 x i8> %3
23a4f437f0SCraig Topper}
24a4f437f0SCraig Topper
25a4f437f0SCraig Topperattributes #0 = { vscale_range(2,1024) }
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