xref: /llvm-project/llvm/test/CodeGen/RISCV/vector-abi.ll (revision 360996ac5ad26714a6ddbee45730fbcfb7dc3eea)
1; RUN: llc -mtriple=riscv32 -stop-after finalize-isel < %s | FileCheck %s -check-prefix=RV32
2; RUN: llc -mtriple=riscv64 -stop-after finalize-isel < %s | FileCheck %s -check-prefix=RV64
3
4declare void @callee(<4 x i8> %v)
5
6define void @caller() {
7  ; RV32-LABEL: name: caller
8  ; RV32: stack:
9  ; RV32:     - { id: 0, name: '', type: default, offset: 0, size: 16, alignment: 4,
10  ; RV32-NEXT:    stack-id: default, callee-saved-register: '', callee-saved-restored: true,
11  ; RV32-NEXT:    debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
12  ; RV32: bb.0 (%ir-block.0):
13  ; RV32:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
14  ; RV32:   [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 7
15  ; RV32:   SW killed [[ADDI]], %stack.0, 12 :: (store (s32) into %stack.0)
16  ; RV32:   [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 6
17  ; RV32:   SW killed [[ADDI1]], %stack.0, 8 :: (store (s32) into %stack.0)
18  ; RV32:   [[ADDI2:%[0-9]+]]:gpr = ADDI $x0, 5
19  ; RV32:   SW killed [[ADDI2]], %stack.0, 4 :: (store (s32) into %stack.0)
20  ; RV32:   [[ADDI3:%[0-9]+]]:gpr = ADDI $x0, 4
21  ; RV32:   SW killed [[ADDI3]], %stack.0, 0 :: (store (s32) into %stack.0)
22  ; RV32:   [[ADDI4:%[0-9]+]]:gpr = ADDI %stack.0, 0
23  ; RV32:   $x10 = COPY [[ADDI4]]
24  ; RV32:   PseudoCALL target-flags(riscv-call) @callee, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
25  ; RV32:   ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
26  ; RV32:   PseudoRET
27  ; RV64-LABEL: name: caller
28  ; RV64: stack:
29  ; RV64:     - { id: 0, name: '', type: default, offset: 0, size: 32, alignment: 8,
30  ; RV64-NEXT:    stack-id: default, callee-saved-register: '', callee-saved-restored: true,
31  ; RV64-NEXT:    debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
32  ; RV64: bb.0 (%ir-block.0):
33  ; RV64:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
34  ; RV64:   [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 7
35  ; RV64:   SD killed [[ADDI]], %stack.0, 24 :: (store (s64) into %stack.0)
36  ; RV64:   [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 6
37  ; RV64:   SD killed [[ADDI1]], %stack.0, 16 :: (store (s64) into %stack.0)
38  ; RV64:   [[ADDI2:%[0-9]+]]:gpr = ADDI $x0, 5
39  ; RV64:   SD killed [[ADDI2]], %stack.0, 8 :: (store (s64) into %stack.0)
40  ; RV64:   [[ADDI3:%[0-9]+]]:gpr = ADDI $x0, 4
41  ; RV64:   SD killed [[ADDI3]], %stack.0, 0 :: (store (s64) into %stack.0)
42  ; RV64:   [[ADDI4:%[0-9]+]]:gpr = ADDI %stack.0, 0
43  ; RV64:   $x10 = COPY [[ADDI4]]
44  ; RV64:   PseudoCALL target-flags(riscv-call) @callee, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
45  ; RV64:   ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
46  ; RV64:   PseudoRET
47  call void @callee(<4 x i8> <i8 4, i8 5, i8 6, i8 7>)
48  ret void
49}
50