1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ 3; RUN: | FileCheck -check-prefixes=ALL,SLOW,SLOWBASE,RV32I %s 4; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ 5; RUN: | FileCheck -check-prefixes=ALL,SLOW,SLOWBASE,RV64I %s 6; RUN: llc -mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs < %s \ 7; RUN: | FileCheck -check-prefixes=ALL,SLOW,SLOWZBKB,RV32IZBKB %s 8; RUN: llc -mtriple=riscv64 -mattr=+zbkb -verify-machineinstrs < %s \ 9; RUN: | FileCheck -check-prefixes=ALL,SLOW,SLOWZBKB,RV64IZBKB %s 10; RUN: llc -mtriple=riscv32 -mattr=+unaligned-scalar-mem -verify-machineinstrs < %s \ 11; RUN: | FileCheck -check-prefixes=ALL,FAST,RV32I-FAST %s 12; RUN: llc -mtriple=riscv64 -mattr=+unaligned-scalar-mem -verify-machineinstrs < %s \ 13; RUN: | FileCheck -check-prefixes=ALL,FAST,RV64I-FAST %s 14 15; A collection of cases showing codegen for unaligned loads and stores 16 17define i8 @load_i8(ptr %p) { 18; ALL-LABEL: load_i8: 19; ALL: # %bb.0: 20; ALL-NEXT: lbu a0, 0(a0) 21; ALL-NEXT: ret 22 %res = load i8, ptr %p, align 1 23 ret i8 %res 24} 25 26define i16 @load_i16(ptr %p) { 27; SLOW-LABEL: load_i16: 28; SLOW: # %bb.0: 29; SLOW-NEXT: lbu a1, 1(a0) 30; SLOW-NEXT: lbu a0, 0(a0) 31; SLOW-NEXT: slli a1, a1, 8 32; SLOW-NEXT: or a0, a1, a0 33; SLOW-NEXT: ret 34; 35; FAST-LABEL: load_i16: 36; FAST: # %bb.0: 37; FAST-NEXT: lh a0, 0(a0) 38; FAST-NEXT: ret 39 %res = load i16, ptr %p, align 1 40 ret i16 %res 41} 42 43define i24 @load_i24(ptr %p) { 44; SLOWBASE-LABEL: load_i24: 45; SLOWBASE: # %bb.0: 46; SLOWBASE-NEXT: lbu a1, 1(a0) 47; SLOWBASE-NEXT: lbu a2, 0(a0) 48; SLOWBASE-NEXT: lbu a0, 2(a0) 49; SLOWBASE-NEXT: slli a1, a1, 8 50; SLOWBASE-NEXT: or a1, a1, a2 51; SLOWBASE-NEXT: slli a0, a0, 16 52; SLOWBASE-NEXT: or a0, a1, a0 53; SLOWBASE-NEXT: ret 54; 55; RV32IZBKB-LABEL: load_i24: 56; RV32IZBKB: # %bb.0: 57; RV32IZBKB-NEXT: lbu a1, 0(a0) 58; RV32IZBKB-NEXT: lbu a2, 1(a0) 59; RV32IZBKB-NEXT: lbu a0, 2(a0) 60; RV32IZBKB-NEXT: packh a1, a1, a2 61; RV32IZBKB-NEXT: pack a0, a1, a0 62; RV32IZBKB-NEXT: ret 63; 64; RV64IZBKB-LABEL: load_i24: 65; RV64IZBKB: # %bb.0: 66; RV64IZBKB-NEXT: lbu a1, 0(a0) 67; RV64IZBKB-NEXT: lbu a2, 1(a0) 68; RV64IZBKB-NEXT: lbu a0, 2(a0) 69; RV64IZBKB-NEXT: packh a1, a1, a2 70; RV64IZBKB-NEXT: slli a0, a0, 16 71; RV64IZBKB-NEXT: or a0, a1, a0 72; RV64IZBKB-NEXT: ret 73; 74; FAST-LABEL: load_i24: 75; FAST: # %bb.0: 76; FAST-NEXT: lbu a1, 2(a0) 77; FAST-NEXT: lhu a0, 0(a0) 78; FAST-NEXT: slli a1, a1, 16 79; FAST-NEXT: or a0, a0, a1 80; FAST-NEXT: ret 81 %res = load i24, ptr %p, align 1 82 ret i24 %res 83} 84 85define i32 @load_i32(ptr %p) { 86; SLOWBASE-LABEL: load_i32: 87; SLOWBASE: # %bb.0: 88; SLOWBASE-NEXT: lbu a1, 1(a0) 89; SLOWBASE-NEXT: lbu a2, 0(a0) 90; SLOWBASE-NEXT: lbu a3, 2(a0) 91; SLOWBASE-NEXT: lbu a0, 3(a0) 92; SLOWBASE-NEXT: slli a1, a1, 8 93; SLOWBASE-NEXT: or a1, a1, a2 94; SLOWBASE-NEXT: slli a3, a3, 16 95; SLOWBASE-NEXT: slli a0, a0, 24 96; SLOWBASE-NEXT: or a0, a0, a3 97; SLOWBASE-NEXT: or a0, a0, a1 98; SLOWBASE-NEXT: ret 99; 100; RV32IZBKB-LABEL: load_i32: 101; RV32IZBKB: # %bb.0: 102; RV32IZBKB-NEXT: lbu a1, 1(a0) 103; RV32IZBKB-NEXT: lbu a2, 2(a0) 104; RV32IZBKB-NEXT: lbu a3, 3(a0) 105; RV32IZBKB-NEXT: lbu a0, 0(a0) 106; RV32IZBKB-NEXT: packh a2, a2, a3 107; RV32IZBKB-NEXT: packh a0, a0, a1 108; RV32IZBKB-NEXT: pack a0, a0, a2 109; RV32IZBKB-NEXT: ret 110; 111; RV64IZBKB-LABEL: load_i32: 112; RV64IZBKB: # %bb.0: 113; RV64IZBKB-NEXT: lbu a1, 0(a0) 114; RV64IZBKB-NEXT: lbu a2, 1(a0) 115; RV64IZBKB-NEXT: lbu a3, 2(a0) 116; RV64IZBKB-NEXT: lbu a0, 3(a0) 117; RV64IZBKB-NEXT: packh a1, a1, a2 118; RV64IZBKB-NEXT: slli a3, a3, 16 119; RV64IZBKB-NEXT: slli a0, a0, 24 120; RV64IZBKB-NEXT: or a0, a0, a3 121; RV64IZBKB-NEXT: or a0, a0, a1 122; RV64IZBKB-NEXT: ret 123; 124; FAST-LABEL: load_i32: 125; FAST: # %bb.0: 126; FAST-NEXT: lw a0, 0(a0) 127; FAST-NEXT: ret 128 %res = load i32, ptr %p, align 1 129 ret i32 %res 130} 131 132define i64 @load_i64(ptr %p) { 133; RV32I-LABEL: load_i64: 134; RV32I: # %bb.0: 135; RV32I-NEXT: lbu a1, 1(a0) 136; RV32I-NEXT: lbu a2, 2(a0) 137; RV32I-NEXT: lbu a3, 3(a0) 138; RV32I-NEXT: lbu a4, 0(a0) 139; RV32I-NEXT: slli a1, a1, 8 140; RV32I-NEXT: slli a2, a2, 16 141; RV32I-NEXT: slli a3, a3, 24 142; RV32I-NEXT: or a1, a1, a4 143; RV32I-NEXT: lbu a4, 4(a0) 144; RV32I-NEXT: lbu a5, 5(a0) 145; RV32I-NEXT: or a2, a3, a2 146; RV32I-NEXT: lbu a3, 6(a0) 147; RV32I-NEXT: lbu a0, 7(a0) 148; RV32I-NEXT: slli a5, a5, 8 149; RV32I-NEXT: or a4, a5, a4 150; RV32I-NEXT: slli a3, a3, 16 151; RV32I-NEXT: slli a0, a0, 24 152; RV32I-NEXT: or a3, a0, a3 153; RV32I-NEXT: or a0, a2, a1 154; RV32I-NEXT: or a1, a3, a4 155; RV32I-NEXT: ret 156; 157; RV64I-LABEL: load_i64: 158; RV64I: # %bb.0: 159; RV64I-NEXT: lbu a1, 1(a0) 160; RV64I-NEXT: lbu a2, 2(a0) 161; RV64I-NEXT: lbu a3, 3(a0) 162; RV64I-NEXT: lbu a4, 0(a0) 163; RV64I-NEXT: slli a1, a1, 8 164; RV64I-NEXT: slli a2, a2, 16 165; RV64I-NEXT: slli a3, a3, 24 166; RV64I-NEXT: or a1, a1, a4 167; RV64I-NEXT: lbu a4, 4(a0) 168; RV64I-NEXT: lbu a5, 5(a0) 169; RV64I-NEXT: or a2, a3, a2 170; RV64I-NEXT: lbu a3, 6(a0) 171; RV64I-NEXT: lbu a0, 7(a0) 172; RV64I-NEXT: slli a5, a5, 8 173; RV64I-NEXT: or a4, a5, a4 174; RV64I-NEXT: slli a3, a3, 16 175; RV64I-NEXT: slli a0, a0, 24 176; RV64I-NEXT: or a0, a0, a3 177; RV64I-NEXT: or a1, a2, a1 178; RV64I-NEXT: or a0, a0, a4 179; RV64I-NEXT: slli a0, a0, 32 180; RV64I-NEXT: or a0, a0, a1 181; RV64I-NEXT: ret 182; 183; RV32IZBKB-LABEL: load_i64: 184; RV32IZBKB: # %bb.0: 185; RV32IZBKB-NEXT: lbu a1, 0(a0) 186; RV32IZBKB-NEXT: lbu a2, 1(a0) 187; RV32IZBKB-NEXT: lbu a3, 2(a0) 188; RV32IZBKB-NEXT: lbu a4, 3(a0) 189; RV32IZBKB-NEXT: lbu a5, 5(a0) 190; RV32IZBKB-NEXT: lbu a6, 6(a0) 191; RV32IZBKB-NEXT: lbu a7, 7(a0) 192; RV32IZBKB-NEXT: lbu a0, 4(a0) 193; RV32IZBKB-NEXT: packh a3, a3, a4 194; RV32IZBKB-NEXT: packh a1, a1, a2 195; RV32IZBKB-NEXT: packh a2, a6, a7 196; RV32IZBKB-NEXT: packh a4, a0, a5 197; RV32IZBKB-NEXT: pack a0, a1, a3 198; RV32IZBKB-NEXT: pack a1, a4, a2 199; RV32IZBKB-NEXT: ret 200; 201; RV64IZBKB-LABEL: load_i64: 202; RV64IZBKB: # %bb.0: 203; RV64IZBKB-NEXT: lbu a1, 4(a0) 204; RV64IZBKB-NEXT: lbu a2, 5(a0) 205; RV64IZBKB-NEXT: lbu a3, 6(a0) 206; RV64IZBKB-NEXT: lbu a4, 7(a0) 207; RV64IZBKB-NEXT: lbu a5, 0(a0) 208; RV64IZBKB-NEXT: lbu a6, 1(a0) 209; RV64IZBKB-NEXT: lbu a7, 2(a0) 210; RV64IZBKB-NEXT: lbu a0, 3(a0) 211; RV64IZBKB-NEXT: packh a1, a1, a2 212; RV64IZBKB-NEXT: packh a2, a3, a4 213; RV64IZBKB-NEXT: packh a3, a5, a6 214; RV64IZBKB-NEXT: packh a0, a7, a0 215; RV64IZBKB-NEXT: slli a2, a2, 16 216; RV64IZBKB-NEXT: slli a0, a0, 16 217; RV64IZBKB-NEXT: or a1, a2, a1 218; RV64IZBKB-NEXT: or a0, a0, a3 219; RV64IZBKB-NEXT: pack a0, a0, a1 220; RV64IZBKB-NEXT: ret 221; 222; RV32I-FAST-LABEL: load_i64: 223; RV32I-FAST: # %bb.0: 224; RV32I-FAST-NEXT: lw a2, 0(a0) 225; RV32I-FAST-NEXT: lw a1, 4(a0) 226; RV32I-FAST-NEXT: mv a0, a2 227; RV32I-FAST-NEXT: ret 228; 229; RV64I-FAST-LABEL: load_i64: 230; RV64I-FAST: # %bb.0: 231; RV64I-FAST-NEXT: ld a0, 0(a0) 232; RV64I-FAST-NEXT: ret 233 %res = load i64, ptr %p, align 1 234 ret i64 %res 235} 236 237define void @store_i8(ptr %p, i8 %v) { 238; ALL-LABEL: store_i8: 239; ALL: # %bb.0: 240; ALL-NEXT: sb a1, 0(a0) 241; ALL-NEXT: ret 242 store i8 %v, ptr %p, align 1 243 ret void 244} 245 246define void @store_i16(ptr %p, i16 %v) { 247; SLOW-LABEL: store_i16: 248; SLOW: # %bb.0: 249; SLOW-NEXT: srli a2, a1, 8 250; SLOW-NEXT: sb a1, 0(a0) 251; SLOW-NEXT: sb a2, 1(a0) 252; SLOW-NEXT: ret 253; 254; FAST-LABEL: store_i16: 255; FAST: # %bb.0: 256; FAST-NEXT: sh a1, 0(a0) 257; FAST-NEXT: ret 258 store i16 %v, ptr %p, align 1 259 ret void 260} 261 262define void @store_i24(ptr %p, i24 %v) { 263; SLOW-LABEL: store_i24: 264; SLOW: # %bb.0: 265; SLOW-NEXT: srli a2, a1, 8 266; SLOW-NEXT: srli a3, a1, 16 267; SLOW-NEXT: sb a1, 0(a0) 268; SLOW-NEXT: sb a2, 1(a0) 269; SLOW-NEXT: sb a3, 2(a0) 270; SLOW-NEXT: ret 271; 272; FAST-LABEL: store_i24: 273; FAST: # %bb.0: 274; FAST-NEXT: srli a2, a1, 16 275; FAST-NEXT: sh a1, 0(a0) 276; FAST-NEXT: sb a2, 2(a0) 277; FAST-NEXT: ret 278 store i24 %v, ptr %p, align 1 279 ret void 280} 281 282define void @store_i32(ptr %p, i32 %v) { 283; SLOW-LABEL: store_i32: 284; SLOW: # %bb.0: 285; SLOW-NEXT: srli a2, a1, 24 286; SLOW-NEXT: srli a3, a1, 16 287; SLOW-NEXT: srli a4, a1, 8 288; SLOW-NEXT: sb a1, 0(a0) 289; SLOW-NEXT: sb a4, 1(a0) 290; SLOW-NEXT: sb a3, 2(a0) 291; SLOW-NEXT: sb a2, 3(a0) 292; SLOW-NEXT: ret 293; 294; FAST-LABEL: store_i32: 295; FAST: # %bb.0: 296; FAST-NEXT: sw a1, 0(a0) 297; FAST-NEXT: ret 298 store i32 %v, ptr %p, align 1 299 ret void 300} 301 302define void @store_i64(ptr %p, i64 %v) { 303; RV32I-LABEL: store_i64: 304; RV32I: # %bb.0: 305; RV32I-NEXT: srli a3, a2, 24 306; RV32I-NEXT: srli a4, a2, 16 307; RV32I-NEXT: srli a5, a2, 8 308; RV32I-NEXT: srli a6, a1, 24 309; RV32I-NEXT: srli a7, a1, 16 310; RV32I-NEXT: sb a2, 4(a0) 311; RV32I-NEXT: sb a5, 5(a0) 312; RV32I-NEXT: sb a4, 6(a0) 313; RV32I-NEXT: sb a3, 7(a0) 314; RV32I-NEXT: srli a2, a1, 8 315; RV32I-NEXT: sb a1, 0(a0) 316; RV32I-NEXT: sb a2, 1(a0) 317; RV32I-NEXT: sb a7, 2(a0) 318; RV32I-NEXT: sb a6, 3(a0) 319; RV32I-NEXT: ret 320; 321; RV64I-LABEL: store_i64: 322; RV64I: # %bb.0: 323; RV64I-NEXT: srli a2, a1, 56 324; RV64I-NEXT: srli a3, a1, 48 325; RV64I-NEXT: srli a4, a1, 40 326; RV64I-NEXT: srli a5, a1, 32 327; RV64I-NEXT: srli a6, a1, 24 328; RV64I-NEXT: srli a7, a1, 16 329; RV64I-NEXT: sb a5, 4(a0) 330; RV64I-NEXT: sb a4, 5(a0) 331; RV64I-NEXT: sb a3, 6(a0) 332; RV64I-NEXT: sb a2, 7(a0) 333; RV64I-NEXT: srli a2, a1, 8 334; RV64I-NEXT: sb a1, 0(a0) 335; RV64I-NEXT: sb a2, 1(a0) 336; RV64I-NEXT: sb a7, 2(a0) 337; RV64I-NEXT: sb a6, 3(a0) 338; RV64I-NEXT: ret 339; 340; RV32IZBKB-LABEL: store_i64: 341; RV32IZBKB: # %bb.0: 342; RV32IZBKB-NEXT: srli a3, a2, 24 343; RV32IZBKB-NEXT: srli a4, a2, 16 344; RV32IZBKB-NEXT: srli a5, a2, 8 345; RV32IZBKB-NEXT: srli a6, a1, 24 346; RV32IZBKB-NEXT: srli a7, a1, 16 347; RV32IZBKB-NEXT: sb a2, 4(a0) 348; RV32IZBKB-NEXT: sb a5, 5(a0) 349; RV32IZBKB-NEXT: sb a4, 6(a0) 350; RV32IZBKB-NEXT: sb a3, 7(a0) 351; RV32IZBKB-NEXT: srli a2, a1, 8 352; RV32IZBKB-NEXT: sb a1, 0(a0) 353; RV32IZBKB-NEXT: sb a2, 1(a0) 354; RV32IZBKB-NEXT: sb a7, 2(a0) 355; RV32IZBKB-NEXT: sb a6, 3(a0) 356; RV32IZBKB-NEXT: ret 357; 358; RV64IZBKB-LABEL: store_i64: 359; RV64IZBKB: # %bb.0: 360; RV64IZBKB-NEXT: srli a2, a1, 56 361; RV64IZBKB-NEXT: srli a3, a1, 48 362; RV64IZBKB-NEXT: srli a4, a1, 40 363; RV64IZBKB-NEXT: srli a5, a1, 32 364; RV64IZBKB-NEXT: srli a6, a1, 24 365; RV64IZBKB-NEXT: srli a7, a1, 16 366; RV64IZBKB-NEXT: sb a5, 4(a0) 367; RV64IZBKB-NEXT: sb a4, 5(a0) 368; RV64IZBKB-NEXT: sb a3, 6(a0) 369; RV64IZBKB-NEXT: sb a2, 7(a0) 370; RV64IZBKB-NEXT: srli a2, a1, 8 371; RV64IZBKB-NEXT: sb a1, 0(a0) 372; RV64IZBKB-NEXT: sb a2, 1(a0) 373; RV64IZBKB-NEXT: sb a7, 2(a0) 374; RV64IZBKB-NEXT: sb a6, 3(a0) 375; RV64IZBKB-NEXT: ret 376; 377; RV32I-FAST-LABEL: store_i64: 378; RV32I-FAST: # %bb.0: 379; RV32I-FAST-NEXT: sw a1, 0(a0) 380; RV32I-FAST-NEXT: sw a2, 4(a0) 381; RV32I-FAST-NEXT: ret 382; 383; RV64I-FAST-LABEL: store_i64: 384; RV64I-FAST: # %bb.0: 385; RV64I-FAST-NEXT: sd a1, 0(a0) 386; RV64I-FAST-NEXT: ret 387 store i64 %v, ptr %p, align 1 388 ret void 389} 390 391define void @merge_stores_i8_i16(ptr %p) { 392; SLOW-LABEL: merge_stores_i8_i16: 393; SLOW: # %bb.0: 394; SLOW-NEXT: sb zero, 0(a0) 395; SLOW-NEXT: sb zero, 1(a0) 396; SLOW-NEXT: ret 397; 398; FAST-LABEL: merge_stores_i8_i16: 399; FAST: # %bb.0: 400; FAST-NEXT: sh zero, 0(a0) 401; FAST-NEXT: ret 402 store i8 0, ptr %p 403 %p2 = getelementptr i8, ptr %p, i32 1 404 store i8 0, ptr %p2 405 ret void 406} 407 408define void @merge_stores_i8_i32(ptr %p) { 409; SLOW-LABEL: merge_stores_i8_i32: 410; SLOW: # %bb.0: 411; SLOW-NEXT: sb zero, 0(a0) 412; SLOW-NEXT: sb zero, 1(a0) 413; SLOW-NEXT: sb zero, 2(a0) 414; SLOW-NEXT: sb zero, 3(a0) 415; SLOW-NEXT: ret 416; 417; FAST-LABEL: merge_stores_i8_i32: 418; FAST: # %bb.0: 419; FAST-NEXT: sw zero, 0(a0) 420; FAST-NEXT: ret 421 store i8 0, ptr %p 422 %p2 = getelementptr i8, ptr %p, i32 1 423 store i8 0, ptr %p2 424 %p3 = getelementptr i8, ptr %p, i32 2 425 store i8 0, ptr %p3 426 %p4 = getelementptr i8, ptr %p, i32 3 427 store i8 0, ptr %p4 428 ret void 429} 430 431define void @merge_stores_i8_i64(ptr %p) { 432; SLOW-LABEL: merge_stores_i8_i64: 433; SLOW: # %bb.0: 434; SLOW-NEXT: sb zero, 0(a0) 435; SLOW-NEXT: sb zero, 1(a0) 436; SLOW-NEXT: sb zero, 2(a0) 437; SLOW-NEXT: sb zero, 3(a0) 438; SLOW-NEXT: sb zero, 4(a0) 439; SLOW-NEXT: sb zero, 5(a0) 440; SLOW-NEXT: sb zero, 6(a0) 441; SLOW-NEXT: sb zero, 7(a0) 442; SLOW-NEXT: ret 443; 444; RV32I-FAST-LABEL: merge_stores_i8_i64: 445; RV32I-FAST: # %bb.0: 446; RV32I-FAST-NEXT: sw zero, 0(a0) 447; RV32I-FAST-NEXT: sw zero, 4(a0) 448; RV32I-FAST-NEXT: ret 449; 450; RV64I-FAST-LABEL: merge_stores_i8_i64: 451; RV64I-FAST: # %bb.0: 452; RV64I-FAST-NEXT: sd zero, 0(a0) 453; RV64I-FAST-NEXT: ret 454 store i8 0, ptr %p 455 %p2 = getelementptr i8, ptr %p, i32 1 456 store i8 0, ptr %p2 457 %p3 = getelementptr i8, ptr %p, i32 2 458 store i8 0, ptr %p3 459 %p4 = getelementptr i8, ptr %p, i32 3 460 store i8 0, ptr %p4 461 %p5 = getelementptr i8, ptr %p, i32 4 462 store i8 0, ptr %p5 463 %p6 = getelementptr i8, ptr %p, i32 5 464 store i8 0, ptr %p6 465 %p7 = getelementptr i8, ptr %p, i32 6 466 store i8 0, ptr %p7 467 %p8 = getelementptr i8, ptr %p, i32 7 468 store i8 0, ptr %p8 469 ret void 470} 471 472define void @merge_stores_i16_i32(ptr %p) { 473; SLOW-LABEL: merge_stores_i16_i32: 474; SLOW: # %bb.0: 475; SLOW-NEXT: sh zero, 0(a0) 476; SLOW-NEXT: sh zero, 2(a0) 477; SLOW-NEXT: ret 478; 479; FAST-LABEL: merge_stores_i16_i32: 480; FAST: # %bb.0: 481; FAST-NEXT: sw zero, 0(a0) 482; FAST-NEXT: ret 483 store i16 0, ptr %p 484 %p2 = getelementptr i16, ptr %p, i32 1 485 store i16 0, ptr %p2 486 ret void 487} 488 489define void @merge_stores_i16_i64(ptr %p) { 490; SLOW-LABEL: merge_stores_i16_i64: 491; SLOW: # %bb.0: 492; SLOW-NEXT: sh zero, 0(a0) 493; SLOW-NEXT: sh zero, 2(a0) 494; SLOW-NEXT: sh zero, 4(a0) 495; SLOW-NEXT: sh zero, 6(a0) 496; SLOW-NEXT: ret 497; 498; RV32I-FAST-LABEL: merge_stores_i16_i64: 499; RV32I-FAST: # %bb.0: 500; RV32I-FAST-NEXT: sw zero, 0(a0) 501; RV32I-FAST-NEXT: sw zero, 4(a0) 502; RV32I-FAST-NEXT: ret 503; 504; RV64I-FAST-LABEL: merge_stores_i16_i64: 505; RV64I-FAST: # %bb.0: 506; RV64I-FAST-NEXT: sd zero, 0(a0) 507; RV64I-FAST-NEXT: ret 508 store i16 0, ptr %p 509 %p2 = getelementptr i16, ptr %p, i32 1 510 store i16 0, ptr %p2 511 %p3 = getelementptr i16, ptr %p, i32 2 512 store i16 0, ptr %p3 513 %p4 = getelementptr i16, ptr %p, i32 3 514 store i16 0, ptr %p4 515 ret void 516} 517 518define void @merge_stores_i32_i64(ptr %p) { 519; SLOW-LABEL: merge_stores_i32_i64: 520; SLOW: # %bb.0: 521; SLOW-NEXT: sw zero, 0(a0) 522; SLOW-NEXT: sw zero, 4(a0) 523; SLOW-NEXT: ret 524; 525; RV32I-FAST-LABEL: merge_stores_i32_i64: 526; RV32I-FAST: # %bb.0: 527; RV32I-FAST-NEXT: sw zero, 0(a0) 528; RV32I-FAST-NEXT: sw zero, 4(a0) 529; RV32I-FAST-NEXT: ret 530; 531; RV64I-FAST-LABEL: merge_stores_i32_i64: 532; RV64I-FAST: # %bb.0: 533; RV64I-FAST-NEXT: sd zero, 0(a0) 534; RV64I-FAST-NEXT: ret 535 store i32 0, ptr %p 536 %p2 = getelementptr i32, ptr %p, i32 1 537 store i32 0, ptr %p2 538 ret void 539} 540 541define void @store_large_constant(ptr %x) { 542; SLOW-LABEL: store_large_constant: 543; SLOW: # %bb.0: 544; SLOW-NEXT: li a1, -2 545; SLOW-NEXT: li a2, 220 546; SLOW-NEXT: li a3, 186 547; SLOW-NEXT: li a4, 152 548; SLOW-NEXT: li a5, 118 549; SLOW-NEXT: li a6, 84 550; SLOW-NEXT: li a7, 50 551; SLOW-NEXT: sb a4, 4(a0) 552; SLOW-NEXT: sb a3, 5(a0) 553; SLOW-NEXT: sb a2, 6(a0) 554; SLOW-NEXT: sb a1, 7(a0) 555; SLOW-NEXT: li a1, 16 556; SLOW-NEXT: sb a1, 0(a0) 557; SLOW-NEXT: sb a7, 1(a0) 558; SLOW-NEXT: sb a6, 2(a0) 559; SLOW-NEXT: sb a5, 3(a0) 560; SLOW-NEXT: ret 561; 562; RV32I-FAST-LABEL: store_large_constant: 563; RV32I-FAST: # %bb.0: 564; RV32I-FAST-NEXT: lui a1, 1043916 565; RV32I-FAST-NEXT: lui a2, 484675 566; RV32I-FAST-NEXT: addi a1, a1, -1384 567; RV32I-FAST-NEXT: addi a2, a2, 528 568; RV32I-FAST-NEXT: sw a2, 0(a0) 569; RV32I-FAST-NEXT: sw a1, 4(a0) 570; RV32I-FAST-NEXT: ret 571; 572; RV64I-FAST-LABEL: store_large_constant: 573; RV64I-FAST: # %bb.0: 574; RV64I-FAST-NEXT: lui a1, %hi(.LCPI16_0) 575; RV64I-FAST-NEXT: ld a1, %lo(.LCPI16_0)(a1) 576; RV64I-FAST-NEXT: sd a1, 0(a0) 577; RV64I-FAST-NEXT: ret 578 store i64 18364758544493064720, ptr %x, align 1 579 ret void 580} 581;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 582; SLOWZBKB: {{.*}} 583