1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+xsfvcp,+zvfh \ 3; RUN: -verify-machineinstrs | FileCheck %s 4; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+xsfvcp,+zvfh \ 5; RUN: -verify-machineinstrs | FileCheck %s 6 7define void @test_sf_vc_x_se_e8mf8(i8 zeroext %rs1, iXLen %vl) { 8; CHECK-LABEL: test_sf_vc_x_se_e8mf8: 9; CHECK: # %bb.0: # %entry 10; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma 11; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 12; CHECK-NEXT: ret 13entry: 14 tail call void @llvm.riscv.sf.vc.x.se.e8mf8.iXLen.i8.iXLen(iXLen 3, iXLen 31, iXLen 31, i8 %rs1, iXLen 8, iXLen 5, iXLen %vl) 15 ret void 16} 17 18declare void @llvm.riscv.sf.vc.x.se.e8mf8.iXLen.i8.iXLen(iXLen, iXLen, iXLen, i8, iXLen, iXLen, iXLen) 19 20define void @test_sf_vc_x_se_e8mf4(i8 zeroext %rs1, iXLen %vl) { 21; CHECK-LABEL: test_sf_vc_x_se_e8mf4: 22; CHECK: # %bb.0: # %entry 23; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma 24; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 25; CHECK-NEXT: ret 26entry: 27 tail call void @llvm.riscv.sf.vc.x.se.e8mf4.iXLen.i8.iXLen(iXLen 3, iXLen 31, iXLen 31, i8 %rs1, iXLen 8, iXLen 6, iXLen %vl) 28 ret void 29} 30 31declare void @llvm.riscv.sf.vc.x.se.e8mf4.iXLen.i8.iXLen(iXLen, iXLen, iXLen, i8, iXLen, iXLen, iXLen) 32 33define void @test_sf_vc_x_se_e8mf2(i8 zeroext %rs1, iXLen %vl) { 34; CHECK-LABEL: test_sf_vc_x_se_e8mf2: 35; CHECK: # %bb.0: # %entry 36; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma 37; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 38; CHECK-NEXT: ret 39entry: 40 tail call void @llvm.riscv.sf.vc.x.se.e8mf2.iXLen.i8.iXLen(iXLen 3, iXLen 31, iXLen 31, i8 %rs1, iXLen 8, iXLen 7, iXLen %vl) 41 ret void 42} 43 44declare void @llvm.riscv.sf.vc.x.se.e8mf2.iXLen.i8.iXLen(iXLen, iXLen, iXLen, i8, iXLen, iXLen, iXLen) 45 46define void @test_sf_vc_x_se_e8m1(i8 zeroext %rs1, iXLen %vl) { 47; CHECK-LABEL: test_sf_vc_x_se_e8m1: 48; CHECK: # %bb.0: # %entry 49; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma 50; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 51; CHECK-NEXT: ret 52entry: 53 tail call void @llvm.riscv.sf.vc.x.se.e8m1.iXLen.i8.iXLen(iXLen 3, iXLen 31, iXLen 31, i8 %rs1, iXLen 8, iXLen 0, iXLen %vl) 54 ret void 55} 56 57declare void @llvm.riscv.sf.vc.x.se.e8m1.iXLen.i8.iXLen(iXLen, iXLen, iXLen, i8, iXLen, iXLen, iXLen) 58 59define void @test_sf_vc_x_se_e8m2(i8 zeroext %rs1, iXLen %vl) { 60; CHECK-LABEL: test_sf_vc_x_se_e8m2: 61; CHECK: # %bb.0: # %entry 62; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma 63; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 64; CHECK-NEXT: ret 65entry: 66 tail call void @llvm.riscv.sf.vc.x.se.e8m2.iXLen.i8.iXLen(iXLen 3, iXLen 31, iXLen 31, i8 %rs1, iXLen 8, iXLen 1, iXLen %vl) 67 ret void 68} 69 70declare void @llvm.riscv.sf.vc.x.se.e8m2.iXLen.i8.iXLen(iXLen, iXLen, iXLen, i8, iXLen, iXLen, iXLen) 71 72define void @test_sf_vc_x_se_e8m4(i8 zeroext %rs1, iXLen %vl) { 73; CHECK-LABEL: test_sf_vc_x_se_e8m4: 74; CHECK: # %bb.0: # %entry 75; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma 76; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 77; CHECK-NEXT: ret 78entry: 79 tail call void @llvm.riscv.sf.vc.x.se.e8m4.iXLen.i8.iXLen(iXLen 3, iXLen 31, iXLen 31, i8 %rs1, iXLen 8, iXLen 2, iXLen %vl) 80 ret void 81} 82 83declare void @llvm.riscv.sf.vc.x.se.e8m4.iXLen.i8.iXLen(iXLen, iXLen, iXLen, i8, iXLen, iXLen, iXLen) 84 85define void @test_sf_vc_x_se_e8m8(i8 zeroext %rs1, iXLen %vl) { 86; CHECK-LABEL: test_sf_vc_x_se_e8m8: 87; CHECK: # %bb.0: # %entry 88; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma 89; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 90; CHECK-NEXT: ret 91entry: 92 tail call void @llvm.riscv.sf.vc.x.se.e8m8.iXLen.i8.iXLen(iXLen 3, iXLen 31, iXLen 31, i8 %rs1, iXLen 8, iXLen 3, iXLen %vl) 93 ret void 94} 95 96declare void @llvm.riscv.sf.vc.x.se.e8m8.iXLen.i8.iXLen(iXLen, iXLen, iXLen, i8, iXLen, iXLen, iXLen) 97 98define void @test_sf_vc_x_se_e16mf4(i16 zeroext %rs1, iXLen %vl) { 99; CHECK-LABEL: test_sf_vc_x_se_e16mf4: 100; CHECK: # %bb.0: # %entry 101; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma 102; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 103; CHECK-NEXT: ret 104entry: 105 tail call void @llvm.riscv.sf.vc.x.se.e16mf4.iXLen.i16.iXLen(iXLen 3, iXLen 31, iXLen 31, i16 %rs1, iXLen 16, iXLen 6, iXLen %vl) 106 ret void 107} 108 109declare void @llvm.riscv.sf.vc.x.se.e16mf4.iXLen.i16.iXLen(iXLen, iXLen, iXLen, i16, iXLen, iXLen, iXLen) 110 111define void @test_sf_vc_x_se_e16mf2(i16 zeroext %rs1, iXLen %vl) { 112; CHECK-LABEL: test_sf_vc_x_se_e16mf2: 113; CHECK: # %bb.0: # %entry 114; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma 115; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 116; CHECK-NEXT: ret 117entry: 118 tail call void @llvm.riscv.sf.vc.x.se.e16mf2.iXLen.i16.iXLen(iXLen 3, iXLen 31, iXLen 31, i16 %rs1, iXLen 16, iXLen 7, iXLen %vl) 119 ret void 120} 121 122declare void @llvm.riscv.sf.vc.x.se.e16mf2.iXLen.i16.iXLen(iXLen, iXLen, iXLen, i16, iXLen, iXLen, iXLen) 123 124define void @test_sf_vc_x_se_e16m1(i16 zeroext %rs1, iXLen %vl) { 125; CHECK-LABEL: test_sf_vc_x_se_e16m1: 126; CHECK: # %bb.0: # %entry 127; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma 128; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 129; CHECK-NEXT: ret 130entry: 131 tail call void @llvm.riscv.sf.vc.x.se.e16m1.iXLen.i16.iXLen(iXLen 3, iXLen 31, iXLen 31, i16 %rs1, iXLen 16, iXLen 0, iXLen %vl) 132 ret void 133} 134 135declare void @llvm.riscv.sf.vc.x.se.e16m1.iXLen.i16.iXLen(iXLen, iXLen, iXLen, i16, iXLen, iXLen, iXLen) 136 137define void @test_sf_vc_x_se_e16m2(i16 zeroext %rs1, iXLen %vl) { 138; CHECK-LABEL: test_sf_vc_x_se_e16m2: 139; CHECK: # %bb.0: # %entry 140; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma 141; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 142; CHECK-NEXT: ret 143entry: 144 tail call void @llvm.riscv.sf.vc.x.se.e16m2.iXLen.i16.iXLen(iXLen 3, iXLen 31, iXLen 31, i16 %rs1, iXLen 16, iXLen 1, iXLen %vl) 145 ret void 146} 147 148declare void @llvm.riscv.sf.vc.x.se.e16m2.iXLen.i16.iXLen(iXLen, iXLen, iXLen, i16, iXLen, iXLen, iXLen) 149 150define void @test_sf_vc_x_se_e16m4(i16 zeroext %rs1, iXLen %vl) { 151; CHECK-LABEL: test_sf_vc_x_se_e16m4: 152; CHECK: # %bb.0: # %entry 153; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma 154; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 155; CHECK-NEXT: ret 156entry: 157 tail call void @llvm.riscv.sf.vc.x.se.e16m4.iXLen.i16.iXLen(iXLen 3, iXLen 31, iXLen 31, i16 %rs1, iXLen 16, iXLen 2, iXLen %vl) 158 ret void 159} 160 161declare void @llvm.riscv.sf.vc.x.se.e16m4.iXLen.i16.iXLen(iXLen, iXLen, iXLen, i16, iXLen, iXLen, iXLen) 162 163define void @test_sf_vc_x_se_e16m8(i16 zeroext %rs1, iXLen %vl) { 164; CHECK-LABEL: test_sf_vc_x_se_e16m8: 165; CHECK: # %bb.0: # %entry 166; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma 167; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 168; CHECK-NEXT: ret 169entry: 170 tail call void @llvm.riscv.sf.vc.x.se.e16m8.iXLen.i16.iXLen(iXLen 3, iXLen 31, iXLen 31, i16 %rs1, iXLen 16, iXLen 3, iXLen %vl) 171 ret void 172} 173 174declare void @llvm.riscv.sf.vc.x.se.e16m8.iXLen.i16.iXLen(iXLen, iXLen, iXLen, i16, iXLen, iXLen, iXLen) 175 176define void @test_sf_vc_x_se_e32mf2(i32 signext %rs1, iXLen %vl) { 177; CHECK-LABEL: test_sf_vc_x_se_e32mf2: 178; CHECK: # %bb.0: # %entry 179; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma 180; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 181; CHECK-NEXT: ret 182entry: 183 tail call void @llvm.riscv.sf.vc.x.se.e32mf2.iXLen.i32.iXLen(iXLen 3, iXLen 31, iXLen 31, i32 %rs1, iXLen 32, iXLen 7, iXLen %vl) 184 ret void 185} 186 187declare void @llvm.riscv.sf.vc.x.se.e32mf2.iXLen.i32.iXLen(iXLen, iXLen, iXLen, i32, iXLen, iXLen, iXLen) 188 189define void @test_sf_vc_x_se_e32m1(i32 signext %rs1, iXLen %vl) { 190; CHECK-LABEL: test_sf_vc_x_se_e32m1: 191; CHECK: # %bb.0: # %entry 192; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma 193; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 194; CHECK-NEXT: ret 195entry: 196 tail call void @llvm.riscv.sf.vc.x.se.e32m1.iXLen.i32.iXLen(iXLen 3, iXLen 31, iXLen 31, i32 %rs1, iXLen 32, iXLen 0, iXLen %vl) 197 ret void 198} 199 200declare void @llvm.riscv.sf.vc.x.se.e32m1.iXLen.i32.iXLen(iXLen, iXLen, iXLen, i32, iXLen, iXLen, iXLen) 201 202define void @test_sf_vc_x_se_e32m2(i32 signext %rs1, iXLen %vl) { 203; CHECK-LABEL: test_sf_vc_x_se_e32m2: 204; CHECK: # %bb.0: # %entry 205; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma 206; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 207; CHECK-NEXT: ret 208entry: 209 tail call void @llvm.riscv.sf.vc.x.se.e32m2.iXLen.i32.iXLen(iXLen 3, iXLen 31, iXLen 31, i32 %rs1, iXLen 32, iXLen 1, iXLen %vl) 210 ret void 211} 212 213declare void @llvm.riscv.sf.vc.x.se.e32m2.iXLen.i32.iXLen(iXLen, iXLen, iXLen, i32, iXLen, iXLen, iXLen) 214 215define void @test_sf_vc_x_se_e32m4(i32 signext %rs1, iXLen %vl) { 216; CHECK-LABEL: test_sf_vc_x_se_e32m4: 217; CHECK: # %bb.0: # %entry 218; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma 219; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 220; CHECK-NEXT: ret 221entry: 222 tail call void @llvm.riscv.sf.vc.x.se.e32m4.iXLen.i32.iXLen(iXLen 3, iXLen 31, iXLen 31, i32 %rs1, iXLen 32, iXLen 2, iXLen %vl) 223 ret void 224} 225 226declare void @llvm.riscv.sf.vc.x.se.e32m4.iXLen.i32.iXLen(iXLen, iXLen, iXLen, i32, iXLen, iXLen, iXLen) 227 228define void @test_sf_vc_x_se_e32m8(i32 signext %rs1, iXLen %vl) { 229; CHECK-LABEL: test_sf_vc_x_se_e32m8: 230; CHECK: # %bb.0: # %entry 231; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma 232; CHECK-NEXT: sf.vc.x 3, 31, 31, a0 233; CHECK-NEXT: ret 234entry: 235 tail call void @llvm.riscv.sf.vc.x.se.e32m8.iXLen.i32.iXLen(iXLen 3, iXLen 31, iXLen 31, i32 %rs1, iXLen 32, iXLen 3, iXLen %vl) 236 ret void 237} 238 239declare void @llvm.riscv.sf.vc.x.se.e32m8.iXLen.i32.iXLen(iXLen, iXLen, iXLen, i32, iXLen, iXLen, iXLen) 240 241define <vscale x 1 x i8> @test_sf_vc_v_x_se_e8mf8(i8 zeroext %rs1, iXLen %vl) { 242; CHECK-LABEL: test_sf_vc_v_x_se_e8mf8: 243; CHECK: # %bb.0: # %entry 244; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma 245; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 246; CHECK-NEXT: ret 247entry: 248 %0 = tail call <vscale x 1 x i8> @llvm.riscv.sf.vc.v.x.se.nxv1i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 249 ret <vscale x 1 x i8> %0 250} 251 252declare <vscale x 1 x i8> @llvm.riscv.sf.vc.v.x.se.nxv1i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 253 254define <vscale x 2 x i8> @test_sf_vc_v_x_se_e8mf4(i8 zeroext %rs1, iXLen %vl) { 255; CHECK-LABEL: test_sf_vc_v_x_se_e8mf4: 256; CHECK: # %bb.0: # %entry 257; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma 258; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 259; CHECK-NEXT: ret 260entry: 261 %0 = tail call <vscale x 2 x i8> @llvm.riscv.sf.vc.v.x.se.nxv2i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 262 ret <vscale x 2 x i8> %0 263} 264 265declare <vscale x 2 x i8> @llvm.riscv.sf.vc.v.x.se.nxv2i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 266 267define <vscale x 4 x i8> @test_sf_vc_v_x_se_e8mf2(i8 zeroext %rs1, iXLen %vl) { 268; CHECK-LABEL: test_sf_vc_v_x_se_e8mf2: 269; CHECK: # %bb.0: # %entry 270; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma 271; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 272; CHECK-NEXT: ret 273entry: 274 %0 = tail call <vscale x 4 x i8> @llvm.riscv.sf.vc.v.x.se.nxv4i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 275 ret <vscale x 4 x i8> %0 276} 277 278declare <vscale x 4 x i8> @llvm.riscv.sf.vc.v.x.se.nxv4i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 279 280define <vscale x 8 x i8> @test_sf_vc_v_x_se_e8m1(i8 zeroext %rs1, iXLen %vl) { 281; CHECK-LABEL: test_sf_vc_v_x_se_e8m1: 282; CHECK: # %bb.0: # %entry 283; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma 284; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 285; CHECK-NEXT: ret 286entry: 287 %0 = tail call <vscale x 8 x i8> @llvm.riscv.sf.vc.v.x.se.nxv8i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 288 ret <vscale x 8 x i8> %0 289} 290 291declare <vscale x 8 x i8> @llvm.riscv.sf.vc.v.x.se.nxv8i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 292 293define <vscale x 16 x i8> @test_sf_vc_v_x_se_e8m2(i8 zeroext %rs1, iXLen %vl) { 294; CHECK-LABEL: test_sf_vc_v_x_se_e8m2: 295; CHECK: # %bb.0: # %entry 296; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma 297; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 298; CHECK-NEXT: ret 299entry: 300 %0 = tail call <vscale x 16 x i8> @llvm.riscv.sf.vc.v.x.se.nxv16i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 301 ret <vscale x 16 x i8> %0 302} 303 304declare <vscale x 16 x i8> @llvm.riscv.sf.vc.v.x.se.nxv16i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 305 306define <vscale x 32 x i8> @test_sf_vc_v_x_se_e8m4(i8 zeroext %rs1, iXLen %vl) { 307; CHECK-LABEL: test_sf_vc_v_x_se_e8m4: 308; CHECK: # %bb.0: # %entry 309; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma 310; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 311; CHECK-NEXT: ret 312entry: 313 %0 = tail call <vscale x 32 x i8> @llvm.riscv.sf.vc.v.x.se.nxv32i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 314 ret <vscale x 32 x i8> %0 315} 316 317declare <vscale x 32 x i8> @llvm.riscv.sf.vc.v.x.se.nxv32i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 318 319define <vscale x 64 x i8> @test_sf_vc_v_x_se_e8m8(i8 zeroext %rs1, iXLen %vl) { 320; CHECK-LABEL: test_sf_vc_v_x_se_e8m8: 321; CHECK: # %bb.0: # %entry 322; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma 323; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 324; CHECK-NEXT: ret 325entry: 326 %0 = tail call <vscale x 64 x i8> @llvm.riscv.sf.vc.v.x.se.nxv64i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 327 ret <vscale x 64 x i8> %0 328} 329 330declare <vscale x 64 x i8> @llvm.riscv.sf.vc.v.x.se.nxv64i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 331 332define <vscale x 1 x i16> @test_sf_vc_v_x_se_e16mf4(i16 zeroext %rs1, iXLen %vl) { 333; CHECK-LABEL: test_sf_vc_v_x_se_e16mf4: 334; CHECK: # %bb.0: # %entry 335; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma 336; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 337; CHECK-NEXT: ret 338entry: 339 %0 = tail call <vscale x 1 x i16> @llvm.riscv.sf.vc.v.x.se.nxv1i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 340 ret <vscale x 1 x i16> %0 341} 342 343declare <vscale x 1 x i16> @llvm.riscv.sf.vc.v.x.se.nxv1i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 344 345define <vscale x 2 x i16> @test_sf_vc_v_x_se_e16mf2(i16 zeroext %rs1, iXLen %vl) { 346; CHECK-LABEL: test_sf_vc_v_x_se_e16mf2: 347; CHECK: # %bb.0: # %entry 348; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma 349; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 350; CHECK-NEXT: ret 351entry: 352 %0 = tail call <vscale x 2 x i16> @llvm.riscv.sf.vc.v.x.se.nxv2i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 353 ret <vscale x 2 x i16> %0 354} 355 356declare <vscale x 2 x i16> @llvm.riscv.sf.vc.v.x.se.nxv2i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 357 358define <vscale x 4 x i16> @test_sf_vc_v_x_se_e16m1(i16 zeroext %rs1, iXLen %vl) { 359; CHECK-LABEL: test_sf_vc_v_x_se_e16m1: 360; CHECK: # %bb.0: # %entry 361; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma 362; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 363; CHECK-NEXT: ret 364entry: 365 %0 = tail call <vscale x 4 x i16> @llvm.riscv.sf.vc.v.x.se.nxv4i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 366 ret <vscale x 4 x i16> %0 367} 368 369declare <vscale x 4 x i16> @llvm.riscv.sf.vc.v.x.se.nxv4i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 370 371define <vscale x 8 x i16> @test_sf_vc_v_x_se_e16m2(i16 zeroext %rs1, iXLen %vl) { 372; CHECK-LABEL: test_sf_vc_v_x_se_e16m2: 373; CHECK: # %bb.0: # %entry 374; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma 375; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 376; CHECK-NEXT: ret 377entry: 378 %0 = tail call <vscale x 8 x i16> @llvm.riscv.sf.vc.v.x.se.nxv8i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 379 ret <vscale x 8 x i16> %0 380} 381 382declare <vscale x 8 x i16> @llvm.riscv.sf.vc.v.x.se.nxv8i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 383 384define <vscale x 16 x i16> @test_sf_vc_v_x_se_e16m4(i16 zeroext %rs1, iXLen %vl) { 385; CHECK-LABEL: test_sf_vc_v_x_se_e16m4: 386; CHECK: # %bb.0: # %entry 387; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma 388; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 389; CHECK-NEXT: ret 390entry: 391 %0 = tail call <vscale x 16 x i16> @llvm.riscv.sf.vc.v.x.se.nxv16i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 392 ret <vscale x 16 x i16> %0 393} 394 395declare <vscale x 16 x i16> @llvm.riscv.sf.vc.v.x.se.nxv16i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 396 397define <vscale x 32 x i16> @test_sf_vc_v_x_se_e16m8(i16 zeroext %rs1, iXLen %vl) { 398; CHECK-LABEL: test_sf_vc_v_x_se_e16m8: 399; CHECK: # %bb.0: # %entry 400; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma 401; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 402; CHECK-NEXT: ret 403entry: 404 %0 = tail call <vscale x 32 x i16> @llvm.riscv.sf.vc.v.x.se.nxv32i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 405 ret <vscale x 32 x i16> %0 406} 407 408declare <vscale x 32 x i16> @llvm.riscv.sf.vc.v.x.se.nxv32i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 409 410define <vscale x 1 x i32> @test_sf_vc_v_x_se_e32mf2(i32 signext %rs1, iXLen %vl) { 411; CHECK-LABEL: test_sf_vc_v_x_se_e32mf2: 412; CHECK: # %bb.0: # %entry 413; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma 414; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 415; CHECK-NEXT: ret 416entry: 417 %0 = tail call <vscale x 1 x i32> @llvm.riscv.sf.vc.v.x.se.nxv1i32.iXLen.i32.iXLen(iXLen 3, iXLen 31, i32 %rs1, iXLen %vl) 418 ret <vscale x 1 x i32> %0 419} 420 421declare <vscale x 1 x i32> @llvm.riscv.sf.vc.v.x.se.nxv1i32.iXLen.i32.iXLen(iXLen, iXLen, i32, iXLen) 422 423define <vscale x 2 x i32> @test_sf_vc_v_x_se_e32m1(i32 signext %rs1, iXLen %vl) { 424; CHECK-LABEL: test_sf_vc_v_x_se_e32m1: 425; CHECK: # %bb.0: # %entry 426; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma 427; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 428; CHECK-NEXT: ret 429entry: 430 %0 = tail call <vscale x 2 x i32> @llvm.riscv.sf.vc.v.x.se.nxv2i32.iXLen.i32.iXLen(iXLen 3, iXLen 31, i32 %rs1, iXLen %vl) 431 ret <vscale x 2 x i32> %0 432} 433 434declare <vscale x 2 x i32> @llvm.riscv.sf.vc.v.x.se.nxv2i32.iXLen.i32.iXLen(iXLen, iXLen, i32, iXLen) 435 436define <vscale x 4 x i32> @test_sf_vc_v_x_se_e32m2(i32 signext %rs1, iXLen %vl) { 437; CHECK-LABEL: test_sf_vc_v_x_se_e32m2: 438; CHECK: # %bb.0: # %entry 439; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma 440; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 441; CHECK-NEXT: ret 442entry: 443 %0 = tail call <vscale x 4 x i32> @llvm.riscv.sf.vc.v.x.se.nxv4i32.iXLen.i32.iXLen(iXLen 3, iXLen 31, i32 %rs1, iXLen %vl) 444 ret <vscale x 4 x i32> %0 445} 446 447declare <vscale x 4 x i32> @llvm.riscv.sf.vc.v.x.se.nxv4i32.iXLen.i32.iXLen(iXLen, iXLen, i32, iXLen) 448 449define <vscale x 8 x i32> @test_sf_vc_v_x_se_e32m4(i32 signext %rs1, iXLen %vl) { 450; CHECK-LABEL: test_sf_vc_v_x_se_e32m4: 451; CHECK: # %bb.0: # %entry 452; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma 453; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 454; CHECK-NEXT: ret 455entry: 456 %0 = tail call <vscale x 8 x i32> @llvm.riscv.sf.vc.v.x.se.nxv8i32.iXLen.i32.iXLen(iXLen 3, iXLen 31, i32 %rs1, iXLen %vl) 457 ret <vscale x 8 x i32> %0 458} 459 460declare <vscale x 8 x i32> @llvm.riscv.sf.vc.v.x.se.nxv8i32.iXLen.i32.iXLen(iXLen, iXLen, i32, iXLen) 461 462define <vscale x 16 x i32> @test_sf_vc_v_x_se_e32m8(i32 signext %rs1, iXLen %vl) { 463; CHECK-LABEL: test_sf_vc_v_x_se_e32m8: 464; CHECK: # %bb.0: # %entry 465; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma 466; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 467; CHECK-NEXT: ret 468entry: 469 %0 = tail call <vscale x 16 x i32> @llvm.riscv.sf.vc.v.x.se.nxv16i32.iXLen.i32.iXLen(iXLen 3, iXLen 31, i32 %rs1, iXLen %vl) 470 ret <vscale x 16 x i32> %0 471} 472 473declare <vscale x 16 x i32> @llvm.riscv.sf.vc.v.x.se.nxv16i32.iXLen.i32.iXLen(iXLen, iXLen, i32, iXLen) 474 475define <vscale x 1 x i8> @test_sf_vc_v_x_e8mf8(i8 zeroext %rs1, iXLen %vl) { 476; CHECK-LABEL: test_sf_vc_v_x_e8mf8: 477; CHECK: # %bb.0: # %entry 478; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma 479; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 480; CHECK-NEXT: ret 481entry: 482 %0 = tail call <vscale x 1 x i8> @llvm.riscv.sf.vc.v.x.nxv1i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 483 ret <vscale x 1 x i8> %0 484} 485 486declare <vscale x 1 x i8> @llvm.riscv.sf.vc.v.x.nxv1i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 487 488define <vscale x 2 x i8> @test_sf_vc_v_x_e8mf4(i8 zeroext %rs1, iXLen %vl) { 489; CHECK-LABEL: test_sf_vc_v_x_e8mf4: 490; CHECK: # %bb.0: # %entry 491; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma 492; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 493; CHECK-NEXT: ret 494entry: 495 %0 = tail call <vscale x 2 x i8> @llvm.riscv.sf.vc.v.x.nxv2i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 496 ret <vscale x 2 x i8> %0 497} 498 499declare <vscale x 2 x i8> @llvm.riscv.sf.vc.v.x.nxv2i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 500 501define <vscale x 4 x i8> @test_sf_vc_v_x_e8mf2(i8 zeroext %rs1, iXLen %vl) { 502; CHECK-LABEL: test_sf_vc_v_x_e8mf2: 503; CHECK: # %bb.0: # %entry 504; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma 505; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 506; CHECK-NEXT: ret 507entry: 508 %0 = tail call <vscale x 4 x i8> @llvm.riscv.sf.vc.v.x.nxv4i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 509 ret <vscale x 4 x i8> %0 510} 511 512declare <vscale x 4 x i8> @llvm.riscv.sf.vc.v.x.nxv4i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 513 514define <vscale x 8 x i8> @test_sf_vc_v_x_e8m1(i8 zeroext %rs1, iXLen %vl) { 515; CHECK-LABEL: test_sf_vc_v_x_e8m1: 516; CHECK: # %bb.0: # %entry 517; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma 518; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 519; CHECK-NEXT: ret 520entry: 521 %0 = tail call <vscale x 8 x i8> @llvm.riscv.sf.vc.v.x.nxv8i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 522 ret <vscale x 8 x i8> %0 523} 524 525declare <vscale x 8 x i8> @llvm.riscv.sf.vc.v.x.nxv8i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 526 527define <vscale x 16 x i8> @test_sf_vc_v_x_e8m2(i8 zeroext %rs1, iXLen %vl) { 528; CHECK-LABEL: test_sf_vc_v_x_e8m2: 529; CHECK: # %bb.0: # %entry 530; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma 531; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 532; CHECK-NEXT: ret 533entry: 534 %0 = tail call <vscale x 16 x i8> @llvm.riscv.sf.vc.v.x.nxv16i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 535 ret <vscale x 16 x i8> %0 536} 537 538declare <vscale x 16 x i8> @llvm.riscv.sf.vc.v.x.nxv16i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 539 540define <vscale x 32 x i8> @test_sf_vc_v_x_e8m4(i8 zeroext %rs1, iXLen %vl) { 541; CHECK-LABEL: test_sf_vc_v_x_e8m4: 542; CHECK: # %bb.0: # %entry 543; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma 544; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 545; CHECK-NEXT: ret 546entry: 547 %0 = tail call <vscale x 32 x i8> @llvm.riscv.sf.vc.v.x.nxv32i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 548 ret <vscale x 32 x i8> %0 549} 550 551declare <vscale x 32 x i8> @llvm.riscv.sf.vc.v.x.nxv32i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 552 553define <vscale x 64 x i8> @test_sf_vc_v_x_e8m8(i8 zeroext %rs1, iXLen %vl) { 554; CHECK-LABEL: test_sf_vc_v_x_e8m8: 555; CHECK: # %bb.0: # %entry 556; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma 557; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 558; CHECK-NEXT: ret 559entry: 560 %0 = tail call <vscale x 64 x i8> @llvm.riscv.sf.vc.v.x.nxv64i8.iXLen.i8.iXLen(iXLen 3, iXLen 31, i8 %rs1, iXLen %vl) 561 ret <vscale x 64 x i8> %0 562} 563 564declare <vscale x 64 x i8> @llvm.riscv.sf.vc.v.x.nxv64i8.iXLen.i8.iXLen(iXLen, iXLen, i8, iXLen) 565 566define <vscale x 1 x i16> @test_sf_vc_v_x_e16mf4(i16 zeroext %rs1, iXLen %vl) { 567; CHECK-LABEL: test_sf_vc_v_x_e16mf4: 568; CHECK: # %bb.0: # %entry 569; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma 570; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 571; CHECK-NEXT: ret 572entry: 573 %0 = tail call <vscale x 1 x i16> @llvm.riscv.sf.vc.v.x.nxv1i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 574 ret <vscale x 1 x i16> %0 575} 576 577declare <vscale x 1 x i16> @llvm.riscv.sf.vc.v.x.nxv1i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 578 579define <vscale x 2 x i16> @test_sf_vc_v_x_e16mf2(i16 zeroext %rs1, iXLen %vl) { 580; CHECK-LABEL: test_sf_vc_v_x_e16mf2: 581; CHECK: # %bb.0: # %entry 582; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma 583; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 584; CHECK-NEXT: ret 585entry: 586 %0 = tail call <vscale x 2 x i16> @llvm.riscv.sf.vc.v.x.nxv2i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 587 ret <vscale x 2 x i16> %0 588} 589 590declare <vscale x 2 x i16> @llvm.riscv.sf.vc.v.x.nxv2i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 591 592define <vscale x 4 x i16> @test_sf_vc_v_x_e16m1(i16 zeroext %rs1, iXLen %vl) { 593; CHECK-LABEL: test_sf_vc_v_x_e16m1: 594; CHECK: # %bb.0: # %entry 595; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma 596; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 597; CHECK-NEXT: ret 598entry: 599 %0 = tail call <vscale x 4 x i16> @llvm.riscv.sf.vc.v.x.nxv4i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 600 ret <vscale x 4 x i16> %0 601} 602 603declare <vscale x 4 x i16> @llvm.riscv.sf.vc.v.x.nxv4i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 604 605define <vscale x 8 x i16> @test_sf_vc_v_x_e16m2(i16 zeroext %rs1, iXLen %vl) { 606; CHECK-LABEL: test_sf_vc_v_x_e16m2: 607; CHECK: # %bb.0: # %entry 608; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma 609; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 610; CHECK-NEXT: ret 611entry: 612 %0 = tail call <vscale x 8 x i16> @llvm.riscv.sf.vc.v.x.nxv8i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 613 ret <vscale x 8 x i16> %0 614} 615 616declare <vscale x 8 x i16> @llvm.riscv.sf.vc.v.x.nxv8i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 617 618define <vscale x 16 x i16> @test_sf_vc_v_x_e16m4(i16 zeroext %rs1, iXLen %vl) { 619; CHECK-LABEL: test_sf_vc_v_x_e16m4: 620; CHECK: # %bb.0: # %entry 621; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma 622; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 623; CHECK-NEXT: ret 624entry: 625 %0 = tail call <vscale x 16 x i16> @llvm.riscv.sf.vc.v.x.nxv16i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 626 ret <vscale x 16 x i16> %0 627} 628 629declare <vscale x 16 x i16> @llvm.riscv.sf.vc.v.x.nxv16i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 630 631define <vscale x 32 x i16> @test_sf_vc_v_x_e16m8(i16 zeroext %rs1, iXLen %vl) { 632; CHECK-LABEL: test_sf_vc_v_x_e16m8: 633; CHECK: # %bb.0: # %entry 634; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma 635; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 636; CHECK-NEXT: ret 637entry: 638 %0 = tail call <vscale x 32 x i16> @llvm.riscv.sf.vc.v.x.nxv32i16.iXLen.i16.iXLen(iXLen 3, iXLen 31, i16 %rs1, iXLen %vl) 639 ret <vscale x 32 x i16> %0 640} 641 642declare <vscale x 32 x i16> @llvm.riscv.sf.vc.v.x.nxv32i16.iXLen.i16.iXLen(iXLen, iXLen, i16, iXLen) 643 644define <vscale x 1 x i32> @test_sf_vc_v_x_e32mf2(i32 signext %rs1, iXLen %vl) { 645; CHECK-LABEL: test_sf_vc_v_x_e32mf2: 646; CHECK: # %bb.0: # %entry 647; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma 648; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 649; CHECK-NEXT: ret 650entry: 651 %0 = tail call <vscale x 1 x i32> @llvm.riscv.sf.vc.v.x.nxv1i32.iXLen.i32.iXLen(iXLen 3, iXLen 31, i32 %rs1, iXLen %vl) 652 ret <vscale x 1 x i32> %0 653} 654 655declare <vscale x 1 x i32> @llvm.riscv.sf.vc.v.x.nxv1i32.iXLen.i32.iXLen(iXLen, iXLen, i32, iXLen) 656 657define <vscale x 2 x i32> @test_sf_vc_v_x_e32m1(i32 signext %rs1, iXLen %vl) { 658; CHECK-LABEL: test_sf_vc_v_x_e32m1: 659; CHECK: # %bb.0: # %entry 660; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma 661; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 662; CHECK-NEXT: ret 663entry: 664 %0 = tail call <vscale x 2 x i32> @llvm.riscv.sf.vc.v.x.nxv2i32.iXLen.i32.iXLen(iXLen 3, iXLen 31, i32 %rs1, iXLen %vl) 665 ret <vscale x 2 x i32> %0 666} 667 668declare <vscale x 2 x i32> @llvm.riscv.sf.vc.v.x.nxv2i32.iXLen.i32.iXLen(iXLen, iXLen, i32, iXLen) 669 670define <vscale x 4 x i32> @test_sf_vc_v_x_e32m2(i32 signext %rs1, iXLen %vl) { 671; CHECK-LABEL: test_sf_vc_v_x_e32m2: 672; CHECK: # %bb.0: # %entry 673; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma 674; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 675; CHECK-NEXT: ret 676entry: 677 %0 = tail call <vscale x 4 x i32> @llvm.riscv.sf.vc.v.x.nxv4i32.iXLen.i32.iXLen(iXLen 3, iXLen 31, i32 %rs1, iXLen %vl) 678 ret <vscale x 4 x i32> %0 679} 680 681declare <vscale x 4 x i32> @llvm.riscv.sf.vc.v.x.nxv4i32.iXLen.i32.iXLen(iXLen, iXLen, i32, iXLen) 682 683define <vscale x 8 x i32> @test_sf_vc_v_x_e32m4(i32 signext %rs1, iXLen %vl) { 684; CHECK-LABEL: test_sf_vc_v_x_e32m4: 685; CHECK: # %bb.0: # %entry 686; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma 687; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 688; CHECK-NEXT: ret 689entry: 690 %0 = tail call <vscale x 8 x i32> @llvm.riscv.sf.vc.v.x.nxv8i32.iXLen.i32.iXLen(iXLen 3, iXLen 31, i32 %rs1, iXLen %vl) 691 ret <vscale x 8 x i32> %0 692} 693 694declare <vscale x 8 x i32> @llvm.riscv.sf.vc.v.x.nxv8i32.iXLen.i32.iXLen(iXLen, iXLen, i32, iXLen) 695 696define <vscale x 16 x i32> @test_sf_vc_v_x_e32m8(i32 signext %rs1, iXLen %vl) { 697; CHECK-LABEL: test_sf_vc_v_x_e32m8: 698; CHECK: # %bb.0: # %entry 699; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma 700; CHECK-NEXT: sf.vc.v.x 3, 31, v8, a0 701; CHECK-NEXT: ret 702entry: 703 %0 = tail call <vscale x 16 x i32> @llvm.riscv.sf.vc.v.x.nxv16i32.iXLen.i32.iXLen(iXLen 3, iXLen 31, i32 %rs1, iXLen %vl) 704 ret <vscale x 16 x i32> %0 705} 706 707declare <vscale x 16 x i32> @llvm.riscv.sf.vc.v.x.nxv16i32.iXLen.i32.iXLen(iXLen, iXLen, i32, iXLen) 708 709define void @test_sf_vc_i_se_e8mf8(iXLen %vl) { 710; CHECK-LABEL: test_sf_vc_i_se_e8mf8: 711; CHECK: # %bb.0: # %entry 712; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma 713; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 714; CHECK-NEXT: ret 715entry: 716 tail call void @llvm.riscv.sf.vc.i.se.e8mf8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 8, iXLen 5, iXLen %vl) 717 ret void 718} 719 720declare void @llvm.riscv.sf.vc.i.se.e8mf8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 721 722define void @test_sf_vc_i_se_e8mf4(iXLen %vl) { 723; CHECK-LABEL: test_sf_vc_i_se_e8mf4: 724; CHECK: # %bb.0: # %entry 725; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma 726; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 727; CHECK-NEXT: ret 728entry: 729 tail call void @llvm.riscv.sf.vc.i.se.e8mf4.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 8, iXLen 6, iXLen %vl) 730 ret void 731} 732 733declare void @llvm.riscv.sf.vc.i.se.e8mf4.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 734 735define void @test_sf_vc_i_se_e8mf2(iXLen %vl) { 736; CHECK-LABEL: test_sf_vc_i_se_e8mf2: 737; CHECK: # %bb.0: # %entry 738; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma 739; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 740; CHECK-NEXT: ret 741entry: 742 tail call void @llvm.riscv.sf.vc.i.se.e8mf2.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 8, iXLen 7, iXLen %vl) 743 ret void 744} 745 746declare void @llvm.riscv.sf.vc.i.se.e8mf2.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 747 748define void @test_sf_vc_i_se_e8m1(iXLen %vl) { 749; CHECK-LABEL: test_sf_vc_i_se_e8m1: 750; CHECK: # %bb.0: # %entry 751; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma 752; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 753; CHECK-NEXT: ret 754entry: 755 tail call void @llvm.riscv.sf.vc.i.se.e8m1.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 8, iXLen 0, iXLen %vl) 756 ret void 757} 758 759declare void @llvm.riscv.sf.vc.i.se.e8m1.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 760 761define void @test_sf_vc_i_se_e8m2(iXLen %vl) { 762; CHECK-LABEL: test_sf_vc_i_se_e8m2: 763; CHECK: # %bb.0: # %entry 764; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma 765; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 766; CHECK-NEXT: ret 767entry: 768 tail call void @llvm.riscv.sf.vc.i.se.e8m2.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 8, iXLen 1, iXLen %vl) 769 ret void 770} 771 772declare void @llvm.riscv.sf.vc.i.se.e8m2.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 773 774define void @test_sf_vc_i_se_e8m4(iXLen %vl) { 775; CHECK-LABEL: test_sf_vc_i_se_e8m4: 776; CHECK: # %bb.0: # %entry 777; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma 778; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 779; CHECK-NEXT: ret 780entry: 781 tail call void @llvm.riscv.sf.vc.i.se.e8m4.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 8, iXLen 2, iXLen %vl) 782 ret void 783} 784 785declare void @llvm.riscv.sf.vc.i.se.e8m4.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 786 787define void @test_sf_vc_i_se_e8m8(iXLen %vl) { 788; CHECK-LABEL: test_sf_vc_i_se_e8m8: 789; CHECK: # %bb.0: # %entry 790; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma 791; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 792; CHECK-NEXT: ret 793entry: 794 tail call void @llvm.riscv.sf.vc.i.se.e8m8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 8, iXLen 3, iXLen %vl) 795 ret void 796} 797 798declare void @llvm.riscv.sf.vc.i.se.e8m8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 799 800define void @test_sf_vc_i_se_e16mf4(iXLen %vl) { 801; CHECK-LABEL: test_sf_vc_i_se_e16mf4: 802; CHECK: # %bb.0: # %entry 803; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma 804; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 805; CHECK-NEXT: ret 806entry: 807 tail call void @llvm.riscv.sf.vc.i.se.e16mf4.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 16, iXLen 6, iXLen %vl) 808 ret void 809} 810 811declare void @llvm.riscv.sf.vc.i.se.e16mf4.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 812 813define void @test_sf_vc_i_se_e16mf2(iXLen %vl) { 814; CHECK-LABEL: test_sf_vc_i_se_e16mf2: 815; CHECK: # %bb.0: # %entry 816; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma 817; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 818; CHECK-NEXT: ret 819entry: 820 tail call void @llvm.riscv.sf.vc.i.se.e16mf2.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 16, iXLen 7, iXLen %vl) 821 ret void 822} 823 824declare void @llvm.riscv.sf.vc.i.se.e16mf2.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 825 826define void @test_sf_vc_i_se_e16m1(iXLen %vl) { 827; CHECK-LABEL: test_sf_vc_i_se_e16m1: 828; CHECK: # %bb.0: # %entry 829; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma 830; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 831; CHECK-NEXT: ret 832entry: 833 tail call void @llvm.riscv.sf.vc.i.se.e16m1.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 16, iXLen 0, iXLen %vl) 834 ret void 835} 836 837declare void @llvm.riscv.sf.vc.i.se.e16m1.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 838 839define void @test_sf_vc_i_se_e16m2(iXLen %vl) { 840; CHECK-LABEL: test_sf_vc_i_se_e16m2: 841; CHECK: # %bb.0: # %entry 842; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma 843; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 844; CHECK-NEXT: ret 845entry: 846 tail call void @llvm.riscv.sf.vc.i.se.e16m2.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 16, iXLen 1, iXLen %vl) 847 ret void 848} 849 850declare void @llvm.riscv.sf.vc.i.se.e16m2.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 851 852define void @test_sf_vc_i_se_e16m4(iXLen %vl) { 853; CHECK-LABEL: test_sf_vc_i_se_e16m4: 854; CHECK: # %bb.0: # %entry 855; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma 856; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 857; CHECK-NEXT: ret 858entry: 859 tail call void @llvm.riscv.sf.vc.i.se.e16m4.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 16, iXLen 2, iXLen %vl) 860 ret void 861} 862 863declare void @llvm.riscv.sf.vc.i.se.e16m4.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 864 865define void @test_sf_vc_i_se_e16m8(iXLen %vl) { 866; CHECK-LABEL: test_sf_vc_i_se_e16m8: 867; CHECK: # %bb.0: # %entry 868; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma 869; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 870; CHECK-NEXT: ret 871entry: 872 tail call void @llvm.riscv.sf.vc.i.se.e16m8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 16, iXLen 3, iXLen %vl) 873 ret void 874} 875 876declare void @llvm.riscv.sf.vc.i.se.e16m8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 877 878define void @test_sf_vc_i_se_e32mf2(iXLen %vl) { 879; CHECK-LABEL: test_sf_vc_i_se_e32mf2: 880; CHECK: # %bb.0: # %entry 881; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma 882; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 883; CHECK-NEXT: ret 884entry: 885 tail call void @llvm.riscv.sf.vc.i.se.e32mf2.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 32, iXLen 7, iXLen %vl) 886 ret void 887} 888 889declare void @llvm.riscv.sf.vc.i.se.e32mf2.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 890 891define void @test_sf_vc_i_se_e32m1(iXLen %vl) { 892; CHECK-LABEL: test_sf_vc_i_se_e32m1: 893; CHECK: # %bb.0: # %entry 894; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma 895; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 896; CHECK-NEXT: ret 897entry: 898 tail call void @llvm.riscv.sf.vc.i.se.e32m1.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 32, iXLen 0, iXLen %vl) 899 ret void 900} 901 902declare void @llvm.riscv.sf.vc.i.se.e32m1.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 903 904define void @test_sf_vc_i_se_e32m2(iXLen %vl) { 905; CHECK-LABEL: test_sf_vc_i_se_e32m2: 906; CHECK: # %bb.0: # %entry 907; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma 908; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 909; CHECK-NEXT: ret 910entry: 911 tail call void @llvm.riscv.sf.vc.i.se.e32m2.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 32, iXLen 1, iXLen %vl) 912 ret void 913} 914 915declare void @llvm.riscv.sf.vc.i.se.e32m2.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 916 917define void @test_sf_vc_i_se_e32m4(iXLen %vl) { 918; CHECK-LABEL: test_sf_vc_i_se_e32m4: 919; CHECK: # %bb.0: # %entry 920; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma 921; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 922; CHECK-NEXT: ret 923entry: 924 tail call void @llvm.riscv.sf.vc.i.se.e32m4.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 32, iXLen 2, iXLen %vl) 925 ret void 926} 927 928declare void @llvm.riscv.sf.vc.i.se.e32m4.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 929 930define void @test_sf_vc_i_se_e32m8(iXLen %vl) { 931; CHECK-LABEL: test_sf_vc_i_se_e32m8: 932; CHECK: # %bb.0: # %entry 933; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma 934; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 935; CHECK-NEXT: ret 936entry: 937 tail call void @llvm.riscv.sf.vc.i.se.e32m8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 32, iXLen 3, iXLen %vl) 938 ret void 939} 940 941declare void @llvm.riscv.sf.vc.i.se.e32m8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 942 943define void @test_sf_vc_i_se_e64m1(iXLen %vl) { 944; CHECK-LABEL: test_sf_vc_i_se_e64m1: 945; CHECK: # %bb.0: # %entry 946; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma 947; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 948; CHECK-NEXT: ret 949entry: 950 tail call void @llvm.riscv.sf.vc.i.se.e64m1.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 64, iXLen 0, iXLen %vl) 951 ret void 952} 953 954declare void @llvm.riscv.sf.vc.i.se.e64m1.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 955 956define void @test_sf_vc_i_se_e64m2(iXLen %vl) { 957; CHECK-LABEL: test_sf_vc_i_se_e64m2: 958; CHECK: # %bb.0: # %entry 959; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma 960; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 961; CHECK-NEXT: ret 962entry: 963 tail call void @llvm.riscv.sf.vc.i.se.e64m2.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 64, iXLen 1, iXLen %vl) 964 ret void 965} 966 967declare void @llvm.riscv.sf.vc.i.se.e64m2.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 968 969define void @test_sf_vc_i_se_e64m4(iXLen %vl) { 970; CHECK-LABEL: test_sf_vc_i_se_e64m4: 971; CHECK: # %bb.0: # %entry 972; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 973; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 974; CHECK-NEXT: ret 975entry: 976 tail call void @llvm.riscv.sf.vc.i.se.e64m4.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 64, iXLen 2, iXLen %vl) 977 ret void 978} 979 980declare void @llvm.riscv.sf.vc.i.se.e64m4.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 981 982define void @test_sf_vc_i_se_e64m8(iXLen %vl) { 983; CHECK-LABEL: test_sf_vc_i_se_e64m8: 984; CHECK: # %bb.0: # %entry 985; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma 986; CHECK-NEXT: sf.vc.i 3, 31, 31, 10 987; CHECK-NEXT: ret 988entry: 989 tail call void @llvm.riscv.sf.vc.i.se.e64m8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 31, iXLen 10, iXLen 64, iXLen 3, iXLen %vl) 990 ret void 991} 992 993declare void @llvm.riscv.sf.vc.i.se.e64m8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen, iXLen, iXLen, iXLen) 994 995define <vscale x 1 x i8> @test_sf_vc_v_i_se_e8mf8(iXLen %vl) { 996; CHECK-LABEL: test_sf_vc_v_i_se_e8mf8: 997; CHECK: # %bb.0: # %entry 998; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma 999; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1000; CHECK-NEXT: ret 1001entry: 1002 %0 = tail call <vscale x 1 x i8> @llvm.riscv.sf.vc.v.i.se.nxv1i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1003 ret <vscale x 1 x i8> %0 1004} 1005 1006declare <vscale x 1 x i8> @llvm.riscv.sf.vc.v.i.se.nxv1i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1007 1008define <vscale x 2 x i8> @test_sf_vc_v_i_se_e8mf4(iXLen %vl) { 1009; CHECK-LABEL: test_sf_vc_v_i_se_e8mf4: 1010; CHECK: # %bb.0: # %entry 1011; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma 1012; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1013; CHECK-NEXT: ret 1014entry: 1015 %0 = tail call <vscale x 2 x i8> @llvm.riscv.sf.vc.v.i.se.nxv2i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1016 ret <vscale x 2 x i8> %0 1017} 1018 1019declare <vscale x 2 x i8> @llvm.riscv.sf.vc.v.i.se.nxv2i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1020 1021define <vscale x 4 x i8> @test_sf_vc_v_i_se_e8mf2(iXLen %vl) { 1022; CHECK-LABEL: test_sf_vc_v_i_se_e8mf2: 1023; CHECK: # %bb.0: # %entry 1024; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma 1025; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1026; CHECK-NEXT: ret 1027entry: 1028 %0 = tail call <vscale x 4 x i8> @llvm.riscv.sf.vc.v.i.se.nxv4i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1029 ret <vscale x 4 x i8> %0 1030} 1031 1032declare <vscale x 4 x i8> @llvm.riscv.sf.vc.v.i.se.nxv4i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1033 1034define <vscale x 8 x i8> @test_sf_vc_v_i_se_e8m1(iXLen %vl) { 1035; CHECK-LABEL: test_sf_vc_v_i_se_e8m1: 1036; CHECK: # %bb.0: # %entry 1037; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma 1038; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1039; CHECK-NEXT: ret 1040entry: 1041 %0 = tail call <vscale x 8 x i8> @llvm.riscv.sf.vc.v.i.se.nxv8i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1042 ret <vscale x 8 x i8> %0 1043} 1044 1045declare <vscale x 8 x i8> @llvm.riscv.sf.vc.v.i.se.nxv8i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1046 1047define <vscale x 16 x i8> @test_sf_vc_v_i_se_e8m2(iXLen %vl) { 1048; CHECK-LABEL: test_sf_vc_v_i_se_e8m2: 1049; CHECK: # %bb.0: # %entry 1050; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma 1051; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1052; CHECK-NEXT: ret 1053entry: 1054 %0 = tail call <vscale x 16 x i8> @llvm.riscv.sf.vc.v.i.se.nxv16i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1055 ret <vscale x 16 x i8> %0 1056} 1057 1058declare <vscale x 16 x i8> @llvm.riscv.sf.vc.v.i.se.nxv16i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1059 1060define <vscale x 32 x i8> @test_sf_vc_v_i_se_e8m4(iXLen %vl) { 1061; CHECK-LABEL: test_sf_vc_v_i_se_e8m4: 1062; CHECK: # %bb.0: # %entry 1063; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma 1064; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1065; CHECK-NEXT: ret 1066entry: 1067 %0 = tail call <vscale x 32 x i8> @llvm.riscv.sf.vc.v.i.se.nxv32i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1068 ret <vscale x 32 x i8> %0 1069} 1070 1071declare <vscale x 32 x i8> @llvm.riscv.sf.vc.v.i.se.nxv32i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1072 1073define <vscale x 64 x i8> @test_sf_vc_v_i_se_e8m8(iXLen %vl) { 1074; CHECK-LABEL: test_sf_vc_v_i_se_e8m8: 1075; CHECK: # %bb.0: # %entry 1076; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma 1077; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1078; CHECK-NEXT: ret 1079entry: 1080 %0 = tail call <vscale x 64 x i8> @llvm.riscv.sf.vc.v.i.se.nxv64i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1081 ret <vscale x 64 x i8> %0 1082} 1083 1084declare <vscale x 64 x i8> @llvm.riscv.sf.vc.v.i.se.nxv64i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1085 1086define <vscale x 1 x i16> @test_sf_vc_v_i_se_e16mf4(iXLen %vl) { 1087; CHECK-LABEL: test_sf_vc_v_i_se_e16mf4: 1088; CHECK: # %bb.0: # %entry 1089; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma 1090; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1091; CHECK-NEXT: ret 1092entry: 1093 %0 = tail call <vscale x 1 x i16> @llvm.riscv.sf.vc.v.i.se.nxv1i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1094 ret <vscale x 1 x i16> %0 1095} 1096 1097declare <vscale x 1 x i16> @llvm.riscv.sf.vc.v.i.se.nxv1i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1098 1099define <vscale x 2 x i16> @test_sf_vc_v_i_se_e16mf2(iXLen %vl) { 1100; CHECK-LABEL: test_sf_vc_v_i_se_e16mf2: 1101; CHECK: # %bb.0: # %entry 1102; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma 1103; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1104; CHECK-NEXT: ret 1105entry: 1106 %0 = tail call <vscale x 2 x i16> @llvm.riscv.sf.vc.v.i.se.nxv2i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1107 ret <vscale x 2 x i16> %0 1108} 1109 1110declare <vscale x 2 x i16> @llvm.riscv.sf.vc.v.i.se.nxv2i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1111 1112define <vscale x 4 x i16> @test_sf_vc_v_i_se_e16m1(iXLen %vl) { 1113; CHECK-LABEL: test_sf_vc_v_i_se_e16m1: 1114; CHECK: # %bb.0: # %entry 1115; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma 1116; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1117; CHECK-NEXT: ret 1118entry: 1119 %0 = tail call <vscale x 4 x i16> @llvm.riscv.sf.vc.v.i.se.nxv4i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1120 ret <vscale x 4 x i16> %0 1121} 1122 1123declare <vscale x 4 x i16> @llvm.riscv.sf.vc.v.i.se.nxv4i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1124 1125define <vscale x 8 x i16> @test_sf_vc_v_i_se_e16m2(iXLen %vl) { 1126; CHECK-LABEL: test_sf_vc_v_i_se_e16m2: 1127; CHECK: # %bb.0: # %entry 1128; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma 1129; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1130; CHECK-NEXT: ret 1131entry: 1132 %0 = tail call <vscale x 8 x i16> @llvm.riscv.sf.vc.v.i.se.nxv8i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1133 ret <vscale x 8 x i16> %0 1134} 1135 1136declare <vscale x 8 x i16> @llvm.riscv.sf.vc.v.i.se.nxv8i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1137 1138define <vscale x 16 x i16> @test_sf_vc_v_i_se_e16m4(iXLen %vl) { 1139; CHECK-LABEL: test_sf_vc_v_i_se_e16m4: 1140; CHECK: # %bb.0: # %entry 1141; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma 1142; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1143; CHECK-NEXT: ret 1144entry: 1145 %0 = tail call <vscale x 16 x i16> @llvm.riscv.sf.vc.v.i.se.nxv16i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1146 ret <vscale x 16 x i16> %0 1147} 1148 1149declare <vscale x 16 x i16> @llvm.riscv.sf.vc.v.i.se.nxv16i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1150 1151define <vscale x 32 x i16> @test_sf_vc_v_i_se_e16m8(iXLen %vl) { 1152; CHECK-LABEL: test_sf_vc_v_i_se_e16m8: 1153; CHECK: # %bb.0: # %entry 1154; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma 1155; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1156; CHECK-NEXT: ret 1157entry: 1158 %0 = tail call <vscale x 32 x i16> @llvm.riscv.sf.vc.v.i.se.nxv32i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1159 ret <vscale x 32 x i16> %0 1160} 1161 1162declare <vscale x 32 x i16> @llvm.riscv.sf.vc.v.i.se.nxv32i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1163 1164define <vscale x 1 x i32> @test_sf_vc_v_i_se_e32mf2(iXLen %vl) { 1165; CHECK-LABEL: test_sf_vc_v_i_se_e32mf2: 1166; CHECK: # %bb.0: # %entry 1167; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma 1168; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1169; CHECK-NEXT: ret 1170entry: 1171 %0 = tail call <vscale x 1 x i32> @llvm.riscv.sf.vc.v.i.se.nxv1i32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1172 ret <vscale x 1 x i32> %0 1173} 1174 1175declare <vscale x 1 x i32> @llvm.riscv.sf.vc.v.i.se.nxv1i32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1176 1177define <vscale x 2 x i32> @test_sf_vc_v_i_se_e32m1(iXLen %vl) { 1178; CHECK-LABEL: test_sf_vc_v_i_se_e32m1: 1179; CHECK: # %bb.0: # %entry 1180; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma 1181; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1182; CHECK-NEXT: ret 1183entry: 1184 %0 = tail call <vscale x 2 x i32> @llvm.riscv.sf.vc.v.i.se.nxv2i32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1185 ret <vscale x 2 x i32> %0 1186} 1187 1188declare <vscale x 2 x i32> @llvm.riscv.sf.vc.v.i.se.nxv2i32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1189 1190define <vscale x 4 x i32> @test_sf_vc_v_i_se_e32m2(iXLen %vl) { 1191; CHECK-LABEL: test_sf_vc_v_i_se_e32m2: 1192; CHECK: # %bb.0: # %entry 1193; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma 1194; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1195; CHECK-NEXT: ret 1196entry: 1197 %0 = tail call <vscale x 4 x i32> @llvm.riscv.sf.vc.v.i.se.nxv4i32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1198 ret <vscale x 4 x i32> %0 1199} 1200 1201declare <vscale x 4 x i32> @llvm.riscv.sf.vc.v.i.se.nxv4i32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1202 1203define <vscale x 8 x i32> @test_sf_vc_v_i_se_e32m4(iXLen %vl) { 1204; CHECK-LABEL: test_sf_vc_v_i_se_e32m4: 1205; CHECK: # %bb.0: # %entry 1206; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma 1207; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1208; CHECK-NEXT: ret 1209entry: 1210 %0 = tail call <vscale x 8 x i32> @llvm.riscv.sf.vc.v.i.se.nxv8i32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1211 ret <vscale x 8 x i32> %0 1212} 1213 1214declare <vscale x 8 x i32> @llvm.riscv.sf.vc.v.i.se.nxv8i32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1215 1216define <vscale x 16 x i32> @test_sf_vc_v_i_se_e32m8(iXLen %vl) { 1217; CHECK-LABEL: test_sf_vc_v_i_se_e32m8: 1218; CHECK: # %bb.0: # %entry 1219; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma 1220; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1221; CHECK-NEXT: ret 1222entry: 1223 %0 = tail call <vscale x 16 x i32> @llvm.riscv.sf.vc.v.i.se.nxv16i32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1224 ret <vscale x 16 x i32> %0 1225} 1226 1227declare <vscale x 16 x i32> @llvm.riscv.sf.vc.v.i.se.nxv16i32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1228 1229define <vscale x 1 x i64> @test_sf_vc_v_i_se_e64m1(iXLen %vl) { 1230; CHECK-LABEL: test_sf_vc_v_i_se_e64m1: 1231; CHECK: # %bb.0: # %entry 1232; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma 1233; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1234; CHECK-NEXT: ret 1235entry: 1236 %0 = tail call <vscale x 1 x i64> @llvm.riscv.sf.vc.v.i.se.nxv1i64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1237 ret <vscale x 1 x i64> %0 1238} 1239 1240declare <vscale x 1 x i64> @llvm.riscv.sf.vc.v.i.se.nxv1i64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1241 1242define <vscale x 2 x i64> @test_sf_vc_v_i_se_e64m2(iXLen %vl) { 1243; CHECK-LABEL: test_sf_vc_v_i_se_e64m2: 1244; CHECK: # %bb.0: # %entry 1245; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma 1246; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1247; CHECK-NEXT: ret 1248entry: 1249 %0 = tail call <vscale x 2 x i64> @llvm.riscv.sf.vc.v.i.se.nxv2i64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1250 ret <vscale x 2 x i64> %0 1251} 1252 1253declare <vscale x 2 x i64> @llvm.riscv.sf.vc.v.i.se.nxv2i64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1254 1255define <vscale x 4 x i64> @test_sf_vc_v_i_se_e64m4(iXLen %vl) { 1256; CHECK-LABEL: test_sf_vc_v_i_se_e64m4: 1257; CHECK: # %bb.0: # %entry 1258; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 1259; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1260; CHECK-NEXT: ret 1261entry: 1262 %0 = tail call <vscale x 4 x i64> @llvm.riscv.sf.vc.v.i.se.nxv4i64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1263 ret <vscale x 4 x i64> %0 1264} 1265 1266declare <vscale x 4 x i64> @llvm.riscv.sf.vc.v.i.se.nxv4i64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1267 1268define <vscale x 8 x i64> @test_sf_vc_v_i_se_e64m8(iXLen %vl) { 1269; CHECK-LABEL: test_sf_vc_v_i_se_e64m8: 1270; CHECK: # %bb.0: # %entry 1271; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma 1272; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1273; CHECK-NEXT: ret 1274entry: 1275 %0 = tail call <vscale x 8 x i64> @llvm.riscv.sf.vc.v.i.se.nxv8i64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1276 ret <vscale x 8 x i64> %0 1277} 1278 1279declare <vscale x 8 x i64> @llvm.riscv.sf.vc.v.i.se.nxv8i64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1280 1281define <vscale x 1 x i8> @test_sf_vc_v_i_e8mf8(iXLen %vl) { 1282; CHECK-LABEL: test_sf_vc_v_i_e8mf8: 1283; CHECK: # %bb.0: # %entry 1284; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma 1285; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1286; CHECK-NEXT: ret 1287entry: 1288 %0 = tail call <vscale x 1 x i8> @llvm.riscv.sf.vc.v.i.nxv1i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1289 ret <vscale x 1 x i8> %0 1290} 1291 1292declare <vscale x 1 x i8> @llvm.riscv.sf.vc.v.i.nxv1i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1293 1294define <vscale x 2 x i8> @test_sf_vc_v_i_e8mf4(iXLen %vl) { 1295; CHECK-LABEL: test_sf_vc_v_i_e8mf4: 1296; CHECK: # %bb.0: # %entry 1297; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma 1298; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1299; CHECK-NEXT: ret 1300entry: 1301 %0 = tail call <vscale x 2 x i8> @llvm.riscv.sf.vc.v.i.nxv2i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1302 ret <vscale x 2 x i8> %0 1303} 1304 1305declare <vscale x 2 x i8> @llvm.riscv.sf.vc.v.i.nxv2i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1306 1307define <vscale x 4 x i8> @test_sf_vc_v_i_e8mf2(iXLen %vl) { 1308; CHECK-LABEL: test_sf_vc_v_i_e8mf2: 1309; CHECK: # %bb.0: # %entry 1310; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma 1311; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1312; CHECK-NEXT: ret 1313entry: 1314 %0 = tail call <vscale x 4 x i8> @llvm.riscv.sf.vc.v.i.nxv4i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1315 ret <vscale x 4 x i8> %0 1316} 1317 1318declare <vscale x 4 x i8> @llvm.riscv.sf.vc.v.i.nxv4i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1319 1320define <vscale x 8 x i8> @test_sf_vc_v_i_e8m1(iXLen %vl) { 1321; CHECK-LABEL: test_sf_vc_v_i_e8m1: 1322; CHECK: # %bb.0: # %entry 1323; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma 1324; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1325; CHECK-NEXT: ret 1326entry: 1327 %0 = tail call <vscale x 8 x i8> @llvm.riscv.sf.vc.v.i.nxv8i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1328 ret <vscale x 8 x i8> %0 1329} 1330 1331declare <vscale x 8 x i8> @llvm.riscv.sf.vc.v.i.nxv8i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1332 1333define <vscale x 16 x i8> @test_sf_vc_v_i_e8m2(iXLen %vl) { 1334; CHECK-LABEL: test_sf_vc_v_i_e8m2: 1335; CHECK: # %bb.0: # %entry 1336; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma 1337; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1338; CHECK-NEXT: ret 1339entry: 1340 %0 = tail call <vscale x 16 x i8> @llvm.riscv.sf.vc.v.i.nxv16i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1341 ret <vscale x 16 x i8> %0 1342} 1343 1344declare <vscale x 16 x i8> @llvm.riscv.sf.vc.v.i.nxv16i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1345 1346define <vscale x 32 x i8> @test_sf_vc_v_i_e8m4(iXLen %vl) { 1347; CHECK-LABEL: test_sf_vc_v_i_e8m4: 1348; CHECK: # %bb.0: # %entry 1349; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma 1350; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1351; CHECK-NEXT: ret 1352entry: 1353 %0 = tail call <vscale x 32 x i8> @llvm.riscv.sf.vc.v.i.nxv32i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1354 ret <vscale x 32 x i8> %0 1355} 1356 1357declare <vscale x 32 x i8> @llvm.riscv.sf.vc.v.i.nxv32i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1358 1359define <vscale x 64 x i8> @test_sf_vc_v_i_e8m8(iXLen %vl) { 1360; CHECK-LABEL: test_sf_vc_v_i_e8m8: 1361; CHECK: # %bb.0: # %entry 1362; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma 1363; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1364; CHECK-NEXT: ret 1365entry: 1366 %0 = tail call <vscale x 64 x i8> @llvm.riscv.sf.vc.v.i.nxv64i8.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1367 ret <vscale x 64 x i8> %0 1368} 1369 1370declare <vscale x 64 x i8> @llvm.riscv.sf.vc.v.i.nxv64i8.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1371 1372define <vscale x 1 x i16> @test_sf_vc_v_i_e16mf4(iXLen %vl) { 1373; CHECK-LABEL: test_sf_vc_v_i_e16mf4: 1374; CHECK: # %bb.0: # %entry 1375; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma 1376; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1377; CHECK-NEXT: ret 1378entry: 1379 %0 = tail call <vscale x 1 x i16> @llvm.riscv.sf.vc.v.i.nxv1i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1380 ret <vscale x 1 x i16> %0 1381} 1382 1383declare <vscale x 1 x i16> @llvm.riscv.sf.vc.v.i.nxv1i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1384 1385define <vscale x 2 x i16> @test_sf_vc_v_i_e16mf2(iXLen %vl) { 1386; CHECK-LABEL: test_sf_vc_v_i_e16mf2: 1387; CHECK: # %bb.0: # %entry 1388; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma 1389; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1390; CHECK-NEXT: ret 1391entry: 1392 %0 = tail call <vscale x 2 x i16> @llvm.riscv.sf.vc.v.i.nxv2i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1393 ret <vscale x 2 x i16> %0 1394} 1395 1396declare <vscale x 2 x i16> @llvm.riscv.sf.vc.v.i.nxv2i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1397 1398define <vscale x 4 x i16> @test_sf_vc_v_i_e16m1(iXLen %vl) { 1399; CHECK-LABEL: test_sf_vc_v_i_e16m1: 1400; CHECK: # %bb.0: # %entry 1401; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma 1402; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1403; CHECK-NEXT: ret 1404entry: 1405 %0 = tail call <vscale x 4 x i16> @llvm.riscv.sf.vc.v.i.nxv4i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1406 ret <vscale x 4 x i16> %0 1407} 1408 1409declare <vscale x 4 x i16> @llvm.riscv.sf.vc.v.i.nxv4i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1410 1411define <vscale x 8 x i16> @test_sf_vc_v_i_e16m2(iXLen %vl) { 1412; CHECK-LABEL: test_sf_vc_v_i_e16m2: 1413; CHECK: # %bb.0: # %entry 1414; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma 1415; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1416; CHECK-NEXT: ret 1417entry: 1418 %0 = tail call <vscale x 8 x i16> @llvm.riscv.sf.vc.v.i.nxv8i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1419 ret <vscale x 8 x i16> %0 1420} 1421 1422declare <vscale x 8 x i16> @llvm.riscv.sf.vc.v.i.nxv8i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1423 1424define <vscale x 16 x i16> @test_sf_vc_v_i_e16m4(iXLen %vl) { 1425; CHECK-LABEL: test_sf_vc_v_i_e16m4: 1426; CHECK: # %bb.0: # %entry 1427; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma 1428; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1429; CHECK-NEXT: ret 1430entry: 1431 %0 = tail call <vscale x 16 x i16> @llvm.riscv.sf.vc.v.i.nxv16i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1432 ret <vscale x 16 x i16> %0 1433} 1434 1435declare <vscale x 16 x i16> @llvm.riscv.sf.vc.v.i.nxv16i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1436 1437define <vscale x 32 x i16> @test_sf_vc_v_i_e16m8(iXLen %vl) { 1438; CHECK-LABEL: test_sf_vc_v_i_e16m8: 1439; CHECK: # %bb.0: # %entry 1440; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma 1441; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1442; CHECK-NEXT: ret 1443entry: 1444 %0 = tail call <vscale x 32 x i16> @llvm.riscv.sf.vc.v.i.nxv32i16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1445 ret <vscale x 32 x i16> %0 1446} 1447 1448declare <vscale x 32 x i16> @llvm.riscv.sf.vc.v.i.nxv32i16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1449 1450define <vscale x 1 x i32> @test_sf_vc_v_i_e32mf2(iXLen %vl) { 1451; CHECK-LABEL: test_sf_vc_v_i_e32mf2: 1452; CHECK: # %bb.0: # %entry 1453; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma 1454; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1455; CHECK-NEXT: ret 1456entry: 1457 %0 = tail call <vscale x 1 x i32> @llvm.riscv.sf.vc.v.i.nxv1i32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1458 ret <vscale x 1 x i32> %0 1459} 1460 1461declare <vscale x 1 x i32> @llvm.riscv.sf.vc.v.i.nxv1i32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1462 1463define <vscale x 2 x i32> @test_sf_vc_v_i_e32m1(iXLen %vl) { 1464; CHECK-LABEL: test_sf_vc_v_i_e32m1: 1465; CHECK: # %bb.0: # %entry 1466; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma 1467; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1468; CHECK-NEXT: ret 1469entry: 1470 %0 = tail call <vscale x 2 x i32> @llvm.riscv.sf.vc.v.i.nxv2i32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1471 ret <vscale x 2 x i32> %0 1472} 1473 1474declare <vscale x 2 x i32> @llvm.riscv.sf.vc.v.i.nxv2i32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1475 1476define <vscale x 4 x i32> @test_sf_vc_v_i_e32m2(iXLen %vl) { 1477; CHECK-LABEL: test_sf_vc_v_i_e32m2: 1478; CHECK: # %bb.0: # %entry 1479; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma 1480; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1481; CHECK-NEXT: ret 1482entry: 1483 %0 = tail call <vscale x 4 x i32> @llvm.riscv.sf.vc.v.i.nxv4i32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1484 ret <vscale x 4 x i32> %0 1485} 1486 1487declare <vscale x 4 x i32> @llvm.riscv.sf.vc.v.i.nxv4i32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1488 1489define <vscale x 8 x i32> @test_sf_vc_v_i_e32m4(iXLen %vl) { 1490; CHECK-LABEL: test_sf_vc_v_i_e32m4: 1491; CHECK: # %bb.0: # %entry 1492; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma 1493; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1494; CHECK-NEXT: ret 1495entry: 1496 %0 = tail call <vscale x 8 x i32> @llvm.riscv.sf.vc.v.i.nxv8i32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1497 ret <vscale x 8 x i32> %0 1498} 1499 1500declare <vscale x 8 x i32> @llvm.riscv.sf.vc.v.i.nxv8i32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1501 1502define <vscale x 16 x i32> @test_sf_vc_v_i_e32m8(iXLen %vl) { 1503; CHECK-LABEL: test_sf_vc_v_i_e32m8: 1504; CHECK: # %bb.0: # %entry 1505; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma 1506; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1507; CHECK-NEXT: ret 1508entry: 1509 %0 = tail call <vscale x 16 x i32> @llvm.riscv.sf.vc.v.i.nxv16i32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1510 ret <vscale x 16 x i32> %0 1511} 1512 1513declare <vscale x 16 x i32> @llvm.riscv.sf.vc.v.i.nxv16i32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1514 1515define <vscale x 1 x i64> @test_sf_vc_v_i_e64m1(iXLen %vl) { 1516; CHECK-LABEL: test_sf_vc_v_i_e64m1: 1517; CHECK: # %bb.0: # %entry 1518; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma 1519; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1520; CHECK-NEXT: ret 1521entry: 1522 %0 = tail call <vscale x 1 x i64> @llvm.riscv.sf.vc.v.i.nxv1i64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1523 ret <vscale x 1 x i64> %0 1524} 1525 1526declare <vscale x 1 x i64> @llvm.riscv.sf.vc.v.i.nxv1i64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1527 1528define <vscale x 2 x i64> @test_sf_vc_v_i_e64m2(iXLen %vl) { 1529; CHECK-LABEL: test_sf_vc_v_i_e64m2: 1530; CHECK: # %bb.0: # %entry 1531; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma 1532; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1533; CHECK-NEXT: ret 1534entry: 1535 %0 = tail call <vscale x 2 x i64> @llvm.riscv.sf.vc.v.i.nxv2i64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1536 ret <vscale x 2 x i64> %0 1537} 1538 1539declare <vscale x 2 x i64> @llvm.riscv.sf.vc.v.i.nxv2i64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1540 1541define <vscale x 4 x i64> @test_sf_vc_v_i_e64m4(iXLen %vl) { 1542; CHECK-LABEL: test_sf_vc_v_i_e64m4: 1543; CHECK: # %bb.0: # %entry 1544; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 1545; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1546; CHECK-NEXT: ret 1547entry: 1548 %0 = tail call <vscale x 4 x i64> @llvm.riscv.sf.vc.v.i.nxv4i64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1549 ret <vscale x 4 x i64> %0 1550} 1551 1552declare <vscale x 4 x i64> @llvm.riscv.sf.vc.v.i.nxv4i64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1553 1554define <vscale x 8 x i64> @test_sf_vc_v_i_e64m8(iXLen %vl) { 1555; CHECK-LABEL: test_sf_vc_v_i_e64m8: 1556; CHECK: # %bb.0: # %entry 1557; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma 1558; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1559; CHECK-NEXT: ret 1560entry: 1561 %0 = tail call <vscale x 8 x i64> @llvm.riscv.sf.vc.v.i.nxv8i64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1562 ret <vscale x 8 x i64> %0 1563} 1564 1565declare <vscale x 8 x i64> @llvm.riscv.sf.vc.v.i.nxv8i64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1566 1567define <vscale x 1 x half> @test_f_sf_vc_v_i_se_e16mf4(iXLen %vl) { 1568; CHECK-LABEL: test_f_sf_vc_v_i_se_e16mf4: 1569; CHECK: # %bb.0: # %entry 1570; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma 1571; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1572; CHECK-NEXT: ret 1573entry: 1574 %0 = tail call <vscale x 1 x half> @llvm.riscv.sf.vc.v.i.se.nxv1f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1575 ret <vscale x 1 x half> %0 1576} 1577 1578declare <vscale x 1 x half> @llvm.riscv.sf.vc.v.i.se.nxv1f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1579 1580define <vscale x 2 x half> @test_f_sf_vc_v_i_se_e16mf2(iXLen %vl) { 1581; CHECK-LABEL: test_f_sf_vc_v_i_se_e16mf2: 1582; CHECK: # %bb.0: # %entry 1583; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma 1584; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1585; CHECK-NEXT: ret 1586entry: 1587 %0 = tail call <vscale x 2 x half> @llvm.riscv.sf.vc.v.i.se.nxv2f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1588 ret <vscale x 2 x half> %0 1589} 1590 1591declare <vscale x 2 x half> @llvm.riscv.sf.vc.v.i.se.nxv2f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1592 1593define <vscale x 4 x half> @test_f_sf_vc_v_i_se_e16m1(iXLen %vl) { 1594; CHECK-LABEL: test_f_sf_vc_v_i_se_e16m1: 1595; CHECK: # %bb.0: # %entry 1596; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma 1597; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1598; CHECK-NEXT: ret 1599entry: 1600 %0 = tail call <vscale x 4 x half> @llvm.riscv.sf.vc.v.i.se.nxv4f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1601 ret <vscale x 4 x half> %0 1602} 1603 1604declare <vscale x 4 x half> @llvm.riscv.sf.vc.v.i.se.nxv4f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1605 1606define <vscale x 8 x half> @test_f_sf_vc_v_i_se_e16m2(iXLen %vl) { 1607; CHECK-LABEL: test_f_sf_vc_v_i_se_e16m2: 1608; CHECK: # %bb.0: # %entry 1609; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma 1610; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1611; CHECK-NEXT: ret 1612entry: 1613 %0 = tail call <vscale x 8 x half> @llvm.riscv.sf.vc.v.i.se.nxv8f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1614 ret <vscale x 8 x half> %0 1615} 1616 1617declare <vscale x 8 x half> @llvm.riscv.sf.vc.v.i.se.nxv8f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1618 1619define <vscale x 16 x half> @test_f_sf_vc_v_i_se_e16m4(iXLen %vl) { 1620; CHECK-LABEL: test_f_sf_vc_v_i_se_e16m4: 1621; CHECK: # %bb.0: # %entry 1622; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma 1623; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1624; CHECK-NEXT: ret 1625entry: 1626 %0 = tail call <vscale x 16 x half> @llvm.riscv.sf.vc.v.i.se.nxv16f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1627 ret <vscale x 16 x half> %0 1628} 1629 1630declare <vscale x 16 x half> @llvm.riscv.sf.vc.v.i.se.nxv16f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1631 1632define <vscale x 32 x half> @test_f_sf_vc_v_i_se_e16m8(iXLen %vl) { 1633; CHECK-LABEL: test_f_sf_vc_v_i_se_e16m8: 1634; CHECK: # %bb.0: # %entry 1635; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma 1636; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1637; CHECK-NEXT: ret 1638entry: 1639 %0 = tail call <vscale x 32 x half> @llvm.riscv.sf.vc.v.i.se.nxv32f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1640 ret <vscale x 32 x half> %0 1641} 1642 1643declare <vscale x 32 x half> @llvm.riscv.sf.vc.v.i.se.nxv32f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1644 1645define <vscale x 1 x float> @test_f_sf_vc_v_i_se_e32mf2(iXLen %vl) { 1646; CHECK-LABEL: test_f_sf_vc_v_i_se_e32mf2: 1647; CHECK: # %bb.0: # %entry 1648; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma 1649; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1650; CHECK-NEXT: ret 1651entry: 1652 %0 = tail call <vscale x 1 x float> @llvm.riscv.sf.vc.v.i.se.nxv1f32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1653 ret <vscale x 1 x float> %0 1654} 1655 1656declare <vscale x 1 x float> @llvm.riscv.sf.vc.v.i.se.nxv1f32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1657 1658define <vscale x 2 x float> @test_f_sf_vc_v_i_se_e32m1(iXLen %vl) { 1659; CHECK-LABEL: test_f_sf_vc_v_i_se_e32m1: 1660; CHECK: # %bb.0: # %entry 1661; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma 1662; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1663; CHECK-NEXT: ret 1664entry: 1665 %0 = tail call <vscale x 2 x float> @llvm.riscv.sf.vc.v.i.se.nxv2f32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1666 ret <vscale x 2 x float> %0 1667} 1668 1669declare <vscale x 2 x float> @llvm.riscv.sf.vc.v.i.se.nxv2f32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1670 1671define <vscale x 4 x float> @test_f_sf_vc_v_i_se_e32m2(iXLen %vl) { 1672; CHECK-LABEL: test_f_sf_vc_v_i_se_e32m2: 1673; CHECK: # %bb.0: # %entry 1674; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma 1675; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1676; CHECK-NEXT: ret 1677entry: 1678 %0 = tail call <vscale x 4 x float> @llvm.riscv.sf.vc.v.i.se.nxv4f32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1679 ret <vscale x 4 x float> %0 1680} 1681 1682declare <vscale x 4 x float> @llvm.riscv.sf.vc.v.i.se.nxv4f32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1683 1684define <vscale x 8 x float> @test_f_sf_vc_v_i_se_e32m4(iXLen %vl) { 1685; CHECK-LABEL: test_f_sf_vc_v_i_se_e32m4: 1686; CHECK: # %bb.0: # %entry 1687; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma 1688; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1689; CHECK-NEXT: ret 1690entry: 1691 %0 = tail call <vscale x 8 x float> @llvm.riscv.sf.vc.v.i.se.nxv8f32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1692 ret <vscale x 8 x float> %0 1693} 1694 1695declare <vscale x 8 x float> @llvm.riscv.sf.vc.v.i.se.nxv8f32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1696 1697define <vscale x 16 x float> @test_f_sf_vc_v_i_se_e32m8(iXLen %vl) { 1698; CHECK-LABEL: test_f_sf_vc_v_i_se_e32m8: 1699; CHECK: # %bb.0: # %entry 1700; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma 1701; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1702; CHECK-NEXT: ret 1703entry: 1704 %0 = tail call <vscale x 16 x float> @llvm.riscv.sf.vc.v.i.se.nxv16f32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1705 ret <vscale x 16 x float> %0 1706} 1707 1708declare <vscale x 16 x float> @llvm.riscv.sf.vc.v.i.se.nxv16f32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1709 1710define <vscale x 1 x double> @test_f_sf_vc_v_i_se_e64m1(iXLen %vl) { 1711; CHECK-LABEL: test_f_sf_vc_v_i_se_e64m1: 1712; CHECK: # %bb.0: # %entry 1713; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma 1714; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1715; CHECK-NEXT: ret 1716entry: 1717 %0 = tail call <vscale x 1 x double> @llvm.riscv.sf.vc.v.i.se.nxv1f64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1718 ret <vscale x 1 x double> %0 1719} 1720 1721declare <vscale x 1 x double> @llvm.riscv.sf.vc.v.i.se.nxv1f64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1722 1723define <vscale x 2 x double> @test_f_sf_vc_v_i_se_e64m2(iXLen %vl) { 1724; CHECK-LABEL: test_f_sf_vc_v_i_se_e64m2: 1725; CHECK: # %bb.0: # %entry 1726; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma 1727; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1728; CHECK-NEXT: ret 1729entry: 1730 %0 = tail call <vscale x 2 x double> @llvm.riscv.sf.vc.v.i.se.nxv2f64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1731 ret <vscale x 2 x double> %0 1732} 1733 1734declare <vscale x 2 x double> @llvm.riscv.sf.vc.v.i.se.nxv2f64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1735 1736define <vscale x 4 x double> @test_f_sf_vc_v_i_se_e64m4(iXLen %vl) { 1737; CHECK-LABEL: test_f_sf_vc_v_i_se_e64m4: 1738; CHECK: # %bb.0: # %entry 1739; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 1740; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1741; CHECK-NEXT: ret 1742entry: 1743 %0 = tail call <vscale x 4 x double> @llvm.riscv.sf.vc.v.i.se.nxv4f64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1744 ret <vscale x 4 x double> %0 1745} 1746 1747declare <vscale x 4 x double> @llvm.riscv.sf.vc.v.i.se.nxv4f64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1748 1749define <vscale x 8 x double> @test_f_sf_vc_v_i_se_e64m8(iXLen %vl) { 1750; CHECK-LABEL: test_f_sf_vc_v_i_se_e64m8: 1751; CHECK: # %bb.0: # %entry 1752; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma 1753; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1754; CHECK-NEXT: ret 1755entry: 1756 %0 = tail call <vscale x 8 x double> @llvm.riscv.sf.vc.v.i.se.nxv8f64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1757 ret <vscale x 8 x double> %0 1758} 1759 1760declare <vscale x 8 x double> @llvm.riscv.sf.vc.v.i.se.nxv8f64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1761 1762define <vscale x 1 x half> @test_f_sf_vc_v_i_e16mf4(iXLen %vl) { 1763; CHECK-LABEL: test_f_sf_vc_v_i_e16mf4: 1764; CHECK: # %bb.0: # %entry 1765; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma 1766; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1767; CHECK-NEXT: ret 1768entry: 1769 %0 = tail call <vscale x 1 x half> @llvm.riscv.sf.vc.v.i.nxv1f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1770 ret <vscale x 1 x half> %0 1771} 1772 1773declare <vscale x 1 x half> @llvm.riscv.sf.vc.v.i.nxv1f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1774 1775define <vscale x 2 x half> @test_f_sf_vc_v_i_e16mf2(iXLen %vl) { 1776; CHECK-LABEL: test_f_sf_vc_v_i_e16mf2: 1777; CHECK: # %bb.0: # %entry 1778; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma 1779; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1780; CHECK-NEXT: ret 1781entry: 1782 %0 = tail call <vscale x 2 x half> @llvm.riscv.sf.vc.v.i.nxv2f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1783 ret <vscale x 2 x half> %0 1784} 1785 1786declare <vscale x 2 x half> @llvm.riscv.sf.vc.v.i.nxv2f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1787 1788define <vscale x 4 x half> @test_f_sf_vc_v_i_e16m1(iXLen %vl) { 1789; CHECK-LABEL: test_f_sf_vc_v_i_e16m1: 1790; CHECK: # %bb.0: # %entry 1791; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma 1792; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1793; CHECK-NEXT: ret 1794entry: 1795 %0 = tail call <vscale x 4 x half> @llvm.riscv.sf.vc.v.i.nxv4f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1796 ret <vscale x 4 x half> %0 1797} 1798 1799declare <vscale x 4 x half> @llvm.riscv.sf.vc.v.i.nxv4f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1800 1801define <vscale x 8 x half> @test_f_sf_vc_v_i_e16m2(iXLen %vl) { 1802; CHECK-LABEL: test_f_sf_vc_v_i_e16m2: 1803; CHECK: # %bb.0: # %entry 1804; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma 1805; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1806; CHECK-NEXT: ret 1807entry: 1808 %0 = tail call <vscale x 8 x half> @llvm.riscv.sf.vc.v.i.nxv8f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1809 ret <vscale x 8 x half> %0 1810} 1811 1812declare <vscale x 8 x half> @llvm.riscv.sf.vc.v.i.nxv8f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1813 1814define <vscale x 16 x half> @test_f_sf_vc_v_i_e16m4(iXLen %vl) { 1815; CHECK-LABEL: test_f_sf_vc_v_i_e16m4: 1816; CHECK: # %bb.0: # %entry 1817; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma 1818; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1819; CHECK-NEXT: ret 1820entry: 1821 %0 = tail call <vscale x 16 x half> @llvm.riscv.sf.vc.v.i.nxv16f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1822 ret <vscale x 16 x half> %0 1823} 1824 1825declare <vscale x 16 x half> @llvm.riscv.sf.vc.v.i.nxv16f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1826 1827define <vscale x 32 x half> @test_f_sf_vc_v_i_e16m8(iXLen %vl) { 1828; CHECK-LABEL: test_f_sf_vc_v_i_e16m8: 1829; CHECK: # %bb.0: # %entry 1830; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma 1831; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1832; CHECK-NEXT: ret 1833entry: 1834 %0 = tail call <vscale x 32 x half> @llvm.riscv.sf.vc.v.i.nxv32f16.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1835 ret <vscale x 32 x half> %0 1836} 1837 1838declare <vscale x 32 x half> @llvm.riscv.sf.vc.v.i.nxv32f16.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1839 1840define <vscale x 1 x float> @test_f_sf_vc_v_i_e32mf2(iXLen %vl) { 1841; CHECK-LABEL: test_f_sf_vc_v_i_e32mf2: 1842; CHECK: # %bb.0: # %entry 1843; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma 1844; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1845; CHECK-NEXT: ret 1846entry: 1847 %0 = tail call <vscale x 1 x float> @llvm.riscv.sf.vc.v.i.nxv1f32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1848 ret <vscale x 1 x float> %0 1849} 1850 1851declare <vscale x 1 x float> @llvm.riscv.sf.vc.v.i.nxv1f32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1852 1853define <vscale x 2 x float> @test_f_sf_vc_v_i_e32m1(iXLen %vl) { 1854; CHECK-LABEL: test_f_sf_vc_v_i_e32m1: 1855; CHECK: # %bb.0: # %entry 1856; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma 1857; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1858; CHECK-NEXT: ret 1859entry: 1860 %0 = tail call <vscale x 2 x float> @llvm.riscv.sf.vc.v.i.nxv2f32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1861 ret <vscale x 2 x float> %0 1862} 1863 1864declare <vscale x 2 x float> @llvm.riscv.sf.vc.v.i.nxv2f32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1865 1866define <vscale x 4 x float> @test_f_sf_vc_v_i_e32m2(iXLen %vl) { 1867; CHECK-LABEL: test_f_sf_vc_v_i_e32m2: 1868; CHECK: # %bb.0: # %entry 1869; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma 1870; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1871; CHECK-NEXT: ret 1872entry: 1873 %0 = tail call <vscale x 4 x float> @llvm.riscv.sf.vc.v.i.nxv4f32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1874 ret <vscale x 4 x float> %0 1875} 1876 1877declare <vscale x 4 x float> @llvm.riscv.sf.vc.v.i.nxv4f32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1878 1879define <vscale x 8 x float> @test_f_sf_vc_v_i_e32m4(iXLen %vl) { 1880; CHECK-LABEL: test_f_sf_vc_v_i_e32m4: 1881; CHECK: # %bb.0: # %entry 1882; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma 1883; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1884; CHECK-NEXT: ret 1885entry: 1886 %0 = tail call <vscale x 8 x float> @llvm.riscv.sf.vc.v.i.nxv8f32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1887 ret <vscale x 8 x float> %0 1888} 1889 1890declare <vscale x 8 x float> @llvm.riscv.sf.vc.v.i.nxv8f32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1891 1892define <vscale x 16 x float> @test_f_sf_vc_v_i_e32m8(iXLen %vl) { 1893; CHECK-LABEL: test_f_sf_vc_v_i_e32m8: 1894; CHECK: # %bb.0: # %entry 1895; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma 1896; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1897; CHECK-NEXT: ret 1898entry: 1899 %0 = tail call <vscale x 16 x float> @llvm.riscv.sf.vc.v.i.nxv16f32.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1900 ret <vscale x 16 x float> %0 1901} 1902 1903declare <vscale x 16 x float> @llvm.riscv.sf.vc.v.i.nxv16f32.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1904 1905define <vscale x 1 x double> @test_f_sf_vc_v_i_e64m1(iXLen %vl) { 1906; CHECK-LABEL: test_f_sf_vc_v_i_e64m1: 1907; CHECK: # %bb.0: # %entry 1908; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma 1909; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1910; CHECK-NEXT: ret 1911entry: 1912 %0 = tail call <vscale x 1 x double> @llvm.riscv.sf.vc.v.i.nxv1f64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1913 ret <vscale x 1 x double> %0 1914} 1915 1916declare <vscale x 1 x double> @llvm.riscv.sf.vc.v.i.nxv1f64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1917 1918define <vscale x 2 x double> @test_f_sf_vc_v_i_e64m2(iXLen %vl) { 1919; CHECK-LABEL: test_f_sf_vc_v_i_e64m2: 1920; CHECK: # %bb.0: # %entry 1921; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma 1922; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1923; CHECK-NEXT: ret 1924entry: 1925 %0 = tail call <vscale x 2 x double> @llvm.riscv.sf.vc.v.i.nxv2f64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1926 ret <vscale x 2 x double> %0 1927} 1928 1929declare <vscale x 2 x double> @llvm.riscv.sf.vc.v.i.nxv2f64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1930 1931define <vscale x 4 x double> @test_f_sf_vc_v_i_e64m4(iXLen %vl) { 1932; CHECK-LABEL: test_f_sf_vc_v_i_e64m4: 1933; CHECK: # %bb.0: # %entry 1934; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma 1935; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1936; CHECK-NEXT: ret 1937entry: 1938 %0 = tail call <vscale x 4 x double> @llvm.riscv.sf.vc.v.i.nxv4f64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1939 ret <vscale x 4 x double> %0 1940} 1941 1942declare <vscale x 4 x double> @llvm.riscv.sf.vc.v.i.nxv4f64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1943 1944define <vscale x 8 x double> @test_f_sf_vc_v_i_e64m8(iXLen %vl) { 1945; CHECK-LABEL: test_f_sf_vc_v_i_e64m8: 1946; CHECK: # %bb.0: # %entry 1947; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma 1948; CHECK-NEXT: sf.vc.v.i 3, 31, v8, 10 1949; CHECK-NEXT: ret 1950entry: 1951 %0 = tail call <vscale x 8 x double> @llvm.riscv.sf.vc.v.i.nxv8f64.iXLen.iXLen.iXLen(iXLen 3, iXLen 31, iXLen 10, iXLen %vl) 1952 ret <vscale x 8 x double> %0 1953} 1954 1955declare <vscale x 8 x double> @llvm.riscv.sf.vc.v.i.nxv8f64.iXLen.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 1956 1957define <vscale x 1 x half> @test_sf_vc_fv_x_se_e16mf4(i16 %rs1, iXLen %vl) { 1958; CHECK-LABEL: test_sf_vc_fv_x_se_e16mf4: 1959; CHECK: # %bb.0: # %entry 1960; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma 1961; CHECK-NEXT: sf.vc.v.x 3, 4, v8, a0 1962; CHECK-NEXT: ret 1963entry: 1964 %0 = tail call <vscale x 1 x half> @llvm.riscv.sf.vc.v.x.se.nxv1f16.i16.iXLen(iXLen 3, iXLen 4, i16 %rs1, iXLen %vl) 1965 ret <vscale x 1 x half> %0 1966} 1967 1968declare <vscale x 1 x half> @llvm.riscv.sf.vc.v.x.se.nxv1f16.i16.iXLen(iXLen, iXLen, i16, iXLen) 1969 1970define <vscale x 2 x half> @test_sf_vc_fv_x_se_e16mf2(i16 %rs1, iXLen %vl) { 1971; CHECK-LABEL: test_sf_vc_fv_x_se_e16mf2: 1972; CHECK: # %bb.0: # %entry 1973; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma 1974; CHECK-NEXT: sf.vc.v.x 3, 4, v8, a0 1975; CHECK-NEXT: ret 1976entry: 1977 %0 = tail call <vscale x 2 x half> @llvm.riscv.sf.vc.v.x.se.nxv2f16.i16.iXLen(iXLen 3, iXLen 4, i16 %rs1, iXLen %vl) 1978 ret <vscale x 2 x half> %0 1979} 1980 1981declare <vscale x 2 x half> @llvm.riscv.sf.vc.v.x.se.nxv2f16.i16.iXLen(iXLen, iXLen, i16, iXLen) 1982 1983define <vscale x 4 x half> @test_sf_vc_fv_x_se_e16m1(i16 %rs1, iXLen %vl) { 1984; CHECK-LABEL: test_sf_vc_fv_x_se_e16m1: 1985; CHECK: # %bb.0: # %entry 1986; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma 1987; CHECK-NEXT: sf.vc.v.x 3, 4, v8, a0 1988; CHECK-NEXT: ret 1989entry: 1990 %0 = tail call <vscale x 4 x half> @llvm.riscv.sf.vc.v.x.se.nxv4f16.i16.iXLen(iXLen 3, iXLen 4, i16 %rs1, iXLen %vl) 1991 ret <vscale x 4 x half> %0 1992} 1993 1994declare <vscale x 4 x half> @llvm.riscv.sf.vc.v.x.se.nxv4f16.i16.iXLen(iXLen, iXLen, i16, iXLen) 1995 1996define <vscale x 8 x half> @test_sf_vc_fv_x_se_e16m2(i16 %rs1, iXLen %vl) { 1997; CHECK-LABEL: test_sf_vc_fv_x_se_e16m2: 1998; CHECK: # %bb.0: # %entry 1999; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma 2000; CHECK-NEXT: sf.vc.v.x 3, 4, v8, a0 2001; CHECK-NEXT: ret 2002entry: 2003 %0 = tail call <vscale x 8 x half> @llvm.riscv.sf.vc.v.x.se.nxv8f16.i16.iXLen(iXLen 3, iXLen 4, i16 %rs1, iXLen %vl) 2004 ret <vscale x 8 x half> %0 2005} 2006 2007declare <vscale x 8 x half> @llvm.riscv.sf.vc.v.x.se.nxv8f16.i16.iXLen(iXLen, iXLen, i16, iXLen) 2008 2009define <vscale x 16 x half> @test_sf_vc_fv_x_se_e16m4(i16 %rs1, iXLen %vl) { 2010; CHECK-LABEL: test_sf_vc_fv_x_se_e16m4: 2011; CHECK: # %bb.0: # %entry 2012; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma 2013; CHECK-NEXT: sf.vc.v.x 3, 4, v8, a0 2014; CHECK-NEXT: ret 2015entry: 2016 %0 = tail call <vscale x 16 x half> @llvm.riscv.sf.vc.v.x.se.nxv16f16.i16.iXLen(iXLen 3, iXLen 4, i16 %rs1, iXLen %vl) 2017 ret <vscale x 16 x half> %0 2018} 2019 2020declare <vscale x 16 x half> @llvm.riscv.sf.vc.v.x.se.nxv16f16.i16.iXLen(iXLen, iXLen, i16, iXLen) 2021 2022define <vscale x 32 x half> @test_sf_vc_fv_x_se_e16m8(i16 %rs1, iXLen %vl) { 2023; CHECK-LABEL: test_sf_vc_fv_x_se_e16m8: 2024; CHECK: # %bb.0: # %entry 2025; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma 2026; CHECK-NEXT: sf.vc.v.x 3, 4, v8, a0 2027; CHECK-NEXT: ret 2028entry: 2029 %0 = tail call <vscale x 32 x half> @llvm.riscv.sf.vc.v.x.se.nxv32f16.i16.iXLen(iXLen 3, iXLen 4, i16 %rs1, iXLen %vl) 2030 ret <vscale x 32 x half> %0 2031} 2032 2033declare <vscale x 32 x half> @llvm.riscv.sf.vc.v.x.se.nxv32f16.i16.iXLen(iXLen, iXLen, i16, iXLen) 2034 2035define <vscale x 1 x float> @test_sf_vc_fv_x_se_e32mf2(i32 %rs1, iXLen %vl) { 2036; CHECK-LABEL: test_sf_vc_fv_x_se_e32mf2: 2037; CHECK: # %bb.0: # %entry 2038; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma 2039; CHECK-NEXT: sf.vc.v.x 3, 4, v8, a0 2040; CHECK-NEXT: ret 2041entry: 2042 %0 = tail call <vscale x 1 x float> @llvm.riscv.sf.vc.v.x.se.nxv1f32.i32.iXLen(iXLen 3, iXLen 4, i32 %rs1, iXLen %vl) 2043 ret <vscale x 1 x float> %0 2044} 2045 2046declare <vscale x 1 x float> @llvm.riscv.sf.vc.v.x.se.nxv1f32.i32.iXLen(iXLen, iXLen, i32, iXLen) 2047 2048define <vscale x 2 x float> @test_sf_vc_fv_x_se_e32m1(i32 %rs1, iXLen %vl) { 2049; CHECK-LABEL: test_sf_vc_fv_x_se_e32m1: 2050; CHECK: # %bb.0: # %entry 2051; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma 2052; CHECK-NEXT: sf.vc.v.x 3, 4, v8, a0 2053; CHECK-NEXT: ret 2054entry: 2055 %0 = tail call <vscale x 2 x float> @llvm.riscv.sf.vc.v.x.se.nxv2f32.i32.iXLen(iXLen 3, iXLen 4, i32 %rs1, iXLen %vl) 2056 ret <vscale x 2 x float> %0 2057} 2058 2059declare <vscale x 2 x float> @llvm.riscv.sf.vc.v.x.se.nxv2f32.i32.iXLen(iXLen, iXLen, i32, iXLen) 2060 2061define <vscale x 4 x float> @test_sf_vc_fv_x_se_e32m2(i32 %rs1, iXLen %vl) { 2062; CHECK-LABEL: test_sf_vc_fv_x_se_e32m2: 2063; CHECK: # %bb.0: # %entry 2064; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma 2065; CHECK-NEXT: sf.vc.v.x 3, 4, v8, a0 2066; CHECK-NEXT: ret 2067entry: 2068 %0 = tail call <vscale x 4 x float> @llvm.riscv.sf.vc.v.x.se.nxv4f32.i32.iXLen(iXLen 3, iXLen 4, i32 %rs1, iXLen %vl) 2069 ret <vscale x 4 x float> %0 2070} 2071 2072declare <vscale x 4 x float> @llvm.riscv.sf.vc.v.x.se.nxv4f32.i32.iXLen(iXLen, iXLen, i32, iXLen) 2073 2074define <vscale x 8 x float> @test_sf_vc_fv_x_se_e32m4(i32 %rs1, iXLen %vl) { 2075; CHECK-LABEL: test_sf_vc_fv_x_se_e32m4: 2076; CHECK: # %bb.0: # %entry 2077; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma 2078; CHECK-NEXT: sf.vc.v.x 3, 4, v8, a0 2079; CHECK-NEXT: ret 2080entry: 2081 %0 = tail call <vscale x 8 x float> @llvm.riscv.sf.vc.v.x.se.nxv8f32.i32.iXLen(iXLen 3, iXLen 4, i32 %rs1, iXLen %vl) 2082 ret <vscale x 8 x float> %0 2083} 2084 2085declare <vscale x 8 x float> @llvm.riscv.sf.vc.v.x.se.nxv8f32.i32.iXLen(iXLen, iXLen, i32, iXLen) 2086 2087define <vscale x 16 x float> @test_sf_vc_fv_x_se_e32m8(i32 %rs1, iXLen %vl) { 2088; CHECK-LABEL: test_sf_vc_fv_x_se_e32m8: 2089; CHECK: # %bb.0: # %entry 2090; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma 2091; CHECK-NEXT: sf.vc.v.x 3, 4, v8, a0 2092; CHECK-NEXT: ret 2093entry: 2094 %0 = tail call <vscale x 16 x float> @llvm.riscv.sf.vc.v.x.se.nxv16f32.i32.iXLen(iXLen 3, iXLen 4, i32 %rs1, iXLen %vl) 2095 ret <vscale x 16 x float> %0 2096} 2097 2098declare <vscale x 16 x float> @llvm.riscv.sf.vc.v.x.se.nxv16f32.i32.iXLen(iXLen, iXLen, i32, iXLen) 2099 2100define <vscale x 1 x half> @test_sf_vc_fv_i_se_e16mf4(iXLen %vl) { 2101; CHECK-LABEL: test_sf_vc_fv_i_se_e16mf4: 2102; CHECK: # %bb.0: # %entry 2103; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma 2104; CHECK-NEXT: sf.vc.v.i 3, 8, v8, 4 2105; CHECK-NEXT: ret 2106entry: 2107 %0 = tail call <vscale x 1 x half> @llvm.riscv.sf.vc.v.i.se.nxv1f16.iXLen.iXLen(iXLen 3, iXLen 8, iXLen 4, iXLen %vl) 2108 ret <vscale x 1 x half> %0 2109} 2110 2111declare <vscale x 1 x half> @llvm.riscv.sf.vc.v.i.se.nxv1f16.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 2112 2113define <vscale x 2 x half> @test_sf_vc_fv_i_se_e16mf2(iXLen %vl) { 2114; CHECK-LABEL: test_sf_vc_fv_i_se_e16mf2: 2115; CHECK: # %bb.0: # %entry 2116; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma 2117; CHECK-NEXT: sf.vc.v.i 3, 8, v8, 4 2118; CHECK-NEXT: ret 2119entry: 2120 %0 = tail call <vscale x 2 x half> @llvm.riscv.sf.vc.v.i.se.nxv2f16.iXLen.iXLen(iXLen 3, iXLen 8, iXLen 4, iXLen %vl) 2121 ret <vscale x 2 x half> %0 2122} 2123 2124declare <vscale x 2 x half> @llvm.riscv.sf.vc.v.i.se.nxv2f16.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 2125 2126define <vscale x 4 x half> @test_sf_vc_fv_i_se_e16m1(iXLen %vl) { 2127; CHECK-LABEL: test_sf_vc_fv_i_se_e16m1: 2128; CHECK: # %bb.0: # %entry 2129; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma 2130; CHECK-NEXT: sf.vc.v.i 3, 8, v8, 4 2131; CHECK-NEXT: ret 2132entry: 2133 %0 = tail call <vscale x 4 x half> @llvm.riscv.sf.vc.v.i.se.nxv4f16.iXLen.iXLen(iXLen 3, iXLen 8, iXLen 4, iXLen %vl) 2134 ret <vscale x 4 x half> %0 2135} 2136 2137declare <vscale x 4 x half> @llvm.riscv.sf.vc.v.i.se.nxv4f16.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 2138 2139define <vscale x 8 x half> @test_sf_vc_fv_i_se_e16m2(iXLen %vl) { 2140; CHECK-LABEL: test_sf_vc_fv_i_se_e16m2: 2141; CHECK: # %bb.0: # %entry 2142; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma 2143; CHECK-NEXT: sf.vc.v.i 3, 8, v8, 4 2144; CHECK-NEXT: ret 2145entry: 2146 %0 = tail call <vscale x 8 x half> @llvm.riscv.sf.vc.v.i.se.nxv8f16.iXLen.iXLen(iXLen 3, iXLen 8, iXLen 4, iXLen %vl) 2147 ret <vscale x 8 x half> %0 2148} 2149 2150declare <vscale x 8 x half> @llvm.riscv.sf.vc.v.i.se.nxv8f16.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 2151 2152define <vscale x 16 x half> @test_sf_vc_fv_i_se_e16m4(iXLen %vl) { 2153; CHECK-LABEL: test_sf_vc_fv_i_se_e16m4: 2154; CHECK: # %bb.0: # %entry 2155; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma 2156; CHECK-NEXT: sf.vc.v.i 3, 8, v8, 4 2157; CHECK-NEXT: ret 2158entry: 2159 %0 = tail call <vscale x 16 x half> @llvm.riscv.sf.vc.v.i.se.nxv16f16.iXLen.iXLen(iXLen 3, iXLen 8, iXLen 4, iXLen %vl) 2160 ret <vscale x 16 x half> %0 2161} 2162 2163declare <vscale x 16 x half> @llvm.riscv.sf.vc.v.i.se.nxv16f16.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 2164 2165define <vscale x 32 x half> @test_sf_vc_fv_i_se_e16m8(iXLen %vl) { 2166; CHECK-LABEL: test_sf_vc_fv_i_se_e16m8: 2167; CHECK: # %bb.0: # %entry 2168; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma 2169; CHECK-NEXT: sf.vc.v.i 3, 8, v8, 4 2170; CHECK-NEXT: ret 2171entry: 2172 %0 = tail call <vscale x 32 x half> @llvm.riscv.sf.vc.v.i.se.nxv32f16.iXLen.iXLen(iXLen 3, iXLen 8, iXLen 4, iXLen %vl) 2173 ret <vscale x 32 x half> %0 2174} 2175 2176declare <vscale x 32 x half> @llvm.riscv.sf.vc.v.i.se.nxv32f16.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 2177 2178define <vscale x 1 x float> @test_sf_vc_fv_i_se_e32mf2(iXLen %vl) { 2179; CHECK-LABEL: test_sf_vc_fv_i_se_e32mf2: 2180; CHECK: # %bb.0: # %entry 2181; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma 2182; CHECK-NEXT: sf.vc.v.i 3, 8, v8, 4 2183; CHECK-NEXT: ret 2184entry: 2185 %0 = tail call <vscale x 1 x float> @llvm.riscv.sf.vc.v.i.se.nxv1f32.iXLen.iXLen(iXLen 3, iXLen 8, iXLen 4, iXLen %vl) 2186 ret <vscale x 1 x float> %0 2187} 2188 2189declare <vscale x 1 x float> @llvm.riscv.sf.vc.v.i.se.nxv1f32.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 2190 2191define <vscale x 2 x float> @test_sf_vc_fv_i_se_e32m1(iXLen %vl) { 2192; CHECK-LABEL: test_sf_vc_fv_i_se_e32m1: 2193; CHECK: # %bb.0: # %entry 2194; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma 2195; CHECK-NEXT: sf.vc.v.i 3, 8, v8, 4 2196; CHECK-NEXT: ret 2197entry: 2198 %0 = tail call <vscale x 2 x float> @llvm.riscv.sf.vc.v.i.se.nxv2f32.iXLen.iXLen(iXLen 3, iXLen 8, iXLen 4, iXLen %vl) 2199 ret <vscale x 2 x float> %0 2200} 2201 2202declare <vscale x 2 x float> @llvm.riscv.sf.vc.v.i.se.nxv2f32.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 2203 2204define <vscale x 4 x float> @test_sf_vc_fv_i_se_e32m2(iXLen %vl) { 2205; CHECK-LABEL: test_sf_vc_fv_i_se_e32m2: 2206; CHECK: # %bb.0: # %entry 2207; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma 2208; CHECK-NEXT: sf.vc.v.i 3, 8, v8, 4 2209; CHECK-NEXT: ret 2210entry: 2211 %0 = tail call <vscale x 4 x float> @llvm.riscv.sf.vc.v.i.se.nxv4f32.iXLen.iXLen(iXLen 3, iXLen 8, iXLen 4, iXLen %vl) 2212 ret <vscale x 4 x float> %0 2213} 2214 2215declare <vscale x 4 x float> @llvm.riscv.sf.vc.v.i.se.nxv4f32.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 2216 2217define <vscale x 8 x float> @test_sf_vc_fv_i_se_e32m4(iXLen %vl) { 2218; CHECK-LABEL: test_sf_vc_fv_i_se_e32m4: 2219; CHECK: # %bb.0: # %entry 2220; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma 2221; CHECK-NEXT: sf.vc.v.i 3, 8, v8, 4 2222; CHECK-NEXT: ret 2223entry: 2224 %0 = tail call <vscale x 8 x float> @llvm.riscv.sf.vc.v.i.se.nxv8f32.iXLen.iXLen(iXLen 3, iXLen 8, iXLen 4, iXLen %vl) 2225 ret <vscale x 8 x float> %0 2226} 2227 2228declare <vscale x 8 x float> @llvm.riscv.sf.vc.v.i.se.nxv8f32.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 2229 2230define <vscale x 16 x float> @test_sf_vc_fv_i_se_e32m8(iXLen %vl) { 2231; CHECK-LABEL: test_sf_vc_fv_i_se_e32m8: 2232; CHECK: # %bb.0: # %entry 2233; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma 2234; CHECK-NEXT: sf.vc.v.i 3, 8, v8, 4 2235; CHECK-NEXT: ret 2236entry: 2237 %0 = tail call <vscale x 16 x float> @llvm.riscv.sf.vc.v.i.se.nxv16f32.iXLen.iXLen(iXLen 3, iXLen 8, iXLen 4, iXLen %vl) 2238 ret <vscale x 16 x float> %0 2239} 2240 2241declare <vscale x 16 x float> @llvm.riscv.sf.vc.v.i.se.nxv16f32.iXLen.iXLen(iXLen, iXLen, iXLen, iXLen) 2242