xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vxrm.mir (revision 0ebe48f068c0ca69f76ed68b621c9294acd75f76)
1# RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs -stop-after prologepilog -o - %s | FileCheck %s --check-prefix=MIR
2# RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs -o - %s | FileCheck %s --check-prefix=ASM
3
4---
5name:    verify_vxrm
6tracksRegLiveness: true
7body:     |
8  bb.0.entry:
9    liveins: $v8, $v9, $x10
10
11    ; MIR-LABEL: name: verify_vxrm
12    ; MIR: liveins: $v8, $v9, $x10
13    ; MIR-NEXT: {{  $}}
14    ; MIR-NEXT: WriteVXRMImm 0, implicit-def $vxrm
15    ; MIR-NEXT: dead $x0 = PseudoVSETVLI killed renamable $x10, 197 /* e8, mf8, ta, ma */, implicit-def $vl, implicit-def $vtype
16    ; MIR-NEXT: renamable $v8 = PseudoVAADD_VV_MF8 undef $v8, killed renamable $v8, killed renamable $v9, 0, $noreg, 3 /* e8 */, 0  /* tu, mu */, implicit $vxrm, implicit $vl, implicit $vtype
17    ; MIR-NEXT: PseudoRET implicit $v8
18    ; ASM-LABEL: verify_vxrm:
19    ; ASM:        # %bb.0:
20    ; ASM-NEXT:    csrwi	vxrm, 0
21    ; ASM-NEXT:    vsetvli	zero, a0, e8, mf8, ta, ma
22    ; ASM-NEXT:    vaadd.vv	v8, v8, v9
23    ; ASM-NEXT:    ret
24    %0:vr = COPY $v8
25    %1:vr = COPY $v9
26    %2:gprnox0 = COPY $x10
27    renamable $v8 = PseudoVAADD_VV_MF8 undef $noreg, %0, %1, 0, %2, 3 /* e8 */, 0
28    PseudoRET implicit $v8
29...
30