xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vsplats-zfa.ll (revision d8d131dfa99762ccdd2116661980b7d0493cd7b5)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+zfh,+zfa,+zvfh,+v -target-abi ilp32d -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s --check-prefixes=CHECK
4; RUN: llc -mtriple=riscv64 -mattr=+zfh,+zfa,+zvfh,+v -target-abi lp64d -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s --check-prefixes=CHECK
6
7define <vscale x 8 x half> @vsplat_f16_0p625() {
8; CHECK-LABEL: vsplat_f16_0p625:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    fli.h fa5, 0.625
11; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
12; CHECK-NEXT:    vfmv.v.f v8, fa5
13; CHECK-NEXT:    ret
14  ret <vscale x 8 x half> splat (half 0.625)
15}
16
17define <vscale x 8 x float> @vsplat_f32_0p75() {
18; CHECK-LABEL: vsplat_f32_0p75:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    fli.s fa5, 0.75
21; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
22; CHECK-NEXT:    vfmv.v.f v8, fa5
23; CHECK-NEXT:    ret
24  ret <vscale x 8 x float> splat (float 0.75)
25}
26
27define <vscale x 8 x double> @vsplat_f64_neg1() {
28; CHECK-LABEL: vsplat_f64_neg1:
29; CHECK:       # %bb.0:
30; CHECK-NEXT:    fli.d fa5, -1.0
31; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
32; CHECK-NEXT:    vfmv.v.f v8, fa5
33; CHECK-NEXT:    ret
34  ret <vscale x 8 x double> splat (double -1.0)
35}
36