xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vsetvlmax-ext.ll (revision af837d44c7e126eca16426531ed54d94083f3359) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=riscv64 -mattr=+v | FileCheck %s
3
4declare i64 @llvm.riscv.vsetvlimax(i64, i64);
5
6define signext i32 @vsetvlmax_sext() {
7; CHECK-LABEL: vsetvlmax_sext:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
10; CHECK-NEXT:    ret
11  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 1)
12  %b = trunc i64 %a to i32
13  ret i32 %b
14}
15
16define zeroext i32 @vsetvlmax_zext() {
17; CHECK-LABEL: vsetvlmax_zext:
18; CHECK:       # %bb.0:
19; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
20; CHECK-NEXT:    ret
21  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 1)
22  %b = trunc i64 %a to i32
23  ret i32 %b
24}
25
26define i64 @vsetvlmax_e8m1_and14bits() {
27; CHECK-LABEL: vsetvlmax_e8m1_and14bits:
28; CHECK:       # %bb.0:
29; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, ma
30; CHECK-NEXT:    ret
31  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 0)
32  %b = and i64 %a, 16383
33  ret i64 %b
34}
35
36define i64 @vsetvlmax_e8m1_and13bits() {
37; CHECK-LABEL: vsetvlmax_e8m1_and13bits:
38; CHECK:       # %bb.0:
39; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, ma
40; CHECK-NEXT:    slli a0, a0, 51
41; CHECK-NEXT:    srli a0, a0, 51
42; CHECK-NEXT:    ret
43  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 0)
44  %b = and i64 %a, 8191
45  ret i64 %b
46}
47
48define i64 @vsetvlmax_e8m2_and15bits() {
49; CHECK-LABEL: vsetvlmax_e8m2_and15bits:
50; CHECK:       # %bb.0:
51; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
52; CHECK-NEXT:    ret
53  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 1)
54  %b = and i64 %a, 32767
55  ret i64 %b
56}
57
58define i64 @vsetvlmax_e8m2_and14bits() {
59; CHECK-LABEL: vsetvlmax_e8m2_and14bits:
60; CHECK:       # %bb.0:
61; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
62; CHECK-NEXT:    slli a0, a0, 50
63; CHECK-NEXT:    srli a0, a0, 50
64; CHECK-NEXT:    ret
65  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 1)
66  %b = and i64 %a, 16383
67  ret i64 %b
68}
69
70define i64 @vsetvlmax_e8m4_and16bits() {
71; CHECK-LABEL: vsetvlmax_e8m4_and16bits:
72; CHECK:       # %bb.0:
73; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
74; CHECK-NEXT:    ret
75  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 2)
76  %b = and i64 %a, 65535
77  ret i64 %b
78}
79
80define i64 @vsetvlmax_e8m4_and15bits() {
81; CHECK-LABEL: vsetvlmax_e8m4_and15bits:
82; CHECK:       # %bb.0:
83; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
84; CHECK-NEXT:    slli a0, a0, 49
85; CHECK-NEXT:    srli a0, a0, 49
86; CHECK-NEXT:    ret
87  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 2)
88  %b = and i64 %a, 32767
89  ret i64 %b
90}
91
92define i64 @vsetvlmax_e8m8_and17bits() {
93; CHECK-LABEL: vsetvlmax_e8m8_and17bits:
94; CHECK:       # %bb.0:
95; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, ma
96; CHECK-NEXT:    ret
97  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 3)
98  %b = and i64 %a, 131071
99  ret i64 %b
100}
101
102define i64 @vsetvlmax_e8m8_and16bits() {
103; CHECK-LABEL: vsetvlmax_e8m8_and16bits:
104; CHECK:       # %bb.0:
105; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, ma
106; CHECK-NEXT:    slli a0, a0, 48
107; CHECK-NEXT:    srli a0, a0, 48
108; CHECK-NEXT:    ret
109  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 3)
110  %b = and i64 %a, 65535
111  ret i64 %b
112}
113
114define i64 @vsetvlmax_e8mf2_and11bits() {
115; CHECK-LABEL: vsetvlmax_e8mf2_and11bits:
116; CHECK:       # %bb.0:
117; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, ma
118; CHECK-NEXT:    ret
119  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 5)
120  %b = and i64 %a, 2047
121  ret i64 %b
122}
123
124define i64 @vsetvlmax_e8mf2_and10bits() {
125; CHECK-LABEL: vsetvlmax_e8mf2_and10bits:
126; CHECK:       # %bb.0:
127; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, ma
128; CHECK-NEXT:    andi a0, a0, 1023
129; CHECK-NEXT:    ret
130  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 5)
131  %b = and i64 %a, 1023
132  ret i64 %b
133}
134
135define i64 @vsetvlmax_e8mf4_and12bits() {
136; CHECK-LABEL: vsetvlmax_e8mf4_and12bits:
137; CHECK:       # %bb.0:
138; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma
139; CHECK-NEXT:    ret
140  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 6)
141  %b = and i64 %a, 4095
142  ret i64 %b
143}
144
145define i64 @vsetvlmax_e8mf4_and11bits() {
146; CHECK-LABEL: vsetvlmax_e8mf4_and11bits:
147; CHECK:       # %bb.0:
148; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma
149; CHECK-NEXT:    andi a0, a0, 2047
150; CHECK-NEXT:    ret
151  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 6)
152  %b = and i64 %a, 2047
153  ret i64 %b
154}
155
156define i64 @vsetvlmax_e8mf8_and13bits() {
157; CHECK-LABEL: vsetvlmax_e8mf8_and13bits:
158; CHECK:       # %bb.0:
159; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma
160; CHECK-NEXT:    ret
161  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 7)
162  %b = and i64 %a, 8191
163  ret i64 %b
164}
165
166define i64 @vsetvlmax_e8mf8_and12bits() {
167; CHECK-LABEL: vsetvlmax_e8mf8_and12bits:
168; CHECK:       # %bb.0:
169; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma
170; CHECK-NEXT:    slli a0, a0, 52
171; CHECK-NEXT:    srli a0, a0, 52
172; CHECK-NEXT:    ret
173  %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 7)
174  %b = and i64 %a, 4095
175  ret i64 %b
176}
177
178define i64 @vsetvlmax_e16m1_and13bits() {
179; CHECK-LABEL: vsetvlmax_e16m1_and13bits:
180; CHECK:       # %bb.0:
181; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
182; CHECK-NEXT:    ret
183  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 0)
184  %b = and i64 %a, 8191
185  ret i64 %b
186}
187
188define i64 @vsetvlmax_e16m1_and12bits() {
189; CHECK-LABEL: vsetvlmax_e16m1_and12bits:
190; CHECK:       # %bb.0:
191; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
192; CHECK-NEXT:    slli a0, a0, 52
193; CHECK-NEXT:    srli a0, a0, 52
194; CHECK-NEXT:    ret
195  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 0)
196  %b = and i64 %a, 4095
197  ret i64 %b
198}
199
200define i64 @vsetvlmax_e16m2_and14bits() {
201; CHECK-LABEL: vsetvlmax_e16m2_and14bits:
202; CHECK:       # %bb.0:
203; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
204; CHECK-NEXT:    ret
205  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 1)
206  %b = and i64 %a, 16383
207  ret i64 %b
208}
209
210define i64 @vsetvlmax_e16m2_and13bits() {
211; CHECK-LABEL: vsetvlmax_e16m2_and13bits:
212; CHECK:       # %bb.0:
213; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
214; CHECK-NEXT:    slli a0, a0, 51
215; CHECK-NEXT:    srli a0, a0, 51
216; CHECK-NEXT:    ret
217  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 1)
218  %b = and i64 %a, 8191
219  ret i64 %b
220}
221
222define i64 @vsetvlmax_e16m4_and15bits() {
223; CHECK-LABEL: vsetvlmax_e16m4_and15bits:
224; CHECK:       # %bb.0:
225; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
226; CHECK-NEXT:    ret
227  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 2)
228  %b = and i64 %a, 32767
229  ret i64 %b
230}
231
232define i64 @vsetvlmax_e16m4_and14bits() {
233; CHECK-LABEL: vsetvlmax_e16m4_and14bits:
234; CHECK:       # %bb.0:
235; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
236; CHECK-NEXT:    slli a0, a0, 50
237; CHECK-NEXT:    srli a0, a0, 50
238; CHECK-NEXT:    ret
239  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 2)
240  %b = and i64 %a, 16383
241  ret i64 %b
242}
243
244define i64 @vsetvlmax_e16m8_and16bits() {
245; CHECK-LABEL: vsetvlmax_e16m8_and16bits:
246; CHECK:       # %bb.0:
247; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
248; CHECK-NEXT:    ret
249  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 3)
250  %b = and i64 %a, 65535
251  ret i64 %b
252}
253
254define i64 @vsetvlmax_e16m8_and15bits() {
255; CHECK-LABEL: vsetvlmax_e16m8_and15bits:
256; CHECK:       # %bb.0:
257; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
258; CHECK-NEXT:    slli a0, a0, 49
259; CHECK-NEXT:    srli a0, a0, 49
260; CHECK-NEXT:    ret
261  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 3)
262  %b = and i64 %a, 32767
263  ret i64 %b
264}
265
266define i64 @vsetvlmax_e16mf2_and10bits() {
267; CHECK-LABEL: vsetvlmax_e16mf2_and10bits:
268; CHECK:       # %bb.0:
269; CHECK-NEXT:    vsetvli a0, zero, e16, mf8, ta, ma
270; CHECK-NEXT:    ret
271  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 5)
272  %b = and i64 %a, 1023
273  ret i64 %b
274}
275
276define i64 @vsetvlmax_e16mf2_and9bits() {
277; CHECK-LABEL: vsetvlmax_e16mf2_and9bits:
278; CHECK:       # %bb.0:
279; CHECK-NEXT:    vsetvli a0, zero, e16, mf8, ta, ma
280; CHECK-NEXT:    andi a0, a0, 511
281; CHECK-NEXT:    ret
282  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 5)
283  %b = and i64 %a, 511
284  ret i64 %b
285}
286
287define i64 @vsetvlmax_e16mf4_and11bits() {
288; CHECK-LABEL: vsetvlmax_e16mf4_and11bits:
289; CHECK:       # %bb.0:
290; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
291; CHECK-NEXT:    ret
292  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 6)
293  %b = and i64 %a, 2047
294  ret i64 %b
295}
296
297define i64 @vsetvlmax_e16mf4_and10bits() {
298; CHECK-LABEL: vsetvlmax_e16mf4_and10bits:
299; CHECK:       # %bb.0:
300; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
301; CHECK-NEXT:    andi a0, a0, 1023
302; CHECK-NEXT:    ret
303  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 6)
304  %b = and i64 %a, 1023
305  ret i64 %b
306}
307
308define i64 @vsetvlmax_e16mf8_and12bits() {
309; CHECK-LABEL: vsetvlmax_e16mf8_and12bits:
310; CHECK:       # %bb.0:
311; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
312; CHECK-NEXT:    ret
313  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 7)
314  %b = and i64 %a, 4095
315  ret i64 %b
316}
317
318define i64 @vsetvlmax_e16mf8_and11bits() {
319; CHECK-LABEL: vsetvlmax_e16mf8_and11bits:
320; CHECK:       # %bb.0:
321; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
322; CHECK-NEXT:    andi a0, a0, 2047
323; CHECK-NEXT:    ret
324  %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 7)
325  %b = and i64 %a, 2047
326  ret i64 %b
327}
328
329define i64 @vsetvlmax_e32m1_and12bits() {
330; CHECK-LABEL: vsetvlmax_e32m1_and12bits:
331; CHECK:       # %bb.0:
332; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
333; CHECK-NEXT:    ret
334  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 0)
335  %b = and i64 %a, 4095
336  ret i64 %b
337}
338
339define i64 @vsetvlmax_e32m1_and11bits() {
340; CHECK-LABEL: vsetvlmax_e32m1_and11bits:
341; CHECK:       # %bb.0:
342; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
343; CHECK-NEXT:    andi a0, a0, 2047
344; CHECK-NEXT:    ret
345  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 0)
346  %b = and i64 %a, 2047
347  ret i64 %b
348}
349
350define i64 @vsetvlmax_e32m2_and13bits() {
351; CHECK-LABEL: vsetvlmax_e32m2_and13bits:
352; CHECK:       # %bb.0:
353; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
354; CHECK-NEXT:    ret
355  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 1)
356  %b = and i64 %a, 8191
357  ret i64 %b
358}
359
360define i64 @vsetvlmax_e32m2_and12bits() {
361; CHECK-LABEL: vsetvlmax_e32m2_and12bits:
362; CHECK:       # %bb.0:
363; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
364; CHECK-NEXT:    slli a0, a0, 52
365; CHECK-NEXT:    srli a0, a0, 52
366; CHECK-NEXT:    ret
367  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 1)
368  %b = and i64 %a, 4095
369  ret i64 %b
370}
371
372define i64 @vsetvlmax_e32m4_and14bits() {
373; CHECK-LABEL: vsetvlmax_e32m4_and14bits:
374; CHECK:       # %bb.0:
375; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
376; CHECK-NEXT:    ret
377  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 2)
378  %b = and i64 %a, 16383
379  ret i64 %b
380}
381
382define i64 @vsetvlmax_e32m4_and13bits() {
383; CHECK-LABEL: vsetvlmax_e32m4_and13bits:
384; CHECK:       # %bb.0:
385; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
386; CHECK-NEXT:    slli a0, a0, 51
387; CHECK-NEXT:    srli a0, a0, 51
388; CHECK-NEXT:    ret
389  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 2)
390  %b = and i64 %a, 8191
391  ret i64 %b
392}
393
394define i64 @vsetvlmax_e32m8_and15bits() {
395; CHECK-LABEL: vsetvlmax_e32m8_and15bits:
396; CHECK:       # %bb.0:
397; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
398; CHECK-NEXT:    ret
399  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 3)
400  %b = and i64 %a, 32767
401  ret i64 %b
402}
403
404define i64 @vsetvlmax_e32m8_and14bits() {
405; CHECK-LABEL: vsetvlmax_e32m8_and14bits:
406; CHECK:       # %bb.0:
407; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
408; CHECK-NEXT:    slli a0, a0, 50
409; CHECK-NEXT:    srli a0, a0, 50
410; CHECK-NEXT:    ret
411  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 3)
412  %b = and i64 %a, 16383
413  ret i64 %b
414}
415
416define i64 @vsetvlmax_e32mf2_and9bits() {
417; CHECK-LABEL: vsetvlmax_e32mf2_and9bits:
418; CHECK:       # %bb.0:
419; CHECK-NEXT:    vsetvli a0, zero, e32, mf8, ta, ma
420; CHECK-NEXT:    ret
421  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 5)
422  %b = and i64 %a, 511
423  ret i64 %b
424}
425
426define i64 @vsetvlmax_e32mf2_and8bits() {
427; CHECK-LABEL: vsetvlmax_e32mf2_and8bits:
428; CHECK:       # %bb.0:
429; CHECK-NEXT:    vsetvli a0, zero, e32, mf8, ta, ma
430; CHECK-NEXT:    andi a0, a0, 255
431; CHECK-NEXT:    ret
432  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 5)
433  %b = and i64 %a, 255
434  ret i64 %b
435}
436
437define i64 @vsetvlmax_e32mf4_and10bits() {
438; CHECK-LABEL: vsetvlmax_e32mf4_and10bits:
439; CHECK:       # %bb.0:
440; CHECK-NEXT:    vsetvli a0, zero, e32, mf4, ta, ma
441; CHECK-NEXT:    ret
442  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 6)
443  %b = and i64 %a, 1023
444  ret i64 %b
445}
446
447define i64 @vsetvlmax_e32mf4_and9bits() {
448; CHECK-LABEL: vsetvlmax_e32mf4_and9bits:
449; CHECK:       # %bb.0:
450; CHECK-NEXT:    vsetvli a0, zero, e32, mf4, ta, ma
451; CHECK-NEXT:    andi a0, a0, 511
452; CHECK-NEXT:    ret
453  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 6)
454  %b = and i64 %a, 511
455  ret i64 %b
456}
457
458define i64 @vsetvlmax_e32mf8_and11bits() {
459; CHECK-LABEL: vsetvlmax_e32mf8_and11bits:
460; CHECK:       # %bb.0:
461; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
462; CHECK-NEXT:    ret
463  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 7)
464  %b = and i64 %a, 2047
465  ret i64 %b
466}
467
468define i64 @vsetvlmax_e32mf8_and10bits() {
469; CHECK-LABEL: vsetvlmax_e32mf8_and10bits:
470; CHECK:       # %bb.0:
471; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
472; CHECK-NEXT:    andi a0, a0, 1023
473; CHECK-NEXT:    ret
474  %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 7)
475  %b = and i64 %a, 1023
476  ret i64 %b
477}
478
479define i64 @vsetvlmax_e64m1_and11bits() {
480; CHECK-LABEL: vsetvlmax_e64m1_and11bits:
481; CHECK:       # %bb.0:
482; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
483; CHECK-NEXT:    ret
484  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 0)
485  %b = and i64 %a, 2047
486  ret i64 %b
487}
488
489define i64 @vsetvlmax_e64m1_and10bits() {
490; CHECK-LABEL: vsetvlmax_e64m1_and10bits:
491; CHECK:       # %bb.0:
492; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
493; CHECK-NEXT:    andi a0, a0, 1023
494; CHECK-NEXT:    ret
495  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 0)
496  %b = and i64 %a, 1023
497  ret i64 %b
498}
499
500define i64 @vsetvlmax_e64m2_and12bits() {
501; CHECK-LABEL: vsetvlmax_e64m2_and12bits:
502; CHECK:       # %bb.0:
503; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
504; CHECK-NEXT:    ret
505  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 1)
506  %b = and i64 %a, 4095
507  ret i64 %b
508}
509
510define i64 @vsetvlmax_e64m2_and11bits() {
511; CHECK-LABEL: vsetvlmax_e64m2_and11bits:
512; CHECK:       # %bb.0:
513; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
514; CHECK-NEXT:    andi a0, a0, 2047
515; CHECK-NEXT:    ret
516  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 1)
517  %b = and i64 %a, 2047
518  ret i64 %b
519}
520
521define i64 @vsetvlmax_e64m4_and13bits() {
522; CHECK-LABEL: vsetvlmax_e64m4_and13bits:
523; CHECK:       # %bb.0:
524; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
525; CHECK-NEXT:    ret
526  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 2)
527  %b = and i64 %a, 8191
528  ret i64 %b
529}
530
531define i64 @vsetvlmax_e64m4_and12bits() {
532; CHECK-LABEL: vsetvlmax_e64m4_and12bits:
533; CHECK:       # %bb.0:
534; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
535; CHECK-NEXT:    slli a0, a0, 52
536; CHECK-NEXT:    srli a0, a0, 52
537; CHECK-NEXT:    ret
538  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 2)
539  %b = and i64 %a, 4095
540  ret i64 %b
541}
542
543define i64 @vsetvlmax_e64m8_and14bits() {
544; CHECK-LABEL: vsetvlmax_e64m8_and14bits:
545; CHECK:       # %bb.0:
546; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
547; CHECK-NEXT:    ret
548  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 3)
549  %b = and i64 %a, 16383
550  ret i64 %b
551}
552
553define i64 @vsetvlmax_e64m8_and13bits() {
554; CHECK-LABEL: vsetvlmax_e64m8_and13bits:
555; CHECK:       # %bb.0:
556; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
557; CHECK-NEXT:    slli a0, a0, 51
558; CHECK-NEXT:    srli a0, a0, 51
559; CHECK-NEXT:    ret
560  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 3)
561  %b = and i64 %a, 8191
562  ret i64 %b
563}
564
565define i64 @vsetvlmax_e64mf2_and8bits() {
566; CHECK-LABEL: vsetvlmax_e64mf2_and8bits:
567; CHECK:       # %bb.0:
568; CHECK-NEXT:    vsetvli a0, zero, e64, mf8, ta, ma
569; CHECK-NEXT:    ret
570  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 5)
571  %b = and i64 %a, 255
572  ret i64 %b
573}
574
575define i64 @vsetvlmax_e64mf2_and7bits() {
576; CHECK-LABEL: vsetvlmax_e64mf2_and7bits:
577; CHECK:       # %bb.0:
578; CHECK-NEXT:    vsetvli a0, zero, e64, mf8, ta, ma
579; CHECK-NEXT:    andi a0, a0, 127
580; CHECK-NEXT:    ret
581  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 5)
582  %b = and i64 %a, 127
583  ret i64 %b
584}
585
586define i64 @vsetvlmax_e64mf4_and9bits() {
587; CHECK-LABEL: vsetvlmax_e64mf4_and9bits:
588; CHECK:       # %bb.0:
589; CHECK-NEXT:    vsetvli a0, zero, e64, mf4, ta, ma
590; CHECK-NEXT:    ret
591  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 6)
592  %b = and i64 %a, 511
593  ret i64 %b
594}
595
596define i64 @vsetvlmax_e64mf4_and8bits() {
597; CHECK-LABEL: vsetvlmax_e64mf4_and8bits:
598; CHECK:       # %bb.0:
599; CHECK-NEXT:    vsetvli a0, zero, e64, mf4, ta, ma
600; CHECK-NEXT:    andi a0, a0, 255
601; CHECK-NEXT:    ret
602  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 6)
603  %b = and i64 %a, 255
604  ret i64 %b
605}
606
607define i64 @vsetvlmax_e64mf8_and10bits() {
608; CHECK-LABEL: vsetvlmax_e64mf8_and10bits:
609; CHECK:       # %bb.0:
610; CHECK-NEXT:    vsetvli a0, zero, e64, mf2, ta, ma
611; CHECK-NEXT:    ret
612  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 7)
613  %b = and i64 %a, 1023
614  ret i64 %b
615}
616
617define i64 @vsetvlmax_e64mf8_and9bits() {
618; CHECK-LABEL: vsetvlmax_e64mf8_and9bits:
619; CHECK:       # %bb.0:
620; CHECK-NEXT:    vsetvli a0, zero, e64, mf2, ta, ma
621; CHECK-NEXT:    andi a0, a0, 511
622; CHECK-NEXT:    ret
623  %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 7)
624  %b = and i64 %a, 511
625  ret i64 %b
626}
627