xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll (revision ff313ee70a4f27e3555ee4baef53b9b51c5aa27e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=riscv64 -mattr=+v | FileCheck %s
3
4; This test checks a regression in the vsetvli insertion pass. We used to
5; prserve the VL on the second vsetvli with ratio e32/m1, when the the last
6; update of VL was the vsetvli with e64/m4. Changing VTYPE here changes VLMAX
7; which may make the original VL invalid. Instead of preserving it we use 0.
8
9define i32 @illegal_preserve_vl(<vscale x 2 x i32> %a, <vscale x 4 x i64> %x, ptr %y) {
10; CHECK-LABEL: illegal_preserve_vl:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
13; CHECK-NEXT:    vadd.vv v12, v12, v12
14; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
15; CHECK-NEXT:    vmv.x.s a1, v8
16; CHECK-NEXT:    vs4r.v v12, (a0)
17; CHECK-NEXT:    mv a0, a1
18; CHECK-NEXT:    ret
19  %index = add <vscale x 4 x i64> %x, %x
20  store <vscale x 4 x i64> %index, ptr %y
21  %elt = extractelement <vscale x 2 x i32> %a, i64 0
22  ret i32 %elt
23}
24