1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d \ 3; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZVFH 4; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d \ 5; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZVFH 6; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=ilp32d \ 7; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZVFHMIN 8; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=lp64d \ 9; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZVFHMIN 10declare <vscale x 1 x i1> @llvm.vp.merge.nxv1i1(<vscale x 1 x i1>, <vscale x 1 x i1>, <vscale x 1 x i1>, i32) 11 12define <vscale x 1 x i1> @vpmerge_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 13; RV32-LABEL: vpmerge_nxv1i1: 14; RV32: # %bb.0: 15; RV32-NEXT: vsetvli a1, zero, e32, mf2, ta, ma 16; RV32-NEXT: vid.v v10 17; RV32-NEXT: vmsltu.vx v10, v10, a0 18; RV32-NEXT: vmand.mm v9, v9, v10 19; RV32-NEXT: vmandn.mm v8, v8, v9 20; RV32-NEXT: vmand.mm v9, v0, v9 21; RV32-NEXT: vmor.mm v0, v9, v8 22; RV32-NEXT: ret 23; 24; RV64-LABEL: vpmerge_nxv1i1: 25; RV64: # %bb.0: 26; RV64-NEXT: vsetvli a1, zero, e64, m1, ta, ma 27; RV64-NEXT: vid.v v10 28; RV64-NEXT: vmsltu.vx v10, v10, a0 29; RV64-NEXT: vmand.mm v9, v9, v10 30; RV64-NEXT: vmandn.mm v8, v8, v9 31; RV64-NEXT: vmand.mm v9, v0, v9 32; RV64-NEXT: vmor.mm v0, v9, v8 33; RV64-NEXT: ret 34 %v = call <vscale x 1 x i1> @llvm.vp.merge.nxv1i1(<vscale x 1 x i1> %m, <vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, i32 %evl) 35 ret <vscale x 1 x i1> %v 36} 37 38define <vscale x 2 x i1> @vpmerge_nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 39; RV32-LABEL: vpmerge_nxv2i1: 40; RV32: # %bb.0: 41; RV32-NEXT: vsetvli a1, zero, e32, m1, ta, ma 42; RV32-NEXT: vid.v v10 43; RV32-NEXT: vmsltu.vx v10, v10, a0 44; RV32-NEXT: vmand.mm v9, v9, v10 45; RV32-NEXT: vmandn.mm v8, v8, v9 46; RV32-NEXT: vmand.mm v9, v0, v9 47; RV32-NEXT: vmor.mm v0, v9, v8 48; RV32-NEXT: ret 49; 50; RV64-LABEL: vpmerge_nxv2i1: 51; RV64: # %bb.0: 52; RV64-NEXT: vsetvli a1, zero, e64, m2, ta, ma 53; RV64-NEXT: vid.v v10 54; RV64-NEXT: vmsltu.vx v12, v10, a0 55; RV64-NEXT: vmand.mm v9, v9, v12 56; RV64-NEXT: vmandn.mm v8, v8, v9 57; RV64-NEXT: vmand.mm v9, v0, v9 58; RV64-NEXT: vmor.mm v0, v9, v8 59; RV64-NEXT: ret 60 %v = call <vscale x 2 x i1> @llvm.vp.merge.nxv2i1(<vscale x 2 x i1> %m, <vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, i32 %evl) 61 ret <vscale x 2 x i1> %v 62} 63 64define <vscale x 4 x i1> @vpmerge_nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 65; RV32-LABEL: vpmerge_nxv4i1: 66; RV32: # %bb.0: 67; RV32-NEXT: vsetvli a1, zero, e32, m2, ta, ma 68; RV32-NEXT: vid.v v10 69; RV32-NEXT: vmsltu.vx v12, v10, a0 70; RV32-NEXT: vmand.mm v9, v9, v12 71; RV32-NEXT: vmandn.mm v8, v8, v9 72; RV32-NEXT: vmand.mm v9, v0, v9 73; RV32-NEXT: vmor.mm v0, v9, v8 74; RV32-NEXT: ret 75; 76; RV64-LABEL: vpmerge_nxv4i1: 77; RV64: # %bb.0: 78; RV64-NEXT: vsetvli a1, zero, e64, m4, ta, ma 79; RV64-NEXT: vid.v v12 80; RV64-NEXT: vmsltu.vx v10, v12, a0 81; RV64-NEXT: vmand.mm v9, v9, v10 82; RV64-NEXT: vmandn.mm v8, v8, v9 83; RV64-NEXT: vmand.mm v9, v0, v9 84; RV64-NEXT: vmor.mm v0, v9, v8 85; RV64-NEXT: ret 86 %v = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> %m, <vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, i32 %evl) 87 ret <vscale x 4 x i1> %v 88} 89 90define <vscale x 8 x i1> @vpmerge_nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 91; RV32-LABEL: vpmerge_nxv8i1: 92; RV32: # %bb.0: 93; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, ma 94; RV32-NEXT: vid.v v12 95; RV32-NEXT: vmsltu.vx v10, v12, a0 96; RV32-NEXT: vmand.mm v9, v9, v10 97; RV32-NEXT: vmandn.mm v8, v8, v9 98; RV32-NEXT: vmand.mm v9, v0, v9 99; RV32-NEXT: vmor.mm v0, v9, v8 100; RV32-NEXT: ret 101; 102; RV64-LABEL: vpmerge_nxv8i1: 103; RV64: # %bb.0: 104; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, ma 105; RV64-NEXT: vid.v v16 106; RV64-NEXT: vmsltu.vx v10, v16, a0 107; RV64-NEXT: vmand.mm v9, v9, v10 108; RV64-NEXT: vmandn.mm v8, v8, v9 109; RV64-NEXT: vmand.mm v9, v0, v9 110; RV64-NEXT: vmor.mm v0, v9, v8 111; RV64-NEXT: ret 112 %v = call <vscale x 8 x i1> @llvm.vp.merge.nxv8i1(<vscale x 8 x i1> %m, <vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, i32 %evl) 113 ret <vscale x 8 x i1> %v 114} 115 116define <vscale x 16 x i1> @vpmerge_nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 117; RV32-LABEL: vpmerge_nxv16i1: 118; RV32: # %bb.0: 119; RV32-NEXT: vsetvli a1, zero, e32, m8, ta, ma 120; RV32-NEXT: vid.v v16 121; RV32-NEXT: vmsltu.vx v10, v16, a0 122; RV32-NEXT: vmand.mm v9, v9, v10 123; RV32-NEXT: vmandn.mm v8, v8, v9 124; RV32-NEXT: vmand.mm v9, v0, v9 125; RV32-NEXT: vmor.mm v0, v9, v8 126; RV32-NEXT: ret 127; 128; RV64-LABEL: vpmerge_nxv16i1: 129; RV64: # %bb.0: 130; RV64-NEXT: vsetvli a1, zero, e8, m2, ta, ma 131; RV64-NEXT: vmv.v.i v10, 0 132; RV64-NEXT: vsetvli zero, a0, e8, m2, ta, ma 133; RV64-NEXT: vmerge.vim v12, v10, 1, v0 134; RV64-NEXT: vmv1r.v v0, v8 135; RV64-NEXT: vsetvli a1, zero, e8, m2, ta, ma 136; RV64-NEXT: vmerge.vim v10, v10, 1, v0 137; RV64-NEXT: vmv1r.v v0, v9 138; RV64-NEXT: vsetvli zero, a0, e8, m2, tu, ma 139; RV64-NEXT: vmerge.vvm v10, v10, v12, v0 140; RV64-NEXT: vsetvli a0, zero, e8, m2, ta, ma 141; RV64-NEXT: vmsne.vi v0, v10, 0 142; RV64-NEXT: ret 143 %v = call <vscale x 16 x i1> @llvm.vp.merge.nxv16i1(<vscale x 16 x i1> %m, <vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, i32 %evl) 144 ret <vscale x 16 x i1> %v 145} 146 147define <vscale x 32 x i1> @vpmerge_nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) { 148; CHECK-LABEL: vpmerge_nxv32i1: 149; CHECK: # %bb.0: 150; CHECK-NEXT: vsetvli a1, zero, e8, m4, ta, ma 151; CHECK-NEXT: vmv.v.i v12, 0 152; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma 153; CHECK-NEXT: vmerge.vim v16, v12, 1, v0 154; CHECK-NEXT: vmv1r.v v0, v8 155; CHECK-NEXT: vsetvli a1, zero, e8, m4, ta, ma 156; CHECK-NEXT: vmerge.vim v12, v12, 1, v0 157; CHECK-NEXT: vmv1r.v v0, v9 158; CHECK-NEXT: vsetvli zero, a0, e8, m4, tu, ma 159; CHECK-NEXT: vmerge.vvm v12, v12, v16, v0 160; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma 161; CHECK-NEXT: vmsne.vi v0, v12, 0 162; CHECK-NEXT: ret 163 %v = call <vscale x 32 x i1> @llvm.vp.merge.nxv32i1(<vscale x 32 x i1> %m, <vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, i32 %evl) 164 ret <vscale x 32 x i1> %v 165} 166 167define <vscale x 64 x i1> @vpmerge_nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) { 168; CHECK-LABEL: vpmerge_nxv64i1: 169; CHECK: # %bb.0: 170; CHECK-NEXT: vsetvli a1, zero, e8, m8, ta, ma 171; CHECK-NEXT: vmv.v.i v16, 0 172; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma 173; CHECK-NEXT: vmerge.vim v24, v16, 1, v0 174; CHECK-NEXT: vmv1r.v v0, v8 175; CHECK-NEXT: vsetvli a1, zero, e8, m8, ta, ma 176; CHECK-NEXT: vmerge.vim v16, v16, 1, v0 177; CHECK-NEXT: vmv1r.v v0, v9 178; CHECK-NEXT: vsetvli zero, a0, e8, m8, tu, ma 179; CHECK-NEXT: vmerge.vvm v16, v16, v24, v0 180; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma 181; CHECK-NEXT: vmsne.vi v0, v16, 0 182; CHECK-NEXT: ret 183 %v = call <vscale x 64 x i1> @llvm.vp.merge.nxv64i1(<vscale x 64 x i1> %m, <vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, i32 %evl) 184 ret <vscale x 64 x i1> %v 185} 186 187define <vscale x 128 x i1> @vpmerge_nxv128i1(<vscale x 128 x i1> %va, <vscale x 128 x i1> %vb, <vscale x 128 x i1> %m, i32 zeroext %evl) { 188; CHECK-LABEL: vpmerge_nxv128i1: 189; CHECK: # %bb.0: 190; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma 191; CHECK-NEXT: vmv1r.v v7, v12 192; CHECK-NEXT: vmv1r.v v4, v11 193; CHECK-NEXT: vmv1r.v v6, v10 194; CHECK-NEXT: vmv1r.v v3, v9 195; CHECK-NEXT: vmv1r.v v5, v8 196; CHECK-NEXT: csrr a2, vlenb 197; CHECK-NEXT: slli a2, a2, 3 198; CHECK-NEXT: mv a1, a0 199; CHECK-NEXT: bltu a0, a2, .LBB7_2 200; CHECK-NEXT: # %bb.1: 201; CHECK-NEXT: mv a1, a2 202; CHECK-NEXT: .LBB7_2: 203; CHECK-NEXT: vsetvli a3, zero, e8, m8, ta, ma 204; CHECK-NEXT: vmv.v.i v16, 0 205; CHECK-NEXT: sub a2, a0, a2 206; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma 207; CHECK-NEXT: vmerge.vim v24, v16, 1, v0 208; CHECK-NEXT: vmv1r.v v0, v3 209; CHECK-NEXT: vsetvli a3, zero, e8, m8, ta, ma 210; CHECK-NEXT: vmerge.vim v16, v16, 1, v0 211; CHECK-NEXT: sltu a0, a0, a2 212; CHECK-NEXT: vmv1r.v v0, v4 213; CHECK-NEXT: vsetvli zero, a1, e8, m8, tu, ma 214; CHECK-NEXT: vmerge.vvm v16, v16, v24, v0 215; CHECK-NEXT: addi a0, a0, -1 216; CHECK-NEXT: vsetvli a1, zero, e8, m8, ta, ma 217; CHECK-NEXT: vmsne.vi v9, v16, 0 218; CHECK-NEXT: and a0, a0, a2 219; CHECK-NEXT: vmv1r.v v0, v5 220; CHECK-NEXT: vmv.v.i v24, 0 221; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma 222; CHECK-NEXT: vmerge.vim v16, v24, 1, v0 223; CHECK-NEXT: vmv1r.v v0, v6 224; CHECK-NEXT: vsetvli a1, zero, e8, m8, ta, ma 225; CHECK-NEXT: vmerge.vim v24, v24, 1, v0 226; CHECK-NEXT: vmv1r.v v0, v7 227; CHECK-NEXT: vsetvli zero, a0, e8, m8, tu, ma 228; CHECK-NEXT: vmerge.vvm v24, v24, v16, v0 229; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma 230; CHECK-NEXT: vmsne.vi v8, v24, 0 231; CHECK-NEXT: vmv1r.v v0, v9 232; CHECK-NEXT: ret 233 %v = call <vscale x 128 x i1> @llvm.vp.merge.nxv128i1(<vscale x 128 x i1> %m, <vscale x 128 x i1> %va, <vscale x 128 x i1> %vb, i32 %evl) 234 ret <vscale x 128 x i1> %v 235} 236 237declare <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1>, <vscale x 1 x i8>, <vscale x 1 x i8>, i32) 238 239define <vscale x 1 x i8> @vpmerge_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 240; CHECK-LABEL: vpmerge_vv_nxv1i8: 241; CHECK: # %bb.0: 242; CHECK-NEXT: vsetvli zero, a0, e8, mf8, tu, ma 243; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 244; CHECK-NEXT: vmv1r.v v8, v9 245; CHECK-NEXT: ret 246 %v = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, i32 %evl) 247 ret <vscale x 1 x i8> %v 248} 249 250define <vscale x 1 x i8> @vpmerge_vx_nxv1i8(i8 %a, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 251; CHECK-LABEL: vpmerge_vx_nxv1i8: 252; CHECK: # %bb.0: 253; CHECK-NEXT: vsetvli zero, a1, e8, mf8, tu, ma 254; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 255; CHECK-NEXT: ret 256 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %a, i32 0 257 %va = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer 258 %v = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, i32 %evl) 259 ret <vscale x 1 x i8> %v 260} 261 262define <vscale x 1 x i8> @vpmerge_vi_nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 263; CHECK-LABEL: vpmerge_vi_nxv1i8: 264; CHECK: # %bb.0: 265; CHECK-NEXT: vsetvli zero, a0, e8, mf8, tu, ma 266; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 267; CHECK-NEXT: ret 268 %v = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> splat (i8 2), <vscale x 1 x i8> %vb, i32 %evl) 269 ret <vscale x 1 x i8> %v 270} 271 272declare <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1>, <vscale x 2 x i8>, <vscale x 2 x i8>, i32) 273 274define <vscale x 2 x i8> @vpmerge_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 275; CHECK-LABEL: vpmerge_vv_nxv2i8: 276; CHECK: # %bb.0: 277; CHECK-NEXT: vsetvli zero, a0, e8, mf4, tu, ma 278; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 279; CHECK-NEXT: vmv1r.v v8, v9 280; CHECK-NEXT: ret 281 %v = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, i32 %evl) 282 ret <vscale x 2 x i8> %v 283} 284 285define <vscale x 2 x i8> @vpmerge_vx_nxv2i8(i8 %a, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 286; CHECK-LABEL: vpmerge_vx_nxv2i8: 287; CHECK: # %bb.0: 288; CHECK-NEXT: vsetvli zero, a1, e8, mf4, tu, ma 289; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 290; CHECK-NEXT: ret 291 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %a, i32 0 292 %va = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer 293 %v = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, i32 %evl) 294 ret <vscale x 2 x i8> %v 295} 296 297define <vscale x 2 x i8> @vpmerge_vi_nxv2i8(<vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 298; CHECK-LABEL: vpmerge_vi_nxv2i8: 299; CHECK: # %bb.0: 300; CHECK-NEXT: vsetvli zero, a0, e8, mf4, tu, ma 301; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 302; CHECK-NEXT: ret 303 %v = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> splat (i8 2), <vscale x 2 x i8> %vb, i32 %evl) 304 ret <vscale x 2 x i8> %v 305} 306 307declare <vscale x 3 x i8> @llvm.vp.merge.nxv3i8(<vscale x 3 x i1>, <vscale x 3 x i8>, <vscale x 3 x i8>, i32) 308 309define <vscale x 3 x i8> @vpmerge_vv_nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, <vscale x 3 x i1> %m, i32 zeroext %evl) { 310; CHECK-LABEL: vpmerge_vv_nxv3i8: 311; CHECK: # %bb.0: 312; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma 313; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 314; CHECK-NEXT: vmv1r.v v8, v9 315; CHECK-NEXT: ret 316 %v = call <vscale x 3 x i8> @llvm.vp.merge.nxv3i8(<vscale x 3 x i1> %m, <vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, i32 %evl) 317 ret <vscale x 3 x i8> %v 318} 319 320define <vscale x 3 x i8> @vpmerge_vx_nxv3i8(i8 %a, <vscale x 3 x i8> %vb, <vscale x 3 x i1> %m, i32 zeroext %evl) { 321; CHECK-LABEL: vpmerge_vx_nxv3i8: 322; CHECK: # %bb.0: 323; CHECK-NEXT: vsetvli zero, a1, e8, mf2, tu, ma 324; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 325; CHECK-NEXT: ret 326 %elt.head = insertelement <vscale x 3 x i8> poison, i8 %a, i32 0 327 %va = shufflevector <vscale x 3 x i8> %elt.head, <vscale x 3 x i8> poison, <vscale x 3 x i32> zeroinitializer 328 %v = call <vscale x 3 x i8> @llvm.vp.merge.nxv3i8(<vscale x 3 x i1> %m, <vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, i32 %evl) 329 ret <vscale x 3 x i8> %v 330} 331 332define <vscale x 3 x i8> @vpmerge_vi_nxv3i8(<vscale x 3 x i8> %vb, <vscale x 3 x i1> %m, i32 zeroext %evl) { 333; CHECK-LABEL: vpmerge_vi_nxv3i8: 334; CHECK: # %bb.0: 335; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma 336; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 337; CHECK-NEXT: ret 338 %v = call <vscale x 3 x i8> @llvm.vp.merge.nxv3i8(<vscale x 3 x i1> %m, <vscale x 3 x i8> splat (i8 2), <vscale x 3 x i8> %vb, i32 %evl) 339 ret <vscale x 3 x i8> %v 340} 341 342declare <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1>, <vscale x 4 x i8>, <vscale x 4 x i8>, i32) 343 344define <vscale x 4 x i8> @vpmerge_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 345; CHECK-LABEL: vpmerge_vv_nxv4i8: 346; CHECK: # %bb.0: 347; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma 348; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 349; CHECK-NEXT: vmv1r.v v8, v9 350; CHECK-NEXT: ret 351 %v = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, i32 %evl) 352 ret <vscale x 4 x i8> %v 353} 354 355define <vscale x 4 x i8> @vpmerge_vx_nxv4i8(i8 %a, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 356; CHECK-LABEL: vpmerge_vx_nxv4i8: 357; CHECK: # %bb.0: 358; CHECK-NEXT: vsetvli zero, a1, e8, mf2, tu, ma 359; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 360; CHECK-NEXT: ret 361 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %a, i32 0 362 %va = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer 363 %v = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, i32 %evl) 364 ret <vscale x 4 x i8> %v 365} 366 367define <vscale x 4 x i8> @vpmerge_vi_nxv4i8(<vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 368; CHECK-LABEL: vpmerge_vi_nxv4i8: 369; CHECK: # %bb.0: 370; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma 371; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 372; CHECK-NEXT: ret 373 %v = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> splat (i8 2), <vscale x 4 x i8> %vb, i32 %evl) 374 ret <vscale x 4 x i8> %v 375} 376 377declare <vscale x 8 x i7> @llvm.vp.merge.nxv8i7(<vscale x 8 x i1>, <vscale x 8 x i7>, <vscale x 8 x i7>, i32) 378 379define <vscale x 8 x i7> @vpmerge_vv_nxv8i7(<vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 380; CHECK-LABEL: vpmerge_vv_nxv8i7: 381; CHECK: # %bb.0: 382; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma 383; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 384; CHECK-NEXT: vmv1r.v v8, v9 385; CHECK-NEXT: ret 386 %v = call <vscale x 8 x i7> @llvm.vp.merge.nxv8i7(<vscale x 8 x i1> %m, <vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, i32 %evl) 387 ret <vscale x 8 x i7> %v 388} 389 390define <vscale x 8 x i7> @vpmerge_vx_nxv8i7(i7 %a, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 391; CHECK-LABEL: vpmerge_vx_nxv8i7: 392; CHECK: # %bb.0: 393; CHECK-NEXT: vsetvli zero, a1, e8, m1, tu, ma 394; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 395; CHECK-NEXT: ret 396 %elt.head = insertelement <vscale x 8 x i7> poison, i7 %a, i32 0 397 %va = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer 398 %v = call <vscale x 8 x i7> @llvm.vp.merge.nxv8i7(<vscale x 8 x i1> %m, <vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, i32 %evl) 399 ret <vscale x 8 x i7> %v 400} 401 402define <vscale x 8 x i7> @vpmerge_vi_nxv8i7(<vscale x 8 x i7> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 403; CHECK-LABEL: vpmerge_vi_nxv8i7: 404; CHECK: # %bb.0: 405; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma 406; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 407; CHECK-NEXT: ret 408 %v = call <vscale x 8 x i7> @llvm.vp.merge.nxv8i7(<vscale x 8 x i1> %m, <vscale x 8 x i7> splat (i7 2), <vscale x 8 x i7> %vb, i32 %evl) 409 ret <vscale x 8 x i7> %v 410} 411 412declare <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1>, <vscale x 8 x i8>, <vscale x 8 x i8>, i32) 413 414define <vscale x 8 x i8> @vpmerge_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 415; CHECK-LABEL: vpmerge_vv_nxv8i8: 416; CHECK: # %bb.0: 417; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma 418; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 419; CHECK-NEXT: vmv1r.v v8, v9 420; CHECK-NEXT: ret 421 %v = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, i32 %evl) 422 ret <vscale x 8 x i8> %v 423} 424 425define <vscale x 8 x i8> @vpmerge_vx_nxv8i8(i8 %a, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 426; CHECK-LABEL: vpmerge_vx_nxv8i8: 427; CHECK: # %bb.0: 428; CHECK-NEXT: vsetvli zero, a1, e8, m1, tu, ma 429; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 430; CHECK-NEXT: ret 431 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %a, i32 0 432 %va = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer 433 %v = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, i32 %evl) 434 ret <vscale x 8 x i8> %v 435} 436 437define <vscale x 8 x i8> @vpmerge_vi_nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 438; CHECK-LABEL: vpmerge_vi_nxv8i8: 439; CHECK: # %bb.0: 440; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma 441; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 442; CHECK-NEXT: ret 443 %v = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> splat (i8 2), <vscale x 8 x i8> %vb, i32 %evl) 444 ret <vscale x 8 x i8> %v 445} 446 447declare <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 16 x i8>, i32) 448 449define <vscale x 16 x i8> @vpmerge_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 450; CHECK-LABEL: vpmerge_vv_nxv16i8: 451; CHECK: # %bb.0: 452; CHECK-NEXT: vsetvli zero, a0, e8, m2, tu, ma 453; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 454; CHECK-NEXT: vmv2r.v v8, v10 455; CHECK-NEXT: ret 456 %v = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, i32 %evl) 457 ret <vscale x 16 x i8> %v 458} 459 460define <vscale x 16 x i8> @vpmerge_vx_nxv16i8(i8 %a, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 461; CHECK-LABEL: vpmerge_vx_nxv16i8: 462; CHECK: # %bb.0: 463; CHECK-NEXT: vsetvli zero, a1, e8, m2, tu, ma 464; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 465; CHECK-NEXT: ret 466 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %a, i32 0 467 %va = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer 468 %v = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, i32 %evl) 469 ret <vscale x 16 x i8> %v 470} 471 472define <vscale x 16 x i8> @vpmerge_vi_nxv16i8(<vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 473; CHECK-LABEL: vpmerge_vi_nxv16i8: 474; CHECK: # %bb.0: 475; CHECK-NEXT: vsetvli zero, a0, e8, m2, tu, ma 476; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 477; CHECK-NEXT: ret 478 %v = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> splat (i8 2), <vscale x 16 x i8> %vb, i32 %evl) 479 ret <vscale x 16 x i8> %v 480} 481 482declare <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1>, <vscale x 32 x i8>, <vscale x 32 x i8>, i32) 483 484define <vscale x 32 x i8> @vpmerge_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) { 485; CHECK-LABEL: vpmerge_vv_nxv32i8: 486; CHECK: # %bb.0: 487; CHECK-NEXT: vsetvli zero, a0, e8, m4, tu, ma 488; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 489; CHECK-NEXT: vmv4r.v v8, v12 490; CHECK-NEXT: ret 491 %v = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, i32 %evl) 492 ret <vscale x 32 x i8> %v 493} 494 495define <vscale x 32 x i8> @vpmerge_vx_nxv32i8(i8 %a, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) { 496; CHECK-LABEL: vpmerge_vx_nxv32i8: 497; CHECK: # %bb.0: 498; CHECK-NEXT: vsetvli zero, a1, e8, m4, tu, ma 499; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 500; CHECK-NEXT: ret 501 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %a, i32 0 502 %va = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer 503 %v = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, i32 %evl) 504 ret <vscale x 32 x i8> %v 505} 506 507define <vscale x 32 x i8> @vpmerge_vi_nxv32i8(<vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) { 508; CHECK-LABEL: vpmerge_vi_nxv32i8: 509; CHECK: # %bb.0: 510; CHECK-NEXT: vsetvli zero, a0, e8, m4, tu, ma 511; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 512; CHECK-NEXT: ret 513 %v = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> splat (i8 2), <vscale x 32 x i8> %vb, i32 %evl) 514 ret <vscale x 32 x i8> %v 515} 516 517declare <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1>, <vscale x 64 x i8>, <vscale x 64 x i8>, i32) 518 519define <vscale x 64 x i8> @vpmerge_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) { 520; CHECK-LABEL: vpmerge_vv_nxv64i8: 521; CHECK: # %bb.0: 522; CHECK-NEXT: vsetvli zero, a0, e8, m8, tu, ma 523; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 524; CHECK-NEXT: vmv8r.v v8, v16 525; CHECK-NEXT: ret 526 %v = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, i32 %evl) 527 ret <vscale x 64 x i8> %v 528} 529 530define <vscale x 64 x i8> @vpmerge_vx_nxv64i8(i8 %a, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) { 531; CHECK-LABEL: vpmerge_vx_nxv64i8: 532; CHECK: # %bb.0: 533; CHECK-NEXT: vsetvli zero, a1, e8, m8, tu, ma 534; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 535; CHECK-NEXT: ret 536 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %a, i32 0 537 %va = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer 538 %v = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, i32 %evl) 539 ret <vscale x 64 x i8> %v 540} 541 542define <vscale x 64 x i8> @vpmerge_vi_nxv64i8(<vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) { 543; CHECK-LABEL: vpmerge_vi_nxv64i8: 544; CHECK: # %bb.0: 545; CHECK-NEXT: vsetvli zero, a0, e8, m8, tu, ma 546; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 547; CHECK-NEXT: ret 548 %v = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> splat (i8 2), <vscale x 64 x i8> %vb, i32 %evl) 549 ret <vscale x 64 x i8> %v 550} 551 552declare <vscale x 128 x i8> @llvm.vp.merge.nxv128i8(<vscale x 128 x i1>, <vscale x 128 x i8>, <vscale x 128 x i8>, i32) 553 554define <vscale x 128 x i8> @vpmerge_vv_nxv128i8(<vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, <vscale x 128 x i1> %m, i32 zeroext %evl) { 555; CHECK-LABEL: vpmerge_vv_nxv128i8: 556; CHECK: # %bb.0: 557; CHECK-NEXT: addi sp, sp, -16 558; CHECK-NEXT: .cfi_def_cfa_offset 16 559; CHECK-NEXT: csrr a1, vlenb 560; CHECK-NEXT: slli a1, a1, 3 561; CHECK-NEXT: sub sp, sp, a1 562; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb 563; CHECK-NEXT: vsetvli a1, zero, e8, m8, ta, ma 564; CHECK-NEXT: vmv1r.v v7, v0 565; CHECK-NEXT: vmv8r.v v24, v16 566; CHECK-NEXT: addi a1, sp, 16 567; CHECK-NEXT: vs8r.v v8, (a1) # Unknown-size Folded Spill 568; CHECK-NEXT: csrr a1, vlenb 569; CHECK-NEXT: vlm.v v0, (a2) 570; CHECK-NEXT: slli a1, a1, 3 571; CHECK-NEXT: add a2, a0, a1 572; CHECK-NEXT: sub a4, a3, a1 573; CHECK-NEXT: vl8r.v v16, (a2) 574; CHECK-NEXT: sltu a2, a3, a4 575; CHECK-NEXT: vl8r.v v8, (a0) 576; CHECK-NEXT: addi a2, a2, -1 577; CHECK-NEXT: and a2, a2, a4 578; CHECK-NEXT: vsetvli zero, a2, e8, m8, tu, ma 579; CHECK-NEXT: vmerge.vvm v16, v16, v24, v0 580; CHECK-NEXT: bltu a3, a1, .LBB35_2 581; CHECK-NEXT: # %bb.1: 582; CHECK-NEXT: mv a3, a1 583; CHECK-NEXT: .LBB35_2: 584; CHECK-NEXT: vmv1r.v v0, v7 585; CHECK-NEXT: addi a0, sp, 16 586; CHECK-NEXT: vl8r.v v24, (a0) # Unknown-size Folded Reload 587; CHECK-NEXT: vsetvli zero, a3, e8, m8, tu, ma 588; CHECK-NEXT: vmerge.vvm v8, v8, v24, v0 589; CHECK-NEXT: csrr a0, vlenb 590; CHECK-NEXT: slli a0, a0, 3 591; CHECK-NEXT: add sp, sp, a0 592; CHECK-NEXT: .cfi_def_cfa sp, 16 593; CHECK-NEXT: addi sp, sp, 16 594; CHECK-NEXT: .cfi_def_cfa_offset 0 595; CHECK-NEXT: ret 596 %v = call <vscale x 128 x i8> @llvm.vp.merge.nxv128i8(<vscale x 128 x i1> %m, <vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, i32 %evl) 597 ret <vscale x 128 x i8> %v 598} 599 600define <vscale x 128 x i8> @vpmerge_vx_nxv128i8(i8 %a, <vscale x 128 x i8> %vb, <vscale x 128 x i1> %m, i32 zeroext %evl) { 601; CHECK-LABEL: vpmerge_vx_nxv128i8: 602; CHECK: # %bb.0: 603; CHECK-NEXT: vsetvli a3, zero, e8, m8, ta, ma 604; CHECK-NEXT: vmv1r.v v24, v0 605; CHECK-NEXT: vlm.v v0, (a1) 606; CHECK-NEXT: csrr a1, vlenb 607; CHECK-NEXT: slli a1, a1, 3 608; CHECK-NEXT: sub a3, a2, a1 609; CHECK-NEXT: sltu a4, a2, a3 610; CHECK-NEXT: addi a4, a4, -1 611; CHECK-NEXT: and a3, a4, a3 612; CHECK-NEXT: vsetvli zero, a3, e8, m8, tu, ma 613; CHECK-NEXT: vmerge.vxm v16, v16, a0, v0 614; CHECK-NEXT: bltu a2, a1, .LBB36_2 615; CHECK-NEXT: # %bb.1: 616; CHECK-NEXT: mv a2, a1 617; CHECK-NEXT: .LBB36_2: 618; CHECK-NEXT: vmv1r.v v0, v24 619; CHECK-NEXT: vsetvli zero, a2, e8, m8, tu, ma 620; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 621; CHECK-NEXT: ret 622 %elt.head = insertelement <vscale x 128 x i8> poison, i8 %a, i32 0 623 %va = shufflevector <vscale x 128 x i8> %elt.head, <vscale x 128 x i8> poison, <vscale x 128 x i32> zeroinitializer 624 %v = call <vscale x 128 x i8> @llvm.vp.merge.nxv128i8(<vscale x 128 x i1> %m, <vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, i32 %evl) 625 ret <vscale x 128 x i8> %v 626} 627 628define <vscale x 128 x i8> @vpmerge_vi_nxv128i8(<vscale x 128 x i8> %vb, <vscale x 128 x i1> %m, i32 zeroext %evl) { 629; CHECK-LABEL: vpmerge_vi_nxv128i8: 630; CHECK: # %bb.0: 631; CHECK-NEXT: vsetvli a2, zero, e8, m8, ta, ma 632; CHECK-NEXT: vmv1r.v v24, v0 633; CHECK-NEXT: vlm.v v0, (a0) 634; CHECK-NEXT: csrr a0, vlenb 635; CHECK-NEXT: slli a0, a0, 3 636; CHECK-NEXT: sub a2, a1, a0 637; CHECK-NEXT: sltu a3, a1, a2 638; CHECK-NEXT: addi a3, a3, -1 639; CHECK-NEXT: and a2, a3, a2 640; CHECK-NEXT: vsetvli zero, a2, e8, m8, tu, ma 641; CHECK-NEXT: vmerge.vim v16, v16, 2, v0 642; CHECK-NEXT: bltu a1, a0, .LBB37_2 643; CHECK-NEXT: # %bb.1: 644; CHECK-NEXT: mv a1, a0 645; CHECK-NEXT: .LBB37_2: 646; CHECK-NEXT: vmv1r.v v0, v24 647; CHECK-NEXT: vsetvli zero, a1, e8, m8, tu, ma 648; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 649; CHECK-NEXT: ret 650 %v = call <vscale x 128 x i8> @llvm.vp.merge.nxv128i8(<vscale x 128 x i1> %m, <vscale x 128 x i8> splat (i8 2), <vscale x 128 x i8> %vb, i32 %evl) 651 ret <vscale x 128 x i8> %v 652} 653 654declare <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1>, <vscale x 1 x i16>, <vscale x 1 x i16>, i32) 655 656define <vscale x 1 x i16> @vpmerge_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 657; CHECK-LABEL: vpmerge_vv_nxv1i16: 658; CHECK: # %bb.0: 659; CHECK-NEXT: vsetvli zero, a0, e16, mf4, tu, ma 660; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 661; CHECK-NEXT: vmv1r.v v8, v9 662; CHECK-NEXT: ret 663 %v = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, i32 %evl) 664 ret <vscale x 1 x i16> %v 665} 666 667define <vscale x 1 x i16> @vpmerge_vx_nxv1i16(i16 %a, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 668; CHECK-LABEL: vpmerge_vx_nxv1i16: 669; CHECK: # %bb.0: 670; CHECK-NEXT: vsetvli zero, a1, e16, mf4, tu, ma 671; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 672; CHECK-NEXT: ret 673 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %a, i32 0 674 %va = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer 675 %v = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, i32 %evl) 676 ret <vscale x 1 x i16> %v 677} 678 679define <vscale x 1 x i16> @vpmerge_vi_nxv1i16(<vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 680; CHECK-LABEL: vpmerge_vi_nxv1i16: 681; CHECK: # %bb.0: 682; CHECK-NEXT: vsetvli zero, a0, e16, mf4, tu, ma 683; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 684; CHECK-NEXT: ret 685 %v = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> splat (i16 2), <vscale x 1 x i16> %vb, i32 %evl) 686 ret <vscale x 1 x i16> %v 687} 688 689declare <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1>, <vscale x 2 x i16>, <vscale x 2 x i16>, i32) 690 691define <vscale x 2 x i16> @vpmerge_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 692; CHECK-LABEL: vpmerge_vv_nxv2i16: 693; CHECK: # %bb.0: 694; CHECK-NEXT: vsetvli zero, a0, e16, mf2, tu, ma 695; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 696; CHECK-NEXT: vmv1r.v v8, v9 697; CHECK-NEXT: ret 698 %v = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, i32 %evl) 699 ret <vscale x 2 x i16> %v 700} 701 702define <vscale x 2 x i16> @vpmerge_vx_nxv2i16(i16 %a, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 703; CHECK-LABEL: vpmerge_vx_nxv2i16: 704; CHECK: # %bb.0: 705; CHECK-NEXT: vsetvli zero, a1, e16, mf2, tu, ma 706; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 707; CHECK-NEXT: ret 708 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %a, i32 0 709 %va = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer 710 %v = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, i32 %evl) 711 ret <vscale x 2 x i16> %v 712} 713 714define <vscale x 2 x i16> @vpmerge_vi_nxv2i16(<vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 715; CHECK-LABEL: vpmerge_vi_nxv2i16: 716; CHECK: # %bb.0: 717; CHECK-NEXT: vsetvli zero, a0, e16, mf2, tu, ma 718; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 719; CHECK-NEXT: ret 720 %v = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> splat (i16 2), <vscale x 2 x i16> %vb, i32 %evl) 721 ret <vscale x 2 x i16> %v 722} 723 724declare <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1>, <vscale x 4 x i16>, <vscale x 4 x i16>, i32) 725 726define <vscale x 4 x i16> @vpmerge_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 727; CHECK-LABEL: vpmerge_vv_nxv4i16: 728; CHECK: # %bb.0: 729; CHECK-NEXT: vsetvli zero, a0, e16, m1, tu, ma 730; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 731; CHECK-NEXT: vmv1r.v v8, v9 732; CHECK-NEXT: ret 733 %v = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, i32 %evl) 734 ret <vscale x 4 x i16> %v 735} 736 737define <vscale x 4 x i16> @vpmerge_vx_nxv4i16(i16 %a, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 738; CHECK-LABEL: vpmerge_vx_nxv4i16: 739; CHECK: # %bb.0: 740; CHECK-NEXT: vsetvli zero, a1, e16, m1, tu, ma 741; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 742; CHECK-NEXT: ret 743 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %a, i32 0 744 %va = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer 745 %v = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, i32 %evl) 746 ret <vscale x 4 x i16> %v 747} 748 749define <vscale x 4 x i16> @vpmerge_vi_nxv4i16(<vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 750; CHECK-LABEL: vpmerge_vi_nxv4i16: 751; CHECK: # %bb.0: 752; CHECK-NEXT: vsetvli zero, a0, e16, m1, tu, ma 753; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 754; CHECK-NEXT: ret 755 %v = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> splat (i16 2), <vscale x 4 x i16> %vb, i32 %evl) 756 ret <vscale x 4 x i16> %v 757} 758 759declare <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 8 x i16>, i32) 760 761define <vscale x 8 x i16> @vpmerge_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 762; CHECK-LABEL: vpmerge_vv_nxv8i16: 763; CHECK: # %bb.0: 764; CHECK-NEXT: vsetvli zero, a0, e16, m2, tu, ma 765; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 766; CHECK-NEXT: vmv2r.v v8, v10 767; CHECK-NEXT: ret 768 %v = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, i32 %evl) 769 ret <vscale x 8 x i16> %v 770} 771 772define <vscale x 8 x i16> @vpmerge_vx_nxv8i16(i16 %a, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 773; CHECK-LABEL: vpmerge_vx_nxv8i16: 774; CHECK: # %bb.0: 775; CHECK-NEXT: vsetvli zero, a1, e16, m2, tu, ma 776; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 777; CHECK-NEXT: ret 778 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %a, i32 0 779 %va = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer 780 %v = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, i32 %evl) 781 ret <vscale x 8 x i16> %v 782} 783 784define <vscale x 8 x i16> @vpmerge_vi_nxv8i16(<vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 785; CHECK-LABEL: vpmerge_vi_nxv8i16: 786; CHECK: # %bb.0: 787; CHECK-NEXT: vsetvli zero, a0, e16, m2, tu, ma 788; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 789; CHECK-NEXT: ret 790 %v = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> splat (i16 2), <vscale x 8 x i16> %vb, i32 %evl) 791 ret <vscale x 8 x i16> %v 792} 793 794declare <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1>, <vscale x 16 x i16>, <vscale x 16 x i16>, i32) 795 796define <vscale x 16 x i16> @vpmerge_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 797; CHECK-LABEL: vpmerge_vv_nxv16i16: 798; CHECK: # %bb.0: 799; CHECK-NEXT: vsetvli zero, a0, e16, m4, tu, ma 800; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 801; CHECK-NEXT: vmv4r.v v8, v12 802; CHECK-NEXT: ret 803 %v = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, i32 %evl) 804 ret <vscale x 16 x i16> %v 805} 806 807define <vscale x 16 x i16> @vpmerge_vx_nxv16i16(i16 %a, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 808; CHECK-LABEL: vpmerge_vx_nxv16i16: 809; CHECK: # %bb.0: 810; CHECK-NEXT: vsetvli zero, a1, e16, m4, tu, ma 811; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 812; CHECK-NEXT: ret 813 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %a, i32 0 814 %va = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer 815 %v = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, i32 %evl) 816 ret <vscale x 16 x i16> %v 817} 818 819define <vscale x 16 x i16> @vpmerge_vi_nxv16i16(<vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 820; CHECK-LABEL: vpmerge_vi_nxv16i16: 821; CHECK: # %bb.0: 822; CHECK-NEXT: vsetvli zero, a0, e16, m4, tu, ma 823; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 824; CHECK-NEXT: ret 825 %v = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> splat (i16 2), <vscale x 16 x i16> %vb, i32 %evl) 826 ret <vscale x 16 x i16> %v 827} 828 829declare <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1>, <vscale x 32 x i16>, <vscale x 32 x i16>, i32) 830 831define <vscale x 32 x i16> @vpmerge_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) { 832; CHECK-LABEL: vpmerge_vv_nxv32i16: 833; CHECK: # %bb.0: 834; CHECK-NEXT: vsetvli zero, a0, e16, m8, tu, ma 835; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 836; CHECK-NEXT: vmv8r.v v8, v16 837; CHECK-NEXT: ret 838 %v = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, i32 %evl) 839 ret <vscale x 32 x i16> %v 840} 841 842define <vscale x 32 x i16> @vpmerge_vx_nxv32i16(i16 %a, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) { 843; CHECK-LABEL: vpmerge_vx_nxv32i16: 844; CHECK: # %bb.0: 845; CHECK-NEXT: vsetvli zero, a1, e16, m8, tu, ma 846; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 847; CHECK-NEXT: ret 848 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %a, i32 0 849 %va = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer 850 %v = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, i32 %evl) 851 ret <vscale x 32 x i16> %v 852} 853 854define <vscale x 32 x i16> @vpmerge_vi_nxv32i16(<vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) { 855; CHECK-LABEL: vpmerge_vi_nxv32i16: 856; CHECK: # %bb.0: 857; CHECK-NEXT: vsetvli zero, a0, e16, m8, tu, ma 858; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 859; CHECK-NEXT: ret 860 %v = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> splat (i16 2), <vscale x 32 x i16> %vb, i32 %evl) 861 ret <vscale x 32 x i16> %v 862} 863 864declare <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1>, <vscale x 1 x i32>, <vscale x 1 x i32>, i32) 865 866define <vscale x 1 x i32> @vpmerge_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 867; CHECK-LABEL: vpmerge_vv_nxv1i32: 868; CHECK: # %bb.0: 869; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma 870; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 871; CHECK-NEXT: vmv1r.v v8, v9 872; CHECK-NEXT: ret 873 %v = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, i32 %evl) 874 ret <vscale x 1 x i32> %v 875} 876 877define <vscale x 1 x i32> @vpmerge_vx_nxv1i32(i32 %a, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 878; CHECK-LABEL: vpmerge_vx_nxv1i32: 879; CHECK: # %bb.0: 880; CHECK-NEXT: vsetvli zero, a1, e32, mf2, tu, ma 881; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 882; CHECK-NEXT: ret 883 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %a, i32 0 884 %va = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer 885 %v = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, i32 %evl) 886 ret <vscale x 1 x i32> %v 887} 888 889define <vscale x 1 x i32> @vpmerge_vi_nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 890; CHECK-LABEL: vpmerge_vi_nxv1i32: 891; CHECK: # %bb.0: 892; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma 893; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 894; CHECK-NEXT: ret 895 %v = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> splat (i32 2), <vscale x 1 x i32> %vb, i32 %evl) 896 ret <vscale x 1 x i32> %v 897} 898 899declare <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1>, <vscale x 2 x i32>, <vscale x 2 x i32>, i32) 900 901define <vscale x 2 x i32> @vpmerge_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 902; CHECK-LABEL: vpmerge_vv_nxv2i32: 903; CHECK: # %bb.0: 904; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma 905; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 906; CHECK-NEXT: vmv1r.v v8, v9 907; CHECK-NEXT: ret 908 %v = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, i32 %evl) 909 ret <vscale x 2 x i32> %v 910} 911 912define <vscale x 2 x i32> @vpmerge_vx_nxv2i32(i32 %a, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 913; CHECK-LABEL: vpmerge_vx_nxv2i32: 914; CHECK: # %bb.0: 915; CHECK-NEXT: vsetvli zero, a1, e32, m1, tu, ma 916; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 917; CHECK-NEXT: ret 918 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %a, i32 0 919 %va = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer 920 %v = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, i32 %evl) 921 ret <vscale x 2 x i32> %v 922} 923 924define <vscale x 2 x i32> @vpmerge_vi_nxv2i32(<vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 925; CHECK-LABEL: vpmerge_vi_nxv2i32: 926; CHECK: # %bb.0: 927; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma 928; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 929; CHECK-NEXT: ret 930 %v = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> splat (i32 2), <vscale x 2 x i32> %vb, i32 %evl) 931 ret <vscale x 2 x i32> %v 932} 933 934declare <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 4 x i32>, i32) 935 936define <vscale x 4 x i32> @vpmerge_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 937; CHECK-LABEL: vpmerge_vv_nxv4i32: 938; CHECK: # %bb.0: 939; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma 940; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 941; CHECK-NEXT: vmv2r.v v8, v10 942; CHECK-NEXT: ret 943 %v = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, i32 %evl) 944 ret <vscale x 4 x i32> %v 945} 946 947define <vscale x 4 x i32> @vpmerge_vx_nxv4i32(i32 %a, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 948; CHECK-LABEL: vpmerge_vx_nxv4i32: 949; CHECK: # %bb.0: 950; CHECK-NEXT: vsetvli zero, a1, e32, m2, tu, ma 951; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 952; CHECK-NEXT: ret 953 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %a, i32 0 954 %va = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer 955 %v = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, i32 %evl) 956 ret <vscale x 4 x i32> %v 957} 958 959define <vscale x 4 x i32> @vpmerge_vi_nxv4i32(<vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 960; CHECK-LABEL: vpmerge_vi_nxv4i32: 961; CHECK: # %bb.0: 962; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma 963; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 964; CHECK-NEXT: ret 965 %v = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> splat (i32 2), <vscale x 4 x i32> %vb, i32 %evl) 966 ret <vscale x 4 x i32> %v 967} 968 969declare <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1>, <vscale x 8 x i32>, <vscale x 8 x i32>, i32) 970 971define <vscale x 8 x i32> @vpmerge_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 972; CHECK-LABEL: vpmerge_vv_nxv8i32: 973; CHECK: # %bb.0: 974; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma 975; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 976; CHECK-NEXT: vmv4r.v v8, v12 977; CHECK-NEXT: ret 978 %v = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, i32 %evl) 979 ret <vscale x 8 x i32> %v 980} 981 982define <vscale x 8 x i32> @vpmerge_vx_nxv8i32(i32 %a, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 983; CHECK-LABEL: vpmerge_vx_nxv8i32: 984; CHECK: # %bb.0: 985; CHECK-NEXT: vsetvli zero, a1, e32, m4, tu, ma 986; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 987; CHECK-NEXT: ret 988 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %a, i32 0 989 %va = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer 990 %v = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, i32 %evl) 991 ret <vscale x 8 x i32> %v 992} 993 994define <vscale x 8 x i32> @vpmerge_vi_nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 995; CHECK-LABEL: vpmerge_vi_nxv8i32: 996; CHECK: # %bb.0: 997; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma 998; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 999; CHECK-NEXT: ret 1000 %v = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> splat (i32 2), <vscale x 8 x i32> %vb, i32 %evl) 1001 ret <vscale x 8 x i32> %v 1002} 1003 1004declare <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1>, <vscale x 16 x i32>, <vscale x 16 x i32>, i32) 1005 1006define <vscale x 16 x i32> @vpmerge_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 1007; CHECK-LABEL: vpmerge_vv_nxv16i32: 1008; CHECK: # %bb.0: 1009; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma 1010; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 1011; CHECK-NEXT: vmv8r.v v8, v16 1012; CHECK-NEXT: ret 1013 %v = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, i32 %evl) 1014 ret <vscale x 16 x i32> %v 1015} 1016 1017define <vscale x 16 x i32> @vpmerge_vx_nxv16i32(i32 %a, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 1018; CHECK-LABEL: vpmerge_vx_nxv16i32: 1019; CHECK: # %bb.0: 1020; CHECK-NEXT: vsetvli zero, a1, e32, m8, tu, ma 1021; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0 1022; CHECK-NEXT: ret 1023 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %a, i32 0 1024 %va = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer 1025 %v = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, i32 %evl) 1026 ret <vscale x 16 x i32> %v 1027} 1028 1029define <vscale x 16 x i32> @vpmerge_vi_nxv16i32(<vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 1030; CHECK-LABEL: vpmerge_vi_nxv16i32: 1031; CHECK: # %bb.0: 1032; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma 1033; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 1034; CHECK-NEXT: ret 1035 %v = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> splat (i32 2), <vscale x 16 x i32> %vb, i32 %evl) 1036 ret <vscale x 16 x i32> %v 1037} 1038 1039declare <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1>, <vscale x 1 x i64>, <vscale x 1 x i64>, i32) 1040 1041define <vscale x 1 x i64> @vpmerge_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1042; CHECK-LABEL: vpmerge_vv_nxv1i64: 1043; CHECK: # %bb.0: 1044; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma 1045; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 1046; CHECK-NEXT: vmv1r.v v8, v9 1047; CHECK-NEXT: ret 1048 %v = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, i32 %evl) 1049 ret <vscale x 1 x i64> %v 1050} 1051 1052define <vscale x 1 x i64> @vpmerge_vx_nxv1i64(i64 %a, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1053; RV32-LABEL: vpmerge_vx_nxv1i64: 1054; RV32: # %bb.0: 1055; RV32-NEXT: addi sp, sp, -16 1056; RV32-NEXT: .cfi_def_cfa_offset 16 1057; RV32-NEXT: sw a0, 8(sp) 1058; RV32-NEXT: sw a1, 12(sp) 1059; RV32-NEXT: addi a0, sp, 8 1060; RV32-NEXT: vsetvli zero, a2, e64, m1, tu, mu 1061; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t 1062; RV32-NEXT: addi sp, sp, 16 1063; RV32-NEXT: .cfi_def_cfa_offset 0 1064; RV32-NEXT: ret 1065; 1066; RV64-LABEL: vpmerge_vx_nxv1i64: 1067; RV64: # %bb.0: 1068; RV64-NEXT: vsetvli zero, a1, e64, m1, tu, ma 1069; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 1070; RV64-NEXT: ret 1071 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %a, i32 0 1072 %va = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer 1073 %v = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, i32 %evl) 1074 ret <vscale x 1 x i64> %v 1075} 1076 1077define <vscale x 1 x i64> @vpmerge_vi_nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1078; CHECK-LABEL: vpmerge_vi_nxv1i64: 1079; CHECK: # %bb.0: 1080; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma 1081; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 1082; CHECK-NEXT: ret 1083 %v = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> splat (i64 2), <vscale x 1 x i64> %vb, i32 %evl) 1084 ret <vscale x 1 x i64> %v 1085} 1086 1087declare <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 2 x i64>, i32) 1088 1089define <vscale x 2 x i64> @vpmerge_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1090; CHECK-LABEL: vpmerge_vv_nxv2i64: 1091; CHECK: # %bb.0: 1092; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma 1093; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 1094; CHECK-NEXT: vmv2r.v v8, v10 1095; CHECK-NEXT: ret 1096 %v = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, i32 %evl) 1097 ret <vscale x 2 x i64> %v 1098} 1099 1100define <vscale x 2 x i64> @vpmerge_vx_nxv2i64(i64 %a, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1101; RV32-LABEL: vpmerge_vx_nxv2i64: 1102; RV32: # %bb.0: 1103; RV32-NEXT: addi sp, sp, -16 1104; RV32-NEXT: .cfi_def_cfa_offset 16 1105; RV32-NEXT: sw a0, 8(sp) 1106; RV32-NEXT: sw a1, 12(sp) 1107; RV32-NEXT: addi a0, sp, 8 1108; RV32-NEXT: vsetvli zero, a2, e64, m2, tu, mu 1109; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t 1110; RV32-NEXT: addi sp, sp, 16 1111; RV32-NEXT: .cfi_def_cfa_offset 0 1112; RV32-NEXT: ret 1113; 1114; RV64-LABEL: vpmerge_vx_nxv2i64: 1115; RV64: # %bb.0: 1116; RV64-NEXT: vsetvli zero, a1, e64, m2, tu, ma 1117; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 1118; RV64-NEXT: ret 1119 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %a, i32 0 1120 %va = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer 1121 %v = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, i32 %evl) 1122 ret <vscale x 2 x i64> %v 1123} 1124 1125define <vscale x 2 x i64> @vpmerge_vi_nxv2i64(<vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1126; CHECK-LABEL: vpmerge_vi_nxv2i64: 1127; CHECK: # %bb.0: 1128; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma 1129; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 1130; CHECK-NEXT: ret 1131 %v = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> splat (i64 2), <vscale x 2 x i64> %vb, i32 %evl) 1132 ret <vscale x 2 x i64> %v 1133} 1134 1135declare <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1>, <vscale x 4 x i64>, <vscale x 4 x i64>, i32) 1136 1137define <vscale x 4 x i64> @vpmerge_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1138; CHECK-LABEL: vpmerge_vv_nxv4i64: 1139; CHECK: # %bb.0: 1140; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma 1141; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 1142; CHECK-NEXT: vmv4r.v v8, v12 1143; CHECK-NEXT: ret 1144 %v = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, i32 %evl) 1145 ret <vscale x 4 x i64> %v 1146} 1147 1148define <vscale x 4 x i64> @vpmerge_vx_nxv4i64(i64 %a, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1149; RV32-LABEL: vpmerge_vx_nxv4i64: 1150; RV32: # %bb.0: 1151; RV32-NEXT: addi sp, sp, -16 1152; RV32-NEXT: .cfi_def_cfa_offset 16 1153; RV32-NEXT: sw a0, 8(sp) 1154; RV32-NEXT: sw a1, 12(sp) 1155; RV32-NEXT: addi a0, sp, 8 1156; RV32-NEXT: vsetvli zero, a2, e64, m4, tu, mu 1157; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t 1158; RV32-NEXT: addi sp, sp, 16 1159; RV32-NEXT: .cfi_def_cfa_offset 0 1160; RV32-NEXT: ret 1161; 1162; RV64-LABEL: vpmerge_vx_nxv4i64: 1163; RV64: # %bb.0: 1164; RV64-NEXT: vsetvli zero, a1, e64, m4, tu, ma 1165; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 1166; RV64-NEXT: ret 1167 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %a, i32 0 1168 %va = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer 1169 %v = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, i32 %evl) 1170 ret <vscale x 4 x i64> %v 1171} 1172 1173define <vscale x 4 x i64> @vpmerge_vi_nxv4i64(<vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1174; CHECK-LABEL: vpmerge_vi_nxv4i64: 1175; CHECK: # %bb.0: 1176; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma 1177; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 1178; CHECK-NEXT: ret 1179 %v = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> splat (i64 2), <vscale x 4 x i64> %vb, i32 %evl) 1180 ret <vscale x 4 x i64> %v 1181} 1182 1183declare <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1>, <vscale x 8 x i64>, <vscale x 8 x i64>, i32) 1184 1185define <vscale x 8 x i64> @vpmerge_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1186; CHECK-LABEL: vpmerge_vv_nxv8i64: 1187; CHECK: # %bb.0: 1188; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma 1189; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 1190; CHECK-NEXT: vmv8r.v v8, v16 1191; CHECK-NEXT: ret 1192 %v = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, i32 %evl) 1193 ret <vscale x 8 x i64> %v 1194} 1195 1196define <vscale x 8 x i64> @vpmerge_vx_nxv8i64(i64 %a, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1197; RV32-LABEL: vpmerge_vx_nxv8i64: 1198; RV32: # %bb.0: 1199; RV32-NEXT: addi sp, sp, -16 1200; RV32-NEXT: .cfi_def_cfa_offset 16 1201; RV32-NEXT: sw a0, 8(sp) 1202; RV32-NEXT: sw a1, 12(sp) 1203; RV32-NEXT: addi a0, sp, 8 1204; RV32-NEXT: vsetvli zero, a2, e64, m8, tu, mu 1205; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t 1206; RV32-NEXT: addi sp, sp, 16 1207; RV32-NEXT: .cfi_def_cfa_offset 0 1208; RV32-NEXT: ret 1209; 1210; RV64-LABEL: vpmerge_vx_nxv8i64: 1211; RV64: # %bb.0: 1212; RV64-NEXT: vsetvli zero, a1, e64, m8, tu, ma 1213; RV64-NEXT: vmerge.vxm v8, v8, a0, v0 1214; RV64-NEXT: ret 1215 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %a, i32 0 1216 %va = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer 1217 %v = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, i32 %evl) 1218 ret <vscale x 8 x i64> %v 1219} 1220 1221define <vscale x 8 x i64> @vpmerge_vi_nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1222; CHECK-LABEL: vpmerge_vi_nxv8i64: 1223; CHECK: # %bb.0: 1224; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma 1225; CHECK-NEXT: vmerge.vim v8, v8, 2, v0 1226; CHECK-NEXT: ret 1227 %v = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> splat (i64 2), <vscale x 8 x i64> %vb, i32 %evl) 1228 ret <vscale x 8 x i64> %v 1229} 1230 1231declare <vscale x 1 x half> @llvm.vp.merge.nxv1f16(<vscale x 1 x i1>, <vscale x 1 x half>, <vscale x 1 x half>, i32) 1232 1233define <vscale x 1 x half> @vpmerge_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1234; CHECK-LABEL: vpmerge_vv_nxv1f16: 1235; CHECK: # %bb.0: 1236; CHECK-NEXT: vsetvli zero, a0, e16, mf4, tu, ma 1237; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 1238; CHECK-NEXT: vmv1r.v v8, v9 1239; CHECK-NEXT: ret 1240 %v = call <vscale x 1 x half> @llvm.vp.merge.nxv1f16(<vscale x 1 x i1> %m, <vscale x 1 x half> %va, <vscale x 1 x half> %vb, i32 %evl) 1241 ret <vscale x 1 x half> %v 1242} 1243 1244define <vscale x 1 x half> @vpmerge_vf_nxv1f16(half %a, <vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1245; RV32ZVFH-LABEL: vpmerge_vf_nxv1f16: 1246; RV32ZVFH: # %bb.0: 1247; RV32ZVFH-NEXT: vsetvli zero, a0, e16, mf4, tu, ma 1248; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1249; RV32ZVFH-NEXT: ret 1250; 1251; RV64ZVFH-LABEL: vpmerge_vf_nxv1f16: 1252; RV64ZVFH: # %bb.0: 1253; RV64ZVFH-NEXT: vsetvli zero, a0, e16, mf4, tu, ma 1254; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1255; RV64ZVFH-NEXT: ret 1256; 1257; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv1f16: 1258; RV32ZVFHMIN: # %bb.0: 1259; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0 1260; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma 1261; RV32ZVFHMIN-NEXT: vmv.v.x v9, a1 1262; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, tu, ma 1263; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0 1264; RV32ZVFHMIN-NEXT: ret 1265; 1266; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv1f16: 1267; RV64ZVFHMIN: # %bb.0: 1268; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0 1269; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma 1270; RV64ZVFHMIN-NEXT: vmv.v.x v9, a1 1271; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, tu, ma 1272; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0 1273; RV64ZVFHMIN-NEXT: ret 1274 %elt.head = insertelement <vscale x 1 x half> poison, half %a, i32 0 1275 %va = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer 1276 %v = call <vscale x 1 x half> @llvm.vp.merge.nxv1f16(<vscale x 1 x i1> %m, <vscale x 1 x half> %va, <vscale x 1 x half> %vb, i32 %evl) 1277 ret <vscale x 1 x half> %v 1278} 1279 1280declare <vscale x 2 x half> @llvm.vp.merge.nxv2f16(<vscale x 2 x i1>, <vscale x 2 x half>, <vscale x 2 x half>, i32) 1281 1282define <vscale x 2 x half> @vpmerge_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1283; CHECK-LABEL: vpmerge_vv_nxv2f16: 1284; CHECK: # %bb.0: 1285; CHECK-NEXT: vsetvli zero, a0, e16, mf2, tu, ma 1286; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 1287; CHECK-NEXT: vmv1r.v v8, v9 1288; CHECK-NEXT: ret 1289 %v = call <vscale x 2 x half> @llvm.vp.merge.nxv2f16(<vscale x 2 x i1> %m, <vscale x 2 x half> %va, <vscale x 2 x half> %vb, i32 %evl) 1290 ret <vscale x 2 x half> %v 1291} 1292 1293define <vscale x 2 x half> @vpmerge_vf_nxv2f16(half %a, <vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1294; RV32ZVFH-LABEL: vpmerge_vf_nxv2f16: 1295; RV32ZVFH: # %bb.0: 1296; RV32ZVFH-NEXT: vsetvli zero, a0, e16, mf2, tu, ma 1297; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1298; RV32ZVFH-NEXT: ret 1299; 1300; RV64ZVFH-LABEL: vpmerge_vf_nxv2f16: 1301; RV64ZVFH: # %bb.0: 1302; RV64ZVFH-NEXT: vsetvli zero, a0, e16, mf2, tu, ma 1303; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1304; RV64ZVFH-NEXT: ret 1305; 1306; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv2f16: 1307; RV32ZVFHMIN: # %bb.0: 1308; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0 1309; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma 1310; RV32ZVFHMIN-NEXT: vmv.v.x v9, a1 1311; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, tu, ma 1312; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0 1313; RV32ZVFHMIN-NEXT: ret 1314; 1315; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv2f16: 1316; RV64ZVFHMIN: # %bb.0: 1317; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0 1318; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma 1319; RV64ZVFHMIN-NEXT: vmv.v.x v9, a1 1320; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, tu, ma 1321; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0 1322; RV64ZVFHMIN-NEXT: ret 1323 %elt.head = insertelement <vscale x 2 x half> poison, half %a, i32 0 1324 %va = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer 1325 %v = call <vscale x 2 x half> @llvm.vp.merge.nxv2f16(<vscale x 2 x i1> %m, <vscale x 2 x half> %va, <vscale x 2 x half> %vb, i32 %evl) 1326 ret <vscale x 2 x half> %v 1327} 1328 1329declare <vscale x 4 x half> @llvm.vp.merge.nxv4f16(<vscale x 4 x i1>, <vscale x 4 x half>, <vscale x 4 x half>, i32) 1330 1331define <vscale x 4 x half> @vpmerge_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1332; CHECK-LABEL: vpmerge_vv_nxv4f16: 1333; CHECK: # %bb.0: 1334; CHECK-NEXT: vsetvli zero, a0, e16, m1, tu, ma 1335; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 1336; CHECK-NEXT: vmv1r.v v8, v9 1337; CHECK-NEXT: ret 1338 %v = call <vscale x 4 x half> @llvm.vp.merge.nxv4f16(<vscale x 4 x i1> %m, <vscale x 4 x half> %va, <vscale x 4 x half> %vb, i32 %evl) 1339 ret <vscale x 4 x half> %v 1340} 1341 1342define <vscale x 4 x half> @vpmerge_vf_nxv4f16(half %a, <vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1343; RV32ZVFH-LABEL: vpmerge_vf_nxv4f16: 1344; RV32ZVFH: # %bb.0: 1345; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m1, tu, ma 1346; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1347; RV32ZVFH-NEXT: ret 1348; 1349; RV64ZVFH-LABEL: vpmerge_vf_nxv4f16: 1350; RV64ZVFH: # %bb.0: 1351; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m1, tu, ma 1352; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1353; RV64ZVFH-NEXT: ret 1354; 1355; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv4f16: 1356; RV32ZVFHMIN: # %bb.0: 1357; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0 1358; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma 1359; RV32ZVFHMIN-NEXT: vmv.v.x v9, a1 1360; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, tu, ma 1361; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0 1362; RV32ZVFHMIN-NEXT: ret 1363; 1364; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv4f16: 1365; RV64ZVFHMIN: # %bb.0: 1366; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0 1367; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma 1368; RV64ZVFHMIN-NEXT: vmv.v.x v9, a1 1369; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, tu, ma 1370; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0 1371; RV64ZVFHMIN-NEXT: ret 1372 %elt.head = insertelement <vscale x 4 x half> poison, half %a, i32 0 1373 %va = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer 1374 %v = call <vscale x 4 x half> @llvm.vp.merge.nxv4f16(<vscale x 4 x i1> %m, <vscale x 4 x half> %va, <vscale x 4 x half> %vb, i32 %evl) 1375 ret <vscale x 4 x half> %v 1376} 1377 1378declare <vscale x 8 x half> @llvm.vp.merge.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, i32) 1379 1380define <vscale x 8 x half> @vpmerge_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1381; CHECK-LABEL: vpmerge_vv_nxv8f16: 1382; CHECK: # %bb.0: 1383; CHECK-NEXT: vsetvli zero, a0, e16, m2, tu, ma 1384; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 1385; CHECK-NEXT: vmv2r.v v8, v10 1386; CHECK-NEXT: ret 1387 %v = call <vscale x 8 x half> @llvm.vp.merge.nxv8f16(<vscale x 8 x i1> %m, <vscale x 8 x half> %va, <vscale x 8 x half> %vb, i32 %evl) 1388 ret <vscale x 8 x half> %v 1389} 1390 1391define <vscale x 8 x half> @vpmerge_vf_nxv8f16(half %a, <vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1392; RV32ZVFH-LABEL: vpmerge_vf_nxv8f16: 1393; RV32ZVFH: # %bb.0: 1394; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m2, tu, ma 1395; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1396; RV32ZVFH-NEXT: ret 1397; 1398; RV64ZVFH-LABEL: vpmerge_vf_nxv8f16: 1399; RV64ZVFH: # %bb.0: 1400; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m2, tu, ma 1401; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1402; RV64ZVFH-NEXT: ret 1403; 1404; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv8f16: 1405; RV32ZVFHMIN: # %bb.0: 1406; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0 1407; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma 1408; RV32ZVFHMIN-NEXT: vmv.v.x v10, a1 1409; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, tu, ma 1410; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v10, v0 1411; RV32ZVFHMIN-NEXT: ret 1412; 1413; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv8f16: 1414; RV64ZVFHMIN: # %bb.0: 1415; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0 1416; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma 1417; RV64ZVFHMIN-NEXT: vmv.v.x v10, a1 1418; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, tu, ma 1419; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v10, v0 1420; RV64ZVFHMIN-NEXT: ret 1421 %elt.head = insertelement <vscale x 8 x half> poison, half %a, i32 0 1422 %va = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer 1423 %v = call <vscale x 8 x half> @llvm.vp.merge.nxv8f16(<vscale x 8 x i1> %m, <vscale x 8 x half> %va, <vscale x 8 x half> %vb, i32 %evl) 1424 ret <vscale x 8 x half> %v 1425} 1426 1427declare <vscale x 16 x half> @llvm.vp.merge.nxv16f16(<vscale x 16 x i1>, <vscale x 16 x half>, <vscale x 16 x half>, i32) 1428 1429define <vscale x 16 x half> @vpmerge_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 1430; CHECK-LABEL: vpmerge_vv_nxv16f16: 1431; CHECK: # %bb.0: 1432; CHECK-NEXT: vsetvli zero, a0, e16, m4, tu, ma 1433; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 1434; CHECK-NEXT: vmv4r.v v8, v12 1435; CHECK-NEXT: ret 1436 %v = call <vscale x 16 x half> @llvm.vp.merge.nxv16f16(<vscale x 16 x i1> %m, <vscale x 16 x half> %va, <vscale x 16 x half> %vb, i32 %evl) 1437 ret <vscale x 16 x half> %v 1438} 1439 1440define <vscale x 16 x half> @vpmerge_vf_nxv16f16(half %a, <vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 1441; RV32ZVFH-LABEL: vpmerge_vf_nxv16f16: 1442; RV32ZVFH: # %bb.0: 1443; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m4, tu, ma 1444; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1445; RV32ZVFH-NEXT: ret 1446; 1447; RV64ZVFH-LABEL: vpmerge_vf_nxv16f16: 1448; RV64ZVFH: # %bb.0: 1449; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m4, tu, ma 1450; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1451; RV64ZVFH-NEXT: ret 1452; 1453; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv16f16: 1454; RV32ZVFHMIN: # %bb.0: 1455; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0 1456; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma 1457; RV32ZVFHMIN-NEXT: vmv.v.x v12, a1 1458; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, tu, ma 1459; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v12, v0 1460; RV32ZVFHMIN-NEXT: ret 1461; 1462; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv16f16: 1463; RV64ZVFHMIN: # %bb.0: 1464; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0 1465; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma 1466; RV64ZVFHMIN-NEXT: vmv.v.x v12, a1 1467; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, tu, ma 1468; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v12, v0 1469; RV64ZVFHMIN-NEXT: ret 1470 %elt.head = insertelement <vscale x 16 x half> poison, half %a, i32 0 1471 %va = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer 1472 %v = call <vscale x 16 x half> @llvm.vp.merge.nxv16f16(<vscale x 16 x i1> %m, <vscale x 16 x half> %va, <vscale x 16 x half> %vb, i32 %evl) 1473 ret <vscale x 16 x half> %v 1474} 1475 1476declare <vscale x 32 x half> @llvm.vp.merge.nxv32f16(<vscale x 32 x i1>, <vscale x 32 x half>, <vscale x 32 x half>, i32) 1477 1478define <vscale x 32 x half> @vpmerge_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) { 1479; CHECK-LABEL: vpmerge_vv_nxv32f16: 1480; CHECK: # %bb.0: 1481; CHECK-NEXT: vsetvli zero, a0, e16, m8, tu, ma 1482; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 1483; CHECK-NEXT: vmv8r.v v8, v16 1484; CHECK-NEXT: ret 1485 %v = call <vscale x 32 x half> @llvm.vp.merge.nxv32f16(<vscale x 32 x i1> %m, <vscale x 32 x half> %va, <vscale x 32 x half> %vb, i32 %evl) 1486 ret <vscale x 32 x half> %v 1487} 1488 1489define <vscale x 32 x half> @vpmerge_vf_nxv32f16(half %a, <vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) { 1490; RV32ZVFH-LABEL: vpmerge_vf_nxv32f16: 1491; RV32ZVFH: # %bb.0: 1492; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m8, tu, ma 1493; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1494; RV32ZVFH-NEXT: ret 1495; 1496; RV64ZVFH-LABEL: vpmerge_vf_nxv32f16: 1497; RV64ZVFH: # %bb.0: 1498; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m8, tu, ma 1499; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0 1500; RV64ZVFH-NEXT: ret 1501; 1502; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv32f16: 1503; RV32ZVFHMIN: # %bb.0: 1504; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0 1505; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma 1506; RV32ZVFHMIN-NEXT: vmv.v.x v16, a1 1507; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, m8, tu, ma 1508; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v16, v0 1509; RV32ZVFHMIN-NEXT: ret 1510; 1511; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv32f16: 1512; RV64ZVFHMIN: # %bb.0: 1513; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0 1514; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma 1515; RV64ZVFHMIN-NEXT: vmv.v.x v16, a1 1516; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, m8, tu, ma 1517; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v16, v0 1518; RV64ZVFHMIN-NEXT: ret 1519 %elt.head = insertelement <vscale x 32 x half> poison, half %a, i32 0 1520 %va = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer 1521 %v = call <vscale x 32 x half> @llvm.vp.merge.nxv32f16(<vscale x 32 x i1> %m, <vscale x 32 x half> %va, <vscale x 32 x half> %vb, i32 %evl) 1522 ret <vscale x 32 x half> %v 1523} 1524 1525declare <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1>, <vscale x 1 x float>, <vscale x 1 x float>, i32) 1526 1527define <vscale x 1 x float> @vpmerge_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1528; CHECK-LABEL: vpmerge_vv_nxv1f32: 1529; CHECK: # %bb.0: 1530; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma 1531; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 1532; CHECK-NEXT: vmv1r.v v8, v9 1533; CHECK-NEXT: ret 1534 %v = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> %m, <vscale x 1 x float> %va, <vscale x 1 x float> %vb, i32 %evl) 1535 ret <vscale x 1 x float> %v 1536} 1537 1538define <vscale x 1 x float> @vpmerge_vf_nxv1f32(float %a, <vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1539; CHECK-LABEL: vpmerge_vf_nxv1f32: 1540; CHECK: # %bb.0: 1541; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma 1542; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 1543; CHECK-NEXT: ret 1544 %elt.head = insertelement <vscale x 1 x float> poison, float %a, i32 0 1545 %va = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer 1546 %v = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> %m, <vscale x 1 x float> %va, <vscale x 1 x float> %vb, i32 %evl) 1547 ret <vscale x 1 x float> %v 1548} 1549 1550declare <vscale x 2 x float> @llvm.vp.merge.nxv2f32(<vscale x 2 x i1>, <vscale x 2 x float>, <vscale x 2 x float>, i32) 1551 1552define <vscale x 2 x float> @vpmerge_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1553; CHECK-LABEL: vpmerge_vv_nxv2f32: 1554; CHECK: # %bb.0: 1555; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma 1556; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 1557; CHECK-NEXT: vmv1r.v v8, v9 1558; CHECK-NEXT: ret 1559 %v = call <vscale x 2 x float> @llvm.vp.merge.nxv2f32(<vscale x 2 x i1> %m, <vscale x 2 x float> %va, <vscale x 2 x float> %vb, i32 %evl) 1560 ret <vscale x 2 x float> %v 1561} 1562 1563define <vscale x 2 x float> @vpmerge_vf_nxv2f32(float %a, <vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1564; CHECK-LABEL: vpmerge_vf_nxv2f32: 1565; CHECK: # %bb.0: 1566; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma 1567; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 1568; CHECK-NEXT: ret 1569 %elt.head = insertelement <vscale x 2 x float> poison, float %a, i32 0 1570 %va = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer 1571 %v = call <vscale x 2 x float> @llvm.vp.merge.nxv2f32(<vscale x 2 x i1> %m, <vscale x 2 x float> %va, <vscale x 2 x float> %vb, i32 %evl) 1572 ret <vscale x 2 x float> %v 1573} 1574 1575declare <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, i32) 1576 1577define <vscale x 4 x float> @vpmerge_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1578; CHECK-LABEL: vpmerge_vv_nxv4f32: 1579; CHECK: # %bb.0: 1580; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma 1581; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 1582; CHECK-NEXT: vmv2r.v v8, v10 1583; CHECK-NEXT: ret 1584 %v = call <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1> %m, <vscale x 4 x float> %va, <vscale x 4 x float> %vb, i32 %evl) 1585 ret <vscale x 4 x float> %v 1586} 1587 1588define <vscale x 4 x float> @vpmerge_vf_nxv4f32(float %a, <vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1589; CHECK-LABEL: vpmerge_vf_nxv4f32: 1590; CHECK: # %bb.0: 1591; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma 1592; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 1593; CHECK-NEXT: ret 1594 %elt.head = insertelement <vscale x 4 x float> poison, float %a, i32 0 1595 %va = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer 1596 %v = call <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1> %m, <vscale x 4 x float> %va, <vscale x 4 x float> %vb, i32 %evl) 1597 ret <vscale x 4 x float> %v 1598} 1599 1600declare <vscale x 8 x float> @llvm.vp.merge.nxv8f32(<vscale x 8 x i1>, <vscale x 8 x float>, <vscale x 8 x float>, i32) 1601 1602define <vscale x 8 x float> @vpmerge_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1603; CHECK-LABEL: vpmerge_vv_nxv8f32: 1604; CHECK: # %bb.0: 1605; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma 1606; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 1607; CHECK-NEXT: vmv4r.v v8, v12 1608; CHECK-NEXT: ret 1609 %v = call <vscale x 8 x float> @llvm.vp.merge.nxv8f32(<vscale x 8 x i1> %m, <vscale x 8 x float> %va, <vscale x 8 x float> %vb, i32 %evl) 1610 ret <vscale x 8 x float> %v 1611} 1612 1613define <vscale x 8 x float> @vpmerge_vf_nxv8f32(float %a, <vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1614; CHECK-LABEL: vpmerge_vf_nxv8f32: 1615; CHECK: # %bb.0: 1616; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma 1617; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 1618; CHECK-NEXT: ret 1619 %elt.head = insertelement <vscale x 8 x float> poison, float %a, i32 0 1620 %va = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer 1621 %v = call <vscale x 8 x float> @llvm.vp.merge.nxv8f32(<vscale x 8 x i1> %m, <vscale x 8 x float> %va, <vscale x 8 x float> %vb, i32 %evl) 1622 ret <vscale x 8 x float> %v 1623} 1624 1625declare <vscale x 16 x float> @llvm.vp.merge.nxv16f32(<vscale x 16 x i1>, <vscale x 16 x float>, <vscale x 16 x float>, i32) 1626 1627define <vscale x 16 x float> @vpmerge_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 1628; CHECK-LABEL: vpmerge_vv_nxv16f32: 1629; CHECK: # %bb.0: 1630; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma 1631; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 1632; CHECK-NEXT: vmv8r.v v8, v16 1633; CHECK-NEXT: ret 1634 %v = call <vscale x 16 x float> @llvm.vp.merge.nxv16f32(<vscale x 16 x i1> %m, <vscale x 16 x float> %va, <vscale x 16 x float> %vb, i32 %evl) 1635 ret <vscale x 16 x float> %v 1636} 1637 1638define <vscale x 16 x float> @vpmerge_vf_nxv16f32(float %a, <vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) { 1639; CHECK-LABEL: vpmerge_vf_nxv16f32: 1640; CHECK: # %bb.0: 1641; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma 1642; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 1643; CHECK-NEXT: ret 1644 %elt.head = insertelement <vscale x 16 x float> poison, float %a, i32 0 1645 %va = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer 1646 %v = call <vscale x 16 x float> @llvm.vp.merge.nxv16f32(<vscale x 16 x i1> %m, <vscale x 16 x float> %va, <vscale x 16 x float> %vb, i32 %evl) 1647 ret <vscale x 16 x float> %v 1648} 1649 1650declare <vscale x 1 x double> @llvm.vp.merge.nxv1f64(<vscale x 1 x i1>, <vscale x 1 x double>, <vscale x 1 x double>, i32) 1651 1652define <vscale x 1 x double> @vpmerge_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1653; CHECK-LABEL: vpmerge_vv_nxv1f64: 1654; CHECK: # %bb.0: 1655; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma 1656; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0 1657; CHECK-NEXT: vmv1r.v v8, v9 1658; CHECK-NEXT: ret 1659 %v = call <vscale x 1 x double> @llvm.vp.merge.nxv1f64(<vscale x 1 x i1> %m, <vscale x 1 x double> %va, <vscale x 1 x double> %vb, i32 %evl) 1660 ret <vscale x 1 x double> %v 1661} 1662 1663define <vscale x 1 x double> @vpmerge_vf_nxv1f64(double %a, <vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1664; CHECK-LABEL: vpmerge_vf_nxv1f64: 1665; CHECK: # %bb.0: 1666; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma 1667; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 1668; CHECK-NEXT: ret 1669 %elt.head = insertelement <vscale x 1 x double> poison, double %a, i32 0 1670 %va = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer 1671 %v = call <vscale x 1 x double> @llvm.vp.merge.nxv1f64(<vscale x 1 x i1> %m, <vscale x 1 x double> %va, <vscale x 1 x double> %vb, i32 %evl) 1672 ret <vscale x 1 x double> %v 1673} 1674 1675declare <vscale x 2 x double> @llvm.vp.merge.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, i32) 1676 1677define <vscale x 2 x double> @vpmerge_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1678; CHECK-LABEL: vpmerge_vv_nxv2f64: 1679; CHECK: # %bb.0: 1680; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma 1681; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0 1682; CHECK-NEXT: vmv2r.v v8, v10 1683; CHECK-NEXT: ret 1684 %v = call <vscale x 2 x double> @llvm.vp.merge.nxv2f64(<vscale x 2 x i1> %m, <vscale x 2 x double> %va, <vscale x 2 x double> %vb, i32 %evl) 1685 ret <vscale x 2 x double> %v 1686} 1687 1688define <vscale x 2 x double> @vpmerge_vf_nxv2f64(double %a, <vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1689; CHECK-LABEL: vpmerge_vf_nxv2f64: 1690; CHECK: # %bb.0: 1691; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma 1692; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 1693; CHECK-NEXT: ret 1694 %elt.head = insertelement <vscale x 2 x double> poison, double %a, i32 0 1695 %va = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer 1696 %v = call <vscale x 2 x double> @llvm.vp.merge.nxv2f64(<vscale x 2 x i1> %m, <vscale x 2 x double> %va, <vscale x 2 x double> %vb, i32 %evl) 1697 ret <vscale x 2 x double> %v 1698} 1699 1700declare <vscale x 4 x double> @llvm.vp.merge.nxv4f64(<vscale x 4 x i1>, <vscale x 4 x double>, <vscale x 4 x double>, i32) 1701 1702define <vscale x 4 x double> @vpmerge_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1703; CHECK-LABEL: vpmerge_vv_nxv4f64: 1704; CHECK: # %bb.0: 1705; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma 1706; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0 1707; CHECK-NEXT: vmv4r.v v8, v12 1708; CHECK-NEXT: ret 1709 %v = call <vscale x 4 x double> @llvm.vp.merge.nxv4f64(<vscale x 4 x i1> %m, <vscale x 4 x double> %va, <vscale x 4 x double> %vb, i32 %evl) 1710 ret <vscale x 4 x double> %v 1711} 1712 1713define <vscale x 4 x double> @vpmerge_vf_nxv4f64(double %a, <vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1714; CHECK-LABEL: vpmerge_vf_nxv4f64: 1715; CHECK: # %bb.0: 1716; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma 1717; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 1718; CHECK-NEXT: ret 1719 %elt.head = insertelement <vscale x 4 x double> poison, double %a, i32 0 1720 %va = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer 1721 %v = call <vscale x 4 x double> @llvm.vp.merge.nxv4f64(<vscale x 4 x i1> %m, <vscale x 4 x double> %va, <vscale x 4 x double> %vb, i32 %evl) 1722 ret <vscale x 4 x double> %v 1723} 1724 1725declare <vscale x 8 x double> @llvm.vp.merge.nxv8f64(<vscale x 8 x i1>, <vscale x 8 x double>, <vscale x 8 x double>, i32) 1726 1727define <vscale x 8 x double> @vpmerge_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1728; CHECK-LABEL: vpmerge_vv_nxv8f64: 1729; CHECK: # %bb.0: 1730; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma 1731; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0 1732; CHECK-NEXT: vmv8r.v v8, v16 1733; CHECK-NEXT: ret 1734 %v = call <vscale x 8 x double> @llvm.vp.merge.nxv8f64(<vscale x 8 x i1> %m, <vscale x 8 x double> %va, <vscale x 8 x double> %vb, i32 %evl) 1735 ret <vscale x 8 x double> %v 1736} 1737 1738define <vscale x 8 x double> @vpmerge_vf_nxv8f64(double %a, <vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1739; CHECK-LABEL: vpmerge_vf_nxv8f64: 1740; CHECK: # %bb.0: 1741; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma 1742; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0 1743; CHECK-NEXT: ret 1744 %elt.head = insertelement <vscale x 8 x double> poison, double %a, i32 0 1745 %va = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer 1746 %v = call <vscale x 8 x double> @llvm.vp.merge.nxv8f64(<vscale x 8 x i1> %m, <vscale x 8 x double> %va, <vscale x 8 x double> %vb, i32 %evl) 1747 ret <vscale x 8 x double> %v 1748} 1749