xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vp-inttoptr-ptrtoint.ll (revision 2f2217a8f7ad68b2d9374e0515f02e6752acd126) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -mattr=+m,+v < %s | FileCheck %s
3
4declare <vscale x 4 x ptr> @llvm.vp.inttoptr.nxv4p0.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x i1>, i32)
5
6define <vscale x 4 x ptr> @inttoptr_nxv4p0_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
7; CHECK-LABEL: inttoptr_nxv4p0_nxv4i8:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
10; CHECK-NEXT:    vzext.vf8 v12, v8, v0.t
11; CHECK-NEXT:    vmv.v.v v8, v12
12; CHECK-NEXT:    ret
13  %v = call <vscale x 4 x ptr> @llvm.vp.inttoptr.nxv4p0.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 %evl)
14  ret <vscale x 4 x ptr> %v
15}
16
17declare <vscale x 4 x ptr> @llvm.vp.inttoptr.nxv4p0.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x i1>, i32)
18
19define <vscale x 4 x ptr> @inttoptr_nxv4p0_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
20; CHECK-LABEL: inttoptr_nxv4p0_nxv4i16:
21; CHECK:       # %bb.0:
22; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
23; CHECK-NEXT:    vzext.vf4 v12, v8, v0.t
24; CHECK-NEXT:    vmv.v.v v8, v12
25; CHECK-NEXT:    ret
26  %v = call <vscale x 4 x ptr> @llvm.vp.inttoptr.nxv4p0.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 %evl)
27  ret <vscale x 4 x ptr> %v
28}
29
30declare <vscale x 4 x ptr> @llvm.vp.inttoptr.nxv4p0.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i1>, i32)
31
32define <vscale x 4 x ptr> @inttoptr_nxv4p0_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
33; CHECK-LABEL: inttoptr_nxv4p0_nxv4i32:
34; CHECK:       # %bb.0:
35; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
36; CHECK-NEXT:    vzext.vf2 v12, v8, v0.t
37; CHECK-NEXT:    vmv.v.v v8, v12
38; CHECK-NEXT:    ret
39  %v = call <vscale x 4 x ptr> @llvm.vp.inttoptr.nxv4p0.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 %evl)
40  ret <vscale x 4 x ptr> %v
41}
42
43declare <vscale x 4 x ptr> @llvm.vp.inttoptr.nxv4p0.nxv4i64(<vscale x 4 x i64>, <vscale x 4 x i1>, i32)
44
45define <vscale x 4 x ptr> @inttoptr_nxv4p0_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
46; CHECK-LABEL: inttoptr_nxv4p0_nxv4i64:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    ret
49  %v = call <vscale x 4 x ptr> @llvm.vp.inttoptr.nxv4p0.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 %evl)
50  ret <vscale x 4 x ptr> %v
51}
52
53declare <vscale x 4 x i8> @llvm.vp.ptrtoint.nxv4i8.nxv4p0(<vscale x 4 x ptr>, <vscale x 4 x i1>, i32)
54
55define <vscale x 4 x i8> @ptrtoint_nxv4i8_nxv4p0(<vscale x 4 x ptr> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
56; CHECK-LABEL: ptrtoint_nxv4i8_nxv4p0:
57; CHECK:       # %bb.0:
58; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
59; CHECK-NEXT:    vnsrl.wi v12, v8, 0, v0.t
60; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
61; CHECK-NEXT:    vnsrl.wi v8, v12, 0, v0.t
62; CHECK-NEXT:    vsetvli zero, zero, e8, mf2, ta, ma
63; CHECK-NEXT:    vnsrl.wi v8, v8, 0, v0.t
64; CHECK-NEXT:    ret
65  %v = call <vscale x 4 x i8> @llvm.vp.ptrtoint.nxv4i8.nxv4p0(<vscale x 4 x ptr> %va, <vscale x 4 x i1> %m, i32 %evl)
66  ret <vscale x 4 x i8> %v
67}
68
69declare <vscale x 4 x i16> @llvm.vp.ptrtoint.nxv4i16.nxv4p0(<vscale x 4 x ptr>, <vscale x 4 x i1>, i32)
70
71define <vscale x 4 x i16> @ptrtoint_nxv4i16_nxv4p0(<vscale x 4 x ptr> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
72; CHECK-LABEL: ptrtoint_nxv4i16_nxv4p0:
73; CHECK:       # %bb.0:
74; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
75; CHECK-NEXT:    vnsrl.wi v12, v8, 0, v0.t
76; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
77; CHECK-NEXT:    vnsrl.wi v8, v12, 0, v0.t
78; CHECK-NEXT:    ret
79  %v = call <vscale x 4 x i16> @llvm.vp.ptrtoint.nxv4i16.nxv4p0(<vscale x 4 x ptr> %va, <vscale x 4 x i1> %m, i32 %evl)
80  ret <vscale x 4 x i16> %v
81}
82
83declare <vscale x 4 x i32> @llvm.vp.ptrtoint.nxv4i32.nxv4p0(<vscale x 4 x ptr>, <vscale x 4 x i1>, i32)
84
85define <vscale x 4 x i32> @ptrtoint_nxv4i32_nxv4p0(<vscale x 4 x ptr> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
86; CHECK-LABEL: ptrtoint_nxv4i32_nxv4p0:
87; CHECK:       # %bb.0:
88; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
89; CHECK-NEXT:    vnsrl.wi v12, v8, 0, v0.t
90; CHECK-NEXT:    vmv.v.v v8, v12
91; CHECK-NEXT:    ret
92  %v = call <vscale x 4 x i32> @llvm.vp.ptrtoint.nxv4i32.nxv4p0(<vscale x 4 x ptr> %va, <vscale x 4 x i1> %m, i32 %evl)
93  ret <vscale x 4 x i32> %v
94}
95
96declare <vscale x 4 x i64> @llvm.vp.ptrtoint.nxv4i64.nxv4p0(<vscale x 4 x ptr>, <vscale x 4 x i1>, i32)
97
98define <vscale x 4 x i64> @ptrtoint_nxv4i64_nxv4p0(<vscale x 4 x ptr> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
99; CHECK-LABEL: ptrtoint_nxv4i64_nxv4p0:
100; CHECK:       # %bb.0:
101; CHECK-NEXT:    ret
102  %v = call <vscale x 4 x i64> @llvm.vp.ptrtoint.nxv4i64.nxv4p0(<vscale x 4 x ptr> %va, <vscale x 4 x i1> %m, i32 %evl)
103  ret <vscale x 4 x i64> %v
104}
105