xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll (revision b48e5f0ff3f25e8bdd3ae473dca00511336cbd6f) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
4; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d \
5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
6; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=ilp32d \
7; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
8; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=lp64d \
9; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
10
11declare <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x i1>, i32)
12declare <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float>, <vscale x 1 x i1>, i32)
13declare <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half>, <vscale x 1 x i1>, i32)
14
15define <vscale x 1 x float> @vfnmsac_vv_nxv1f32(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
16; ZVFH-LABEL: vfnmsac_vv_nxv1f32:
17; ZVFH:       # %bb.0:
18; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
19; ZVFH-NEXT:    vfwnmsac.vv v10, v8, v9, v0.t
20; ZVFH-NEXT:    vmv1r.v v8, v10
21; ZVFH-NEXT:    ret
22;
23; ZVFHMIN-LABEL: vfnmsac_vv_nxv1f32:
24; ZVFHMIN:       # %bb.0:
25; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
26; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
27; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
28; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
29; ZVFHMIN-NEXT:    vfnmsub.vv v8, v11, v10, v0.t
30; ZVFHMIN-NEXT:    ret
31  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
32  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)
33  %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)
34  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %bext, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
35  ret <vscale x 1 x float> %v
36}
37
38define <vscale x 1 x float> @vfnmsac_vv_nxv1f32_unmasked(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
39; ZVFH-LABEL: vfnmsac_vv_nxv1f32_unmasked:
40; ZVFH:       # %bb.0:
41; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
42; ZVFH-NEXT:    vfwnmsac.vv v10, v8, v9
43; ZVFH-NEXT:    vmv1r.v v8, v10
44; ZVFH-NEXT:    ret
45;
46; ZVFHMIN-LABEL: vfnmsac_vv_nxv1f32_unmasked:
47; ZVFHMIN:       # %bb.0:
48; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
49; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
50; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
51; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
52; ZVFHMIN-NEXT:    vfnmsub.vv v8, v11, v10
53; ZVFHMIN-NEXT:    ret
54  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
55  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
56  %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
57  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %bext, <vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
58  ret <vscale x 1 x float> %v
59}
60
61define <vscale x 1 x float> @vfnmsac_vf_nxv1f32(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
62; ZVFH-LABEL: vfnmsac_vf_nxv1f32:
63; ZVFH:       # %bb.0:
64; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
65; ZVFH-NEXT:    vfwnmsac.vf v9, fa0, v8, v0.t
66; ZVFH-NEXT:    vmv1r.v v8, v9
67; ZVFH-NEXT:    ret
68;
69; ZVFHMIN-LABEL: vfnmsac_vf_nxv1f32:
70; ZVFHMIN:       # %bb.0:
71; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
72; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
73; ZVFHMIN-NEXT:    vmv.v.x v10, a1
74; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
75; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t
76; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
77; ZVFHMIN-NEXT:    vfnmsub.vv v8, v11, v9, v0.t
78; ZVFHMIN-NEXT:    ret
79  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
80  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
81  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
82  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
83  %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)
84  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %vbext, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
85  ret <vscale x 1 x float> %v
86}
87
88define <vscale x 1 x float> @vfnmsac_vf_nxv1f32_commute(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
89; ZVFH-LABEL: vfnmsac_vf_nxv1f32_commute:
90; ZVFH:       # %bb.0:
91; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
92; ZVFH-NEXT:    vfwnmsac.vf v9, fa0, v8, v0.t
93; ZVFH-NEXT:    vmv1r.v v8, v9
94; ZVFH-NEXT:    ret
95;
96; ZVFHMIN-LABEL: vfnmsac_vf_nxv1f32_commute:
97; ZVFHMIN:       # %bb.0:
98; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
99; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
100; ZVFHMIN-NEXT:    vmv.v.x v11, a1
101; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
102; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v11, v0.t
103; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
104; ZVFHMIN-NEXT:    vfnmsub.vv v10, v8, v9, v0.t
105; ZVFHMIN-NEXT:    vmv1r.v v8, v10
106; ZVFHMIN-NEXT:    ret
107  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
108  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
109  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
110  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
111  %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)
112  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vbext, <vscale x 1 x float> %nega, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
113  ret <vscale x 1 x float> %v
114}
115
116define <vscale x 1 x float> @vfnmsac_vf_nxv1f32_unmasked(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
117; ZVFH-LABEL: vfnmsac_vf_nxv1f32_unmasked:
118; ZVFH:       # %bb.0:
119; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
120; ZVFH-NEXT:    vfwnmsac.vf v9, fa0, v8
121; ZVFH-NEXT:    vmv1r.v v8, v9
122; ZVFH-NEXT:    ret
123;
124; ZVFHMIN-LABEL: vfnmsac_vf_nxv1f32_unmasked:
125; ZVFHMIN:       # %bb.0:
126; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
127; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
128; ZVFHMIN-NEXT:    vmv.v.x v10, a1
129; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
130; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10
131; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
132; ZVFHMIN-NEXT:    vfnmsub.vv v8, v11, v9
133; ZVFHMIN-NEXT:    ret
134  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
135  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
136  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
137  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
138  %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
139  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %vbext, <vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
140  ret <vscale x 1 x float> %v
141}
142
143declare <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x i1>, i32)
144declare <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
145declare <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half>, <vscale x 2 x i1>, i32)
146
147define <vscale x 2 x float> @vfnmsac_vv_nxv2f32(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
148; ZVFH-LABEL: vfnmsac_vv_nxv2f32:
149; ZVFH:       # %bb.0:
150; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
151; ZVFH-NEXT:    vfwnmsac.vv v10, v8, v9, v0.t
152; ZVFH-NEXT:    vmv1r.v v8, v10
153; ZVFH-NEXT:    ret
154;
155; ZVFHMIN-LABEL: vfnmsac_vv_nxv2f32:
156; ZVFHMIN:       # %bb.0:
157; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
158; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
159; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
160; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
161; ZVFHMIN-NEXT:    vfnmsub.vv v8, v11, v10, v0.t
162; ZVFHMIN-NEXT:    ret
163  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
164  %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)
165  %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)
166  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %bext, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
167  ret <vscale x 2 x float> %v
168}
169
170define <vscale x 2 x float> @vfnmsac_vv_nxv2f32_unmasked(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
171; ZVFH-LABEL: vfnmsac_vv_nxv2f32_unmasked:
172; ZVFH:       # %bb.0:
173; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
174; ZVFH-NEXT:    vfwnmsac.vv v10, v8, v9
175; ZVFH-NEXT:    vmv1r.v v8, v10
176; ZVFH-NEXT:    ret
177;
178; ZVFHMIN-LABEL: vfnmsac_vv_nxv2f32_unmasked:
179; ZVFHMIN:       # %bb.0:
180; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
181; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
182; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
183; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
184; ZVFHMIN-NEXT:    vfnmsub.vv v8, v11, v10
185; ZVFHMIN-NEXT:    ret
186  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
187  %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
188  %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
189  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %bext, <vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
190  ret <vscale x 2 x float> %v
191}
192
193define <vscale x 2 x float> @vfnmsac_vf_nxv2f32(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
194; ZVFH-LABEL: vfnmsac_vf_nxv2f32:
195; ZVFH:       # %bb.0:
196; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
197; ZVFH-NEXT:    vfwnmsac.vf v9, fa0, v8, v0.t
198; ZVFH-NEXT:    vmv1r.v v8, v9
199; ZVFH-NEXT:    ret
200;
201; ZVFHMIN-LABEL: vfnmsac_vf_nxv2f32:
202; ZVFHMIN:       # %bb.0:
203; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
204; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
205; ZVFHMIN-NEXT:    vmv.v.x v10, a1
206; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
207; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t
208; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
209; ZVFHMIN-NEXT:    vfnmsub.vv v8, v11, v9, v0.t
210; ZVFHMIN-NEXT:    ret
211  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
212  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
213  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
214  %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
215  %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)
216  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %vbext, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
217  ret <vscale x 2 x float> %v
218}
219
220define <vscale x 2 x float> @vfnmsac_vf_nxv2f32_commute(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
221; ZVFH-LABEL: vfnmsac_vf_nxv2f32_commute:
222; ZVFH:       # %bb.0:
223; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
224; ZVFH-NEXT:    vfwnmsac.vf v9, fa0, v8, v0.t
225; ZVFH-NEXT:    vmv1r.v v8, v9
226; ZVFH-NEXT:    ret
227;
228; ZVFHMIN-LABEL: vfnmsac_vf_nxv2f32_commute:
229; ZVFHMIN:       # %bb.0:
230; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
231; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
232; ZVFHMIN-NEXT:    vmv.v.x v11, a1
233; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
234; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v11, v0.t
235; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
236; ZVFHMIN-NEXT:    vfnmsub.vv v10, v8, v9, v0.t
237; ZVFHMIN-NEXT:    vmv.v.v v8, v10
238; ZVFHMIN-NEXT:    ret
239  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
240  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
241  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
242  %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
243  %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)
244  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vbext, <vscale x 2 x float> %nega, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
245  ret <vscale x 2 x float> %v
246}
247
248define <vscale x 2 x float> @vfnmsac_vf_nxv2f32_unmasked(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
249; ZVFH-LABEL: vfnmsac_vf_nxv2f32_unmasked:
250; ZVFH:       # %bb.0:
251; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
252; ZVFH-NEXT:    vfwnmsac.vf v9, fa0, v8
253; ZVFH-NEXT:    vmv1r.v v8, v9
254; ZVFH-NEXT:    ret
255;
256; ZVFHMIN-LABEL: vfnmsac_vf_nxv2f32_unmasked:
257; ZVFHMIN:       # %bb.0:
258; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
259; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
260; ZVFHMIN-NEXT:    vmv.v.x v10, a1
261; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
262; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10
263; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
264; ZVFHMIN-NEXT:    vfnmsub.vv v8, v11, v9
265; ZVFHMIN-NEXT:    ret
266  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
267  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
268  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
269  %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
270  %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
271  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %vbext, <vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
272  ret <vscale x 2 x float> %v
273}
274
275declare <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>, i32)
276declare <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, i32)
277declare <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half>, <vscale x 4 x i1>, i32)
278
279define <vscale x 4 x float> @vfnmsac_vv_nxv4f32(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
280; ZVFH-LABEL: vfnmsac_vv_nxv4f32:
281; ZVFH:       # %bb.0:
282; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
283; ZVFH-NEXT:    vfwnmsac.vv v10, v8, v9, v0.t
284; ZVFH-NEXT:    vmv2r.v v8, v10
285; ZVFH-NEXT:    ret
286;
287; ZVFHMIN-LABEL: vfnmsac_vv_nxv4f32:
288; ZVFHMIN:       # %bb.0:
289; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
290; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
291; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
292; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
293; ZVFHMIN-NEXT:    vfnmsub.vv v12, v14, v10, v0.t
294; ZVFHMIN-NEXT:    vmv.v.v v8, v12
295; ZVFHMIN-NEXT:    ret
296  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
297  %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)
298  %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)
299  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %bext, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
300  ret <vscale x 4 x float> %v
301}
302
303define <vscale x 4 x float> @vfnmsac_vv_nxv4f32_unmasked(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
304; ZVFH-LABEL: vfnmsac_vv_nxv4f32_unmasked:
305; ZVFH:       # %bb.0:
306; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
307; ZVFH-NEXT:    vfwnmsac.vv v10, v8, v9
308; ZVFH-NEXT:    vmv2r.v v8, v10
309; ZVFH-NEXT:    ret
310;
311; ZVFHMIN-LABEL: vfnmsac_vv_nxv4f32_unmasked:
312; ZVFHMIN:       # %bb.0:
313; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
314; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
315; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
316; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
317; ZVFHMIN-NEXT:    vfnmsub.vv v12, v14, v10
318; ZVFHMIN-NEXT:    vmv.v.v v8, v12
319; ZVFHMIN-NEXT:    ret
320  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
321  %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
322  %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
323  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %bext, <vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
324  ret <vscale x 4 x float> %v
325}
326
327define <vscale x 4 x float> @vfnmsac_vf_nxv4f32(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
328; ZVFH-LABEL: vfnmsac_vf_nxv4f32:
329; ZVFH:       # %bb.0:
330; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
331; ZVFH-NEXT:    vfwnmsac.vf v10, fa0, v8, v0.t
332; ZVFH-NEXT:    vmv2r.v v8, v10
333; ZVFH-NEXT:    ret
334;
335; ZVFHMIN-LABEL: vfnmsac_vf_nxv4f32:
336; ZVFHMIN:       # %bb.0:
337; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
338; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
339; ZVFHMIN-NEXT:    vmv.v.x v12, a1
340; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
341; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12, v0.t
342; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
343; ZVFHMIN-NEXT:    vfnmsub.vv v8, v14, v10, v0.t
344; ZVFHMIN-NEXT:    ret
345  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
346  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
347  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
348  %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
349  %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)
350  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %vbext, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
351  ret <vscale x 4 x float> %v
352}
353
354define <vscale x 4 x float> @vfnmsac_vf_nxv4f32_commute(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
355; ZVFH-LABEL: vfnmsac_vf_nxv4f32_commute:
356; ZVFH:       # %bb.0:
357; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
358; ZVFH-NEXT:    vfwnmsac.vf v10, fa0, v8, v0.t
359; ZVFH-NEXT:    vmv2r.v v8, v10
360; ZVFH-NEXT:    ret
361;
362; ZVFHMIN-LABEL: vfnmsac_vf_nxv4f32_commute:
363; ZVFHMIN:       # %bb.0:
364; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
365; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
366; ZVFHMIN-NEXT:    vmv.v.x v9, a1
367; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
368; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9, v0.t
369; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
370; ZVFHMIN-NEXT:    vfnmsub.vv v12, v14, v10, v0.t
371; ZVFHMIN-NEXT:    vmv.v.v v8, v12
372; ZVFHMIN-NEXT:    ret
373  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
374  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
375  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
376  %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
377  %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)
378  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vbext, <vscale x 4 x float> %nega, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
379  ret <vscale x 4 x float> %v
380}
381
382define <vscale x 4 x float> @vfnmsac_vf_nxv4f32_unmasked(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
383; ZVFH-LABEL: vfnmsac_vf_nxv4f32_unmasked:
384; ZVFH:       # %bb.0:
385; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
386; ZVFH-NEXT:    vfwnmsac.vf v10, fa0, v8
387; ZVFH-NEXT:    vmv2r.v v8, v10
388; ZVFH-NEXT:    ret
389;
390; ZVFHMIN-LABEL: vfnmsac_vf_nxv4f32_unmasked:
391; ZVFHMIN:       # %bb.0:
392; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
393; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
394; ZVFHMIN-NEXT:    vmv.v.x v12, a1
395; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
396; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12
397; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
398; ZVFHMIN-NEXT:    vfnmsub.vv v8, v14, v10
399; ZVFHMIN-NEXT:    ret
400  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
401  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
402  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
403  %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
404  %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
405  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %vbext, <vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
406  ret <vscale x 4 x float> %v
407}
408
409declare <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x i1>, i32)
410declare <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float>, <vscale x 8 x i1>, i32)
411declare <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, i32)
412
413define <vscale x 8 x float> @vfnmsac_vv_nxv8f32(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
414; ZVFH-LABEL: vfnmsac_vv_nxv8f32:
415; ZVFH:       # %bb.0:
416; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
417; ZVFH-NEXT:    vfwnmsac.vv v12, v8, v10, v0.t
418; ZVFH-NEXT:    vmv4r.v v8, v12
419; ZVFH-NEXT:    ret
420;
421; ZVFHMIN-LABEL: vfnmsac_vv_nxv8f32:
422; ZVFHMIN:       # %bb.0:
423; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
424; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
425; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
426; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
427; ZVFHMIN-NEXT:    vfnmsub.vv v16, v20, v12, v0.t
428; ZVFHMIN-NEXT:    vmv.v.v v8, v16
429; ZVFHMIN-NEXT:    ret
430  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
431  %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)
432  %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)
433  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %bext, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
434  ret <vscale x 8 x float> %v
435}
436
437define <vscale x 8 x float> @vfnmsac_vv_nxv8f32_unmasked(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
438; ZVFH-LABEL: vfnmsac_vv_nxv8f32_unmasked:
439; ZVFH:       # %bb.0:
440; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
441; ZVFH-NEXT:    vfwnmsac.vv v12, v8, v10
442; ZVFH-NEXT:    vmv4r.v v8, v12
443; ZVFH-NEXT:    ret
444;
445; ZVFHMIN-LABEL: vfnmsac_vv_nxv8f32_unmasked:
446; ZVFHMIN:       # %bb.0:
447; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
448; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
449; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
450; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
451; ZVFHMIN-NEXT:    vfnmsub.vv v16, v20, v12
452; ZVFHMIN-NEXT:    vmv.v.v v8, v16
453; ZVFHMIN-NEXT:    ret
454  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
455  %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
456  %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
457  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %bext, <vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
458  ret <vscale x 8 x float> %v
459}
460
461define <vscale x 8 x float> @vfnmsac_vf_nxv8f32(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
462; ZVFH-LABEL: vfnmsac_vf_nxv8f32:
463; ZVFH:       # %bb.0:
464; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
465; ZVFH-NEXT:    vfwnmsac.vf v12, fa0, v8, v0.t
466; ZVFH-NEXT:    vmv4r.v v8, v12
467; ZVFH-NEXT:    ret
468;
469; ZVFHMIN-LABEL: vfnmsac_vf_nxv8f32:
470; ZVFHMIN:       # %bb.0:
471; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
472; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
473; ZVFHMIN-NEXT:    vmv.v.x v16, a1
474; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
475; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t
476; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
477; ZVFHMIN-NEXT:    vfnmsub.vv v8, v20, v12, v0.t
478; ZVFHMIN-NEXT:    ret
479  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
480  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
481  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
482  %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
483  %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)
484  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %vbext, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
485  ret <vscale x 8 x float> %v
486}
487
488define <vscale x 8 x float> @vfnmsac_vf_nxv8f32_commute(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
489; ZVFH-LABEL: vfnmsac_vf_nxv8f32_commute:
490; ZVFH:       # %bb.0:
491; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
492; ZVFH-NEXT:    vfwnmsac.vf v12, fa0, v8, v0.t
493; ZVFH-NEXT:    vmv4r.v v8, v12
494; ZVFH-NEXT:    ret
495;
496; ZVFHMIN-LABEL: vfnmsac_vf_nxv8f32_commute:
497; ZVFHMIN:       # %bb.0:
498; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
499; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
500; ZVFHMIN-NEXT:    vmv.v.x v10, a1
501; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
502; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10, v0.t
503; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
504; ZVFHMIN-NEXT:    vfnmsub.vv v16, v20, v12, v0.t
505; ZVFHMIN-NEXT:    vmv.v.v v8, v16
506; ZVFHMIN-NEXT:    ret
507  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
508  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
509  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
510  %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
511  %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)
512  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vbext, <vscale x 8 x float> %nega, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
513  ret <vscale x 8 x float> %v
514}
515
516define <vscale x 8 x float> @vfnmsac_vf_nxv8f32_unmasked(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
517; ZVFH-LABEL: vfnmsac_vf_nxv8f32_unmasked:
518; ZVFH:       # %bb.0:
519; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
520; ZVFH-NEXT:    vfwnmsac.vf v12, fa0, v8
521; ZVFH-NEXT:    vmv4r.v v8, v12
522; ZVFH-NEXT:    ret
523;
524; ZVFHMIN-LABEL: vfnmsac_vf_nxv8f32_unmasked:
525; ZVFHMIN:       # %bb.0:
526; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
527; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
528; ZVFHMIN-NEXT:    vmv.v.x v16, a1
529; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
530; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16
531; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
532; ZVFHMIN-NEXT:    vfnmsub.vv v8, v20, v12
533; ZVFHMIN-NEXT:    ret
534  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
535  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
536  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
537  %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
538  %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
539  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %vbext, <vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
540  ret <vscale x 8 x float> %v
541}
542
543declare <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x i1>, i32)
544declare <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float>, <vscale x 16 x i1>, i32)
545declare <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half>, <vscale x 16 x i1>, i32)
546
547define <vscale x 16 x float> @vfnmsac_vv_nxv16f32(<vscale x 16 x half> %a, <vscale x 16 x half> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
548; ZVFH-LABEL: vfnmsac_vv_nxv16f32:
549; ZVFH:       # %bb.0:
550; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
551; ZVFH-NEXT:    vfwnmsac.vv v16, v8, v12, v0.t
552; ZVFH-NEXT:    vmv8r.v v8, v16
553; ZVFH-NEXT:    ret
554;
555; ZVFHMIN-LABEL: vfnmsac_vv_nxv16f32:
556; ZVFHMIN:       # %bb.0:
557; ZVFHMIN-NEXT:    addi sp, sp, -16
558; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
559; ZVFHMIN-NEXT:    csrr a1, vlenb
560; ZVFHMIN-NEXT:    slli a1, a1, 3
561; ZVFHMIN-NEXT:    sub sp, sp, a1
562; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
563; ZVFHMIN-NEXT:    addi a1, sp, 16
564; ZVFHMIN-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
565; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
566; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
567; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12, v0.t
568; ZVFHMIN-NEXT:    addi a0, sp, 16
569; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
570; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
571; ZVFHMIN-NEXT:    vfnmsub.vv v24, v16, v8, v0.t
572; ZVFHMIN-NEXT:    vmv.v.v v8, v24
573; ZVFHMIN-NEXT:    csrr a0, vlenb
574; ZVFHMIN-NEXT:    slli a0, a0, 3
575; ZVFHMIN-NEXT:    add sp, sp, a0
576; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
577; ZVFHMIN-NEXT:    addi sp, sp, 16
578; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
579; ZVFHMIN-NEXT:    ret
580  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)
581  %bext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)
582  %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)
583  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %bext, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
584  ret <vscale x 16 x float> %v
585}
586
587define <vscale x 16 x float> @vfnmsac_vv_nxv16f32_unmasked(<vscale x 16 x half> %a, <vscale x 16 x half> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
588; ZVFH-LABEL: vfnmsac_vv_nxv16f32_unmasked:
589; ZVFH:       # %bb.0:
590; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
591; ZVFH-NEXT:    vfwnmsac.vv v16, v8, v12
592; ZVFH-NEXT:    vmv8r.v v8, v16
593; ZVFH-NEXT:    ret
594;
595; ZVFHMIN-LABEL: vfnmsac_vv_nxv16f32_unmasked:
596; ZVFHMIN:       # %bb.0:
597; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
598; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
599; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
600; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
601; ZVFHMIN-NEXT:    vfnmsub.vv v24, v0, v16
602; ZVFHMIN-NEXT:    vmv.v.v v8, v24
603; ZVFHMIN-NEXT:    ret
604  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
605  %bext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
606  %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
607  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %bext, <vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
608  ret <vscale x 16 x float> %v
609}
610
611define <vscale x 16 x float> @vfnmsac_vf_nxv16f32(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
612; ZVFH-LABEL: vfnmsac_vf_nxv16f32:
613; ZVFH:       # %bb.0:
614; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
615; ZVFH-NEXT:    vfwnmsac.vf v16, fa0, v8, v0.t
616; ZVFH-NEXT:    vmv8r.v v8, v16
617; ZVFH-NEXT:    ret
618;
619; ZVFHMIN-LABEL: vfnmsac_vf_nxv16f32:
620; ZVFHMIN:       # %bb.0:
621; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
622; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
623; ZVFHMIN-NEXT:    vmv.v.x v4, a1
624; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
625; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t
626; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
627; ZVFHMIN-NEXT:    vfnmsub.vv v8, v24, v16, v0.t
628; ZVFHMIN-NEXT:    ret
629  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
630  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
631  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)
632  %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)
633  %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)
634  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %vbext, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
635  ret <vscale x 16 x float> %v
636}
637
638define <vscale x 16 x float> @vfnmsac_vf_nxv16f32_commute(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
639; ZVFH-LABEL: vfnmsac_vf_nxv16f32_commute:
640; ZVFH:       # %bb.0:
641; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
642; ZVFH-NEXT:    vfwnmsac.vf v16, fa0, v8, v0.t
643; ZVFH-NEXT:    vmv8r.v v8, v16
644; ZVFH-NEXT:    ret
645;
646; ZVFHMIN-LABEL: vfnmsac_vf_nxv16f32_commute:
647; ZVFHMIN:       # %bb.0:
648; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
649; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
650; ZVFHMIN-NEXT:    vmv.v.x v4, a1
651; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8, v0.t
652; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v4, v0.t
653; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
654; ZVFHMIN-NEXT:    vfnmsub.vv v24, v8, v16, v0.t
655; ZVFHMIN-NEXT:    vmv.v.v v8, v24
656; ZVFHMIN-NEXT:    ret
657  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
658  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
659  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)
660  %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)
661  %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)
662  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vbext, <vscale x 16 x float> %nega, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
663  ret <vscale x 16 x float> %v
664}
665
666define <vscale x 16 x float> @vfnmsac_vf_nxv16f32_unmasked(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
667; ZVFH-LABEL: vfnmsac_vf_nxv16f32_unmasked:
668; ZVFH:       # %bb.0:
669; ZVFH-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
670; ZVFH-NEXT:    vfwnmsac.vf v16, fa0, v8
671; ZVFH-NEXT:    vmv8r.v v8, v16
672; ZVFH-NEXT:    ret
673;
674; ZVFHMIN-LABEL: vfnmsac_vf_nxv16f32_unmasked:
675; ZVFHMIN:       # %bb.0:
676; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
677; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
678; ZVFHMIN-NEXT:    vmv.v.x v24, a1
679; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
680; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v24
681; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
682; ZVFHMIN-NEXT:    vfnmsub.vv v8, v0, v16
683; ZVFHMIN-NEXT:    ret
684  %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
685  %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
686  %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
687  %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
688  %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
689  %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %vbext, <vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
690  ret <vscale x 16 x float> %v
691}
692
693declare <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double>, <vscale x 1 x double>, <vscale x 1 x double>, <vscale x 1 x i1>, i32)
694declare <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double>, <vscale x 1 x i1>, i32)
695declare <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float>, <vscale x 1 x i1>, i32)
696
697define <vscale x 1 x double> @vfnmsac_vv_nxv1f64(<vscale x 1 x float> %a, <vscale x 1 x float> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
698; CHECK-LABEL: vfnmsac_vv_nxv1f64:
699; CHECK:       # %bb.0:
700; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
701; CHECK-NEXT:    vfwnmsac.vv v10, v8, v9, v0.t
702; CHECK-NEXT:    vmv1r.v v8, v10
703; CHECK-NEXT:    ret
704  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)
705  %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)
706  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)
707  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
708  ret <vscale x 1 x double> %v
709}
710
711define <vscale x 1 x double> @vfnmsac_vv_nxv1f64_unmasked(<vscale x 1 x float> %a, <vscale x 1 x float> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
712; CHECK-LABEL: vfnmsac_vv_nxv1f64_unmasked:
713; CHECK:       # %bb.0:
714; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
715; CHECK-NEXT:    vfwnmsac.vv v10, v8, v9
716; CHECK-NEXT:    vmv1r.v v8, v10
717; CHECK-NEXT:    ret
718  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
719  %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
720  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
721  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
722  ret <vscale x 1 x double> %v
723}
724
725define <vscale x 1 x double> @vfnmsac_vf_nxv1f64(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
726; CHECK-LABEL: vfnmsac_vf_nxv1f64:
727; CHECK:       # %bb.0:
728; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
729; CHECK-NEXT:    vfwnmsac.vf v9, fa0, v8, v0.t
730; CHECK-NEXT:    vmv1r.v v8, v9
731; CHECK-NEXT:    ret
732  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
733  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
734  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)
735  %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)
736  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)
737  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %vbext, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
738  ret <vscale x 1 x double> %v
739}
740
741define <vscale x 1 x double> @vfnmsac_vf_nxv1f64_commute(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
742; CHECK-LABEL: vfnmsac_vf_nxv1f64_commute:
743; CHECK:       # %bb.0:
744; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
745; CHECK-NEXT:    vfwnmsac.vf v9, fa0, v8, v0.t
746; CHECK-NEXT:    vmv1r.v v8, v9
747; CHECK-NEXT:    ret
748  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
749  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
750  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)
751  %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)
752  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)
753  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vbext, <vscale x 1 x double> %nega, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
754  ret <vscale x 1 x double> %v
755}
756
757define <vscale x 1 x double> @vfnmsac_vf_nxv1f64_unmasked(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
758; CHECK-LABEL: vfnmsac_vf_nxv1f64_unmasked:
759; CHECK:       # %bb.0:
760; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
761; CHECK-NEXT:    vfwnmsac.vf v9, fa0, v8
762; CHECK-NEXT:    vmv1r.v v8, v9
763; CHECK-NEXT:    ret
764  %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
765  %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
766  %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
767  %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
768  %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
769  %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %vbext, <vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
770  ret <vscale x 1 x double> %v
771}
772
773declare <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>, i32)
774declare <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, i32)
775declare <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
776
777define <vscale x 2 x double> @vfnmsac_vv_nxv2f64(<vscale x 2 x float> %a, <vscale x 2 x float> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
778; CHECK-LABEL: vfnmsac_vv_nxv2f64:
779; CHECK:       # %bb.0:
780; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
781; CHECK-NEXT:    vfwnmsac.vv v10, v8, v9, v0.t
782; CHECK-NEXT:    vmv2r.v v8, v10
783; CHECK-NEXT:    ret
784  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)
785  %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)
786  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)
787  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
788  ret <vscale x 2 x double> %v
789}
790
791define <vscale x 2 x double> @vfnmsac_vv_nxv2f64_unmasked(<vscale x 2 x float> %a, <vscale x 2 x float> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
792; CHECK-LABEL: vfnmsac_vv_nxv2f64_unmasked:
793; CHECK:       # %bb.0:
794; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
795; CHECK-NEXT:    vfwnmsac.vv v10, v8, v9
796; CHECK-NEXT:    vmv2r.v v8, v10
797; CHECK-NEXT:    ret
798  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
799  %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
800  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
801  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
802  ret <vscale x 2 x double> %v
803}
804
805define <vscale x 2 x double> @vfnmsac_vf_nxv2f64(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
806; CHECK-LABEL: vfnmsac_vf_nxv2f64:
807; CHECK:       # %bb.0:
808; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
809; CHECK-NEXT:    vfwnmsac.vf v10, fa0, v8, v0.t
810; CHECK-NEXT:    vmv2r.v v8, v10
811; CHECK-NEXT:    ret
812  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
813  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
814  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)
815  %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)
816  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)
817  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %vbext, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
818  ret <vscale x 2 x double> %v
819}
820
821define <vscale x 2 x double> @vfnmsac_vf_nxv2f64_commute(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
822; CHECK-LABEL: vfnmsac_vf_nxv2f64_commute:
823; CHECK:       # %bb.0:
824; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
825; CHECK-NEXT:    vfwnmsac.vf v10, fa0, v8, v0.t
826; CHECK-NEXT:    vmv2r.v v8, v10
827; CHECK-NEXT:    ret
828  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
829  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
830  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)
831  %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)
832  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)
833  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vbext, <vscale x 2 x double> %nega, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
834  ret <vscale x 2 x double> %v
835}
836
837define <vscale x 2 x double> @vfnmsac_vf_nxv2f64_unmasked(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
838; CHECK-LABEL: vfnmsac_vf_nxv2f64_unmasked:
839; CHECK:       # %bb.0:
840; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
841; CHECK-NEXT:    vfwnmsac.vf v10, fa0, v8
842; CHECK-NEXT:    vmv2r.v v8, v10
843; CHECK-NEXT:    ret
844  %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
845  %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
846  %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
847  %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
848  %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
849  %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %vbext, <vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
850  ret <vscale x 2 x double> %v
851}
852
853declare <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double>, <vscale x 4 x double>, <vscale x 4 x double>, <vscale x 4 x i1>, i32)
854declare <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double>, <vscale x 4 x i1>, i32)
855declare <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, i32)
856
857define <vscale x 4 x double> @vfnmsac_vv_nxv4f64(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
858; CHECK-LABEL: vfnmsac_vv_nxv4f64:
859; CHECK:       # %bb.0:
860; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
861; CHECK-NEXT:    vfwnmsac.vv v12, v8, v10, v0.t
862; CHECK-NEXT:    vmv4r.v v8, v12
863; CHECK-NEXT:    ret
864  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)
865  %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)
866  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)
867  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
868  ret <vscale x 4 x double> %v
869}
870
871define <vscale x 4 x double> @vfnmsac_vv_nxv4f64_unmasked(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
872; CHECK-LABEL: vfnmsac_vv_nxv4f64_unmasked:
873; CHECK:       # %bb.0:
874; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
875; CHECK-NEXT:    vfwnmsac.vv v12, v8, v10
876; CHECK-NEXT:    vmv4r.v v8, v12
877; CHECK-NEXT:    ret
878  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
879  %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
880  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
881  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
882  ret <vscale x 4 x double> %v
883}
884
885define <vscale x 4 x double> @vfnmsac_vf_nxv4f64(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
886; CHECK-LABEL: vfnmsac_vf_nxv4f64:
887; CHECK:       # %bb.0:
888; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
889; CHECK-NEXT:    vfwnmsac.vf v12, fa0, v8, v0.t
890; CHECK-NEXT:    vmv4r.v v8, v12
891; CHECK-NEXT:    ret
892  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
893  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
894  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)
895  %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)
896  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)
897  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %vbext, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
898  ret <vscale x 4 x double> %v
899}
900
901define <vscale x 4 x double> @vfnmsac_vf_nxv4f64_commute(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
902; CHECK-LABEL: vfnmsac_vf_nxv4f64_commute:
903; CHECK:       # %bb.0:
904; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
905; CHECK-NEXT:    vfwnmsac.vf v12, fa0, v8, v0.t
906; CHECK-NEXT:    vmv4r.v v8, v12
907; CHECK-NEXT:    ret
908  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
909  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
910  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)
911  %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)
912  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)
913  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vbext, <vscale x 4 x double> %nega, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
914  ret <vscale x 4 x double> %v
915}
916
917define <vscale x 4 x double> @vfnmsac_vf_nxv4f64_unmasked(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
918; CHECK-LABEL: vfnmsac_vf_nxv4f64_unmasked:
919; CHECK:       # %bb.0:
920; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
921; CHECK-NEXT:    vfwnmsac.vf v12, fa0, v8
922; CHECK-NEXT:    vmv4r.v v8, v12
923; CHECK-NEXT:    ret
924  %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
925  %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
926  %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
927  %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
928  %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
929  %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %vbext, <vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
930  ret <vscale x 4 x double> %v
931}
932
933declare <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x i1>, i32)
934declare <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double>, <vscale x 8 x i1>, i32)
935declare <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float>, <vscale x 8 x i1>, i32)
936
937define <vscale x 8 x double> @vfnmsac_vv_nxv8f64(<vscale x 8 x float> %a, <vscale x 8 x float> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
938; CHECK-LABEL: vfnmsac_vv_nxv8f64:
939; CHECK:       # %bb.0:
940; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
941; CHECK-NEXT:    vfwnmsac.vv v16, v8, v12, v0.t
942; CHECK-NEXT:    vmv8r.v v8, v16
943; CHECK-NEXT:    ret
944  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)
945  %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)
946  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)
947  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
948  ret <vscale x 8 x double> %v
949}
950
951define <vscale x 8 x double> @vfnmsac_vv_nxv8f64_unmasked(<vscale x 8 x float> %a, <vscale x 8 x float> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
952; CHECK-LABEL: vfnmsac_vv_nxv8f64_unmasked:
953; CHECK:       # %bb.0:
954; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
955; CHECK-NEXT:    vfwnmsac.vv v16, v8, v12
956; CHECK-NEXT:    vmv8r.v v8, v16
957; CHECK-NEXT:    ret
958  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
959  %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
960  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
961  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
962  ret <vscale x 8 x double> %v
963}
964
965define <vscale x 8 x double> @vfnmsac_vf_nxv8f64(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
966; CHECK-LABEL: vfnmsac_vf_nxv8f64:
967; CHECK:       # %bb.0:
968; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
969; CHECK-NEXT:    vfwnmsac.vf v16, fa0, v8, v0.t
970; CHECK-NEXT:    vmv8r.v v8, v16
971; CHECK-NEXT:    ret
972  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
973  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
974  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)
975  %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)
976  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)
977  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %vbext, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
978  ret <vscale x 8 x double> %v
979}
980
981define <vscale x 8 x double> @vfnmsac_vf_nxv8f64_commute(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
982; CHECK-LABEL: vfnmsac_vf_nxv8f64_commute:
983; CHECK:       # %bb.0:
984; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
985; CHECK-NEXT:    vfwnmsac.vf v16, fa0, v8, v0.t
986; CHECK-NEXT:    vmv8r.v v8, v16
987; CHECK-NEXT:    ret
988  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
989  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
990  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)
991  %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)
992  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)
993  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vbext, <vscale x 8 x double> %nega, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
994  ret <vscale x 8 x double> %v
995}
996
997define <vscale x 8 x double> @vfnmsac_vf_nxv8f64_unmasked(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
998; CHECK-LABEL: vfnmsac_vf_nxv8f64_unmasked:
999; CHECK:       # %bb.0:
1000; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
1001; CHECK-NEXT:    vfwnmsac.vf v16, fa0, v8
1002; CHECK-NEXT:    vmv8r.v v8, v16
1003; CHECK-NEXT:    ret
1004  %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
1005  %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
1006  %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1007  %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1008  %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1009  %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %vbext, <vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1010  ret <vscale x 8 x double> %v
1011}
1012