1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v -target-abi=ilp32d \ 3; RUN: -verify-machineinstrs < %s | FileCheck %s 4; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v -target-abi=lp64d \ 5; RUN: -verify-machineinstrs < %s | FileCheck %s 6 7define <vscale x 1 x double> @vfwmul_vv_nxv1f64(<vscale x 1 x float> %va, <vscale x 1 x float> %vb) { 8; CHECK-LABEL: vfwmul_vv_nxv1f64: 9; CHECK: # %bb.0: 10; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 11; CHECK-NEXT: vfwmul.vv v10, v8, v9 12; CHECK-NEXT: vmv1r.v v8, v10 13; CHECK-NEXT: ret 14 %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double> 15 %vd = fpext <vscale x 1 x float> %vb to <vscale x 1 x double> 16 %ve = fmul <vscale x 1 x double> %vc, %vd 17 ret <vscale x 1 x double> %ve 18} 19 20define <vscale x 1 x double> @vfwmul_vf_nxv1f64(<vscale x 1 x float> %va, float %b) { 21; CHECK-LABEL: vfwmul_vf_nxv1f64: 22; CHECK: # %bb.0: 23; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 24; CHECK-NEXT: vfwmul.vf v9, v8, fa0 25; CHECK-NEXT: vmv1r.v v8, v9 26; CHECK-NEXT: ret 27 %head = insertelement <vscale x 1 x float> poison, float %b, i32 0 28 %splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer 29 %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double> 30 %vd = fpext <vscale x 1 x float> %splat to <vscale x 1 x double> 31 %ve = fmul <vscale x 1 x double> %vc, %vd 32 ret <vscale x 1 x double> %ve 33} 34 35define <vscale x 1 x double> @vfwmul_vf_nxv1f64_2(<vscale x 1 x float> %va, float %b) { 36; CHECK-LABEL: vfwmul_vf_nxv1f64_2: 37; CHECK: # %bb.0: 38; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 39; CHECK-NEXT: vfwmul.vf v9, v8, fa0 40; CHECK-NEXT: vmv1r.v v8, v9 41; CHECK-NEXT: ret 42 %fpext = fpext float %b to double 43 %head = insertelement <vscale x 1 x double> poison, double %fpext, i32 0 44 %splat = shufflevector <vscale x 1 x double> %head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer 45 %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double> 46 %ve = fmul <vscale x 1 x double> %vc, %splat 47 ret <vscale x 1 x double> %ve 48} 49 50define <vscale x 2 x double> @vfwmul_vv_nxv2f64(<vscale x 2 x float> %va, <vscale x 2 x float> %vb) { 51; CHECK-LABEL: vfwmul_vv_nxv2f64: 52; CHECK: # %bb.0: 53; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 54; CHECK-NEXT: vfwmul.vv v10, v8, v9 55; CHECK-NEXT: vmv2r.v v8, v10 56; CHECK-NEXT: ret 57 %vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double> 58 %vd = fpext <vscale x 2 x float> %vb to <vscale x 2 x double> 59 %ve = fmul <vscale x 2 x double> %vc, %vd 60 ret <vscale x 2 x double> %ve 61} 62 63define <vscale x 2 x double> @vfwmul_vf_nxv2f64(<vscale x 2 x float> %va, float %b) { 64; CHECK-LABEL: vfwmul_vf_nxv2f64: 65; CHECK: # %bb.0: 66; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 67; CHECK-NEXT: vfwmul.vf v10, v8, fa0 68; CHECK-NEXT: vmv2r.v v8, v10 69; CHECK-NEXT: ret 70 %head = insertelement <vscale x 2 x float> poison, float %b, i32 0 71 %splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer 72 %vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double> 73 %vd = fpext <vscale x 2 x float> %splat to <vscale x 2 x double> 74 %ve = fmul <vscale x 2 x double> %vc, %vd 75 ret <vscale x 2 x double> %ve 76} 77 78define <vscale x 2 x double> @vfwmul_vf_nxv2f64_2(<vscale x 2 x float> %va, float %b) { 79; CHECK-LABEL: vfwmul_vf_nxv2f64_2: 80; CHECK: # %bb.0: 81; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 82; CHECK-NEXT: vfwmul.vf v10, v8, fa0 83; CHECK-NEXT: vmv2r.v v8, v10 84; CHECK-NEXT: ret 85 %fpext = fpext float %b to double 86 %head = insertelement <vscale x 2 x double> poison, double %fpext, i32 0 87 %splat = shufflevector <vscale x 2 x double> %head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer 88 %vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double> 89 %ve = fmul <vscale x 2 x double> %vc, %splat 90 ret <vscale x 2 x double> %ve 91} 92 93define <vscale x 4 x double> @vfwmul_vv_nxv4f64(<vscale x 4 x float> %va, <vscale x 4 x float> %vb) { 94; CHECK-LABEL: vfwmul_vv_nxv4f64: 95; CHECK: # %bb.0: 96; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 97; CHECK-NEXT: vfwmul.vv v12, v8, v10 98; CHECK-NEXT: vmv4r.v v8, v12 99; CHECK-NEXT: ret 100 %vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double> 101 %vd = fpext <vscale x 4 x float> %vb to <vscale x 4 x double> 102 %ve = fmul <vscale x 4 x double> %vc, %vd 103 ret <vscale x 4 x double> %ve 104} 105 106define <vscale x 4 x double> @vfwmul_vf_nxv4f64(<vscale x 4 x float> %va, float %b) { 107; CHECK-LABEL: vfwmul_vf_nxv4f64: 108; CHECK: # %bb.0: 109; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 110; CHECK-NEXT: vfwmul.vf v12, v8, fa0 111; CHECK-NEXT: vmv4r.v v8, v12 112; CHECK-NEXT: ret 113 %head = insertelement <vscale x 4 x float> poison, float %b, i32 0 114 %splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer 115 %vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double> 116 %vd = fpext <vscale x 4 x float> %splat to <vscale x 4 x double> 117 %ve = fmul <vscale x 4 x double> %vc, %vd 118 ret <vscale x 4 x double> %ve 119} 120 121define <vscale x 4 x double> @vfwmul_vf_nxv4f64_2(<vscale x 4 x float> %va, float %b) { 122; CHECK-LABEL: vfwmul_vf_nxv4f64_2: 123; CHECK: # %bb.0: 124; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 125; CHECK-NEXT: vfwmul.vf v12, v8, fa0 126; CHECK-NEXT: vmv4r.v v8, v12 127; CHECK-NEXT: ret 128 %fpext = fpext float %b to double 129 %head = insertelement <vscale x 4 x double> poison, double %fpext, i32 0 130 %splat = shufflevector <vscale x 4 x double> %head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer 131 %vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double> 132 %ve = fmul <vscale x 4 x double> %vc, %splat 133 ret <vscale x 4 x double> %ve 134} 135 136define <vscale x 8 x double> @vfwmul_vv_nxv8f64(<vscale x 8 x float> %va, <vscale x 8 x float> %vb) { 137; CHECK-LABEL: vfwmul_vv_nxv8f64: 138; CHECK: # %bb.0: 139; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 140; CHECK-NEXT: vfwmul.vv v16, v8, v12 141; CHECK-NEXT: vmv8r.v v8, v16 142; CHECK-NEXT: ret 143 %vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double> 144 %vd = fpext <vscale x 8 x float> %vb to <vscale x 8 x double> 145 %ve = fmul <vscale x 8 x double> %vc, %vd 146 ret <vscale x 8 x double> %ve 147} 148 149define <vscale x 8 x double> @vfwmul_vf_nxv8f64(<vscale x 8 x float> %va, float %b) { 150; CHECK-LABEL: vfwmul_vf_nxv8f64: 151; CHECK: # %bb.0: 152; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 153; CHECK-NEXT: vfwmul.vf v16, v8, fa0 154; CHECK-NEXT: vmv8r.v v8, v16 155; CHECK-NEXT: ret 156 %head = insertelement <vscale x 8 x float> poison, float %b, i32 0 157 %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer 158 %vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double> 159 %vd = fpext <vscale x 8 x float> %splat to <vscale x 8 x double> 160 %ve = fmul <vscale x 8 x double> %vc, %vd 161 ret <vscale x 8 x double> %ve 162} 163 164define <vscale x 8 x double> @vfwmul_vf_nxv8f64_2(<vscale x 8 x float> %va, float %b) { 165; CHECK-LABEL: vfwmul_vf_nxv8f64_2: 166; CHECK: # %bb.0: 167; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 168; CHECK-NEXT: vfwmul.vf v16, v8, fa0 169; CHECK-NEXT: vmv8r.v v8, v16 170; CHECK-NEXT: ret 171 %fpext = fpext float %b to double 172 %head = insertelement <vscale x 8 x double> poison, double %fpext, i32 0 173 %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer 174 %vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double> 175 %ve = fmul <vscale x 8 x double> %vc, %splat 176 ret <vscale x 8 x double> %ve 177} 178