xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vfwmsac-vp.ll (revision b48e5f0ff3f25e8bdd3ae473dca00511336cbd6f) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=ZVFH
4; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d \
5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=ZVFH
6; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=ilp32d \
7; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=ZVFHMIN
8; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=lp64d \
9; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=ZVFHMIN
10
11declare <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x i1>, i32)
12declare <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float>, <vscale x 1 x i1>, i32)
13declare <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half>, <vscale x 1 x i1>, i32)
14declare <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1>, <vscale x 1 x float>, <vscale x 1 x float>, i32)
15
16define <vscale x 1 x float> @vmfsac_vv_nxv1f32(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
17; ZVFH-LABEL: vmfsac_vv_nxv1f32:
18; ZVFH:       # %bb.0:
19; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
20; ZVFH-NEXT:    vfwmsac.vv v10, v8, v9, v0.t
21; ZVFH-NEXT:    vmv1r.v v8, v10
22; ZVFH-NEXT:    ret
23;
24; ZVFHMIN-LABEL: vmfsac_vv_nxv1f32:
25; ZVFHMIN:       # %bb.0:
26; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
27; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
28; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
29; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
30; ZVFHMIN-NEXT:    vfmsub.vv v8, v11, v10, v0.t
31; ZVFHMIN-NEXT:    ret
32  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
33  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)
34  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
35  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %bext, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)
36  ret <vscale x 1 x float> %v
37}
38
39define <vscale x 1 x float> @vmfsac_vv_nxv1f32_unmasked(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
40; ZVFH-LABEL: vmfsac_vv_nxv1f32_unmasked:
41; ZVFH:       # %bb.0:
42; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
43; ZVFH-NEXT:    vfwmsac.vv v10, v8, v9
44; ZVFH-NEXT:    vmv1r.v v8, v10
45; ZVFH-NEXT:    ret
46;
47; ZVFHMIN-LABEL: vmfsac_vv_nxv1f32_unmasked:
48; ZVFHMIN:       # %bb.0:
49; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
50; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
51; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
52; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
53; ZVFHMIN-NEXT:    vfmsub.vv v8, v11, v10
54; ZVFHMIN-NEXT:    ret
55  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
56  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
57  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
58  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %bext, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
59  ret <vscale x 1 x float> %v
60}
61
62define <vscale x 1 x float> @vmfsac_vv_nxv1f32_tu(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
63; ZVFH-LABEL: vmfsac_vv_nxv1f32_tu:
64; ZVFH:       # %bb.0:
65; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, tu, mu
66; ZVFH-NEXT:    vfwmsac.vv v10, v8, v9, v0.t
67; ZVFH-NEXT:    vmv1r.v v8, v10
68; ZVFH-NEXT:    ret
69;
70; ZVFHMIN-LABEL: vmfsac_vv_nxv1f32_tu:
71; ZVFHMIN:       # %bb.0:
72; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
73; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
74; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
75; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, tu, mu
76; ZVFHMIN-NEXT:    vfmsac.vv v10, v11, v8, v0.t
77; ZVFHMIN-NEXT:    vmv1r.v v8, v10
78; ZVFHMIN-NEXT:    ret
79  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
80  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
81  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
82  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %bext, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
83  %u = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> %m, <vscale x 1 x float> %v, <vscale x 1 x float> %c, i32 %evl)
84  ret <vscale x 1 x float> %u
85}
86
87define <vscale x 1 x float> @vmfsac_vv_nxv1f32_unmasked_tu(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
88; ZVFH-LABEL: vmfsac_vv_nxv1f32_unmasked_tu:
89; ZVFH:       # %bb.0:
90; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, tu, ma
91; ZVFH-NEXT:    vfwmsac.vv v10, v8, v9
92; ZVFH-NEXT:    vmv1r.v v8, v10
93; ZVFH-NEXT:    ret
94;
95; ZVFHMIN-LABEL: vmfsac_vv_nxv1f32_unmasked_tu:
96; ZVFHMIN:       # %bb.0:
97; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
98; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
99; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
100; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, tu, ma
101; ZVFHMIN-NEXT:    vfmsac.vv v10, v11, v8
102; ZVFHMIN-NEXT:    vmv1r.v v8, v10
103; ZVFHMIN-NEXT:    ret
104  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
105  %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
106  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
107  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %bext, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
108  %u = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x float> %v, <vscale x 1 x float> %c, i32 %evl)
109  ret <vscale x 1 x float> %u
110}
111
112define <vscale x 1 x float> @vmfsac_vf_nxv1f32(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
113; ZVFH-LABEL: vmfsac_vf_nxv1f32:
114; ZVFH:       # %bb.0:
115; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
116; ZVFH-NEXT:    vfwmsac.vf v9, fa0, v8, v0.t
117; ZVFH-NEXT:    vmv1r.v v8, v9
118; ZVFH-NEXT:    ret
119;
120; ZVFHMIN-LABEL: vmfsac_vf_nxv1f32:
121; ZVFHMIN:       # %bb.0:
122; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
123; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
124; ZVFHMIN-NEXT:    vmv.v.x v10, a1
125; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
126; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t
127; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
128; ZVFHMIN-NEXT:    vfmsub.vv v8, v11, v9, v0.t
129; ZVFHMIN-NEXT:    ret
130  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
131  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
132  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
133  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
134  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
135  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %vbext, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)
136  ret <vscale x 1 x float> %v
137}
138
139define <vscale x 1 x float> @vmfsac_vf_nxv1f32_commute(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
140; ZVFH-LABEL: vmfsac_vf_nxv1f32_commute:
141; ZVFH:       # %bb.0:
142; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
143; ZVFH-NEXT:    vfwmsac.vf v9, fa0, v8, v0.t
144; ZVFH-NEXT:    vmv1r.v v8, v9
145; ZVFH-NEXT:    ret
146;
147; ZVFHMIN-LABEL: vmfsac_vf_nxv1f32_commute:
148; ZVFHMIN:       # %bb.0:
149; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
150; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
151; ZVFHMIN-NEXT:    vmv.v.x v11, a1
152; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
153; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v11, v0.t
154; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
155; ZVFHMIN-NEXT:    vfmsub.vv v10, v8, v9, v0.t
156; ZVFHMIN-NEXT:    vmv1r.v v8, v10
157; ZVFHMIN-NEXT:    ret
158  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
159  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
160  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
161  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
162  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
163  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vbext, <vscale x 1 x float> %aext, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)
164  ret <vscale x 1 x float> %v
165}
166
167define <vscale x 1 x float> @vmfsac_vf_nxv1f32_unmasked(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
168; ZVFH-LABEL: vmfsac_vf_nxv1f32_unmasked:
169; ZVFH:       # %bb.0:
170; ZVFH-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
171; ZVFH-NEXT:    vfwmsac.vf v9, fa0, v8
172; ZVFH-NEXT:    vmv1r.v v8, v9
173; ZVFH-NEXT:    ret
174;
175; ZVFHMIN-LABEL: vmfsac_vf_nxv1f32_unmasked:
176; ZVFHMIN:       # %bb.0:
177; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
178; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
179; ZVFHMIN-NEXT:    vmv.v.x v10, a1
180; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
181; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10
182; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
183; ZVFHMIN-NEXT:    vfmsub.vv v8, v11, v9
184; ZVFHMIN-NEXT:    ret
185  %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
186  %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
187  %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
188  %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
189  %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
190  %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x float> %vbext, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
191  ret <vscale x 1 x float> %v
192}
193
194declare <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x i1>, i32)
195declare <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
196declare <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half>, <vscale x 2 x i1>, i32)
197
198define <vscale x 2 x float> @vmfsac_vv_nxv2f32(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
199; ZVFH-LABEL: vmfsac_vv_nxv2f32:
200; ZVFH:       # %bb.0:
201; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
202; ZVFH-NEXT:    vfwmsac.vv v10, v8, v9, v0.t
203; ZVFH-NEXT:    vmv1r.v v8, v10
204; ZVFH-NEXT:    ret
205;
206; ZVFHMIN-LABEL: vmfsac_vv_nxv2f32:
207; ZVFHMIN:       # %bb.0:
208; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
209; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
210; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9, v0.t
211; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
212; ZVFHMIN-NEXT:    vfmsub.vv v8, v11, v10, v0.t
213; ZVFHMIN-NEXT:    ret
214  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
215  %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)
216  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
217  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x float> %bext, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)
218  ret <vscale x 2 x float> %v
219}
220
221define <vscale x 2 x float> @vmfsac_vv_nxv2f32_unmasked(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
222; ZVFH-LABEL: vmfsac_vv_nxv2f32_unmasked:
223; ZVFH:       # %bb.0:
224; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
225; ZVFH-NEXT:    vfwmsac.vv v10, v8, v9
226; ZVFH-NEXT:    vmv1r.v v8, v10
227; ZVFH-NEXT:    ret
228;
229; ZVFHMIN-LABEL: vmfsac_vv_nxv2f32_unmasked:
230; ZVFHMIN:       # %bb.0:
231; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
232; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
233; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
234; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
235; ZVFHMIN-NEXT:    vfmsub.vv v8, v11, v10
236; ZVFHMIN-NEXT:    ret
237  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
238  %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
239  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
240  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x float> %bext, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
241  ret <vscale x 2 x float> %v
242}
243
244define <vscale x 2 x float> @vmfsac_vf_nxv2f32(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
245; ZVFH-LABEL: vmfsac_vf_nxv2f32:
246; ZVFH:       # %bb.0:
247; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
248; ZVFH-NEXT:    vfwmsac.vf v9, fa0, v8, v0.t
249; ZVFH-NEXT:    vmv1r.v v8, v9
250; ZVFH-NEXT:    ret
251;
252; ZVFHMIN-LABEL: vmfsac_vf_nxv2f32:
253; ZVFHMIN:       # %bb.0:
254; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
255; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
256; ZVFHMIN-NEXT:    vmv.v.x v10, a1
257; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8, v0.t
258; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10, v0.t
259; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
260; ZVFHMIN-NEXT:    vfmsub.vv v8, v11, v9, v0.t
261; ZVFHMIN-NEXT:    ret
262  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
263  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
264  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
265  %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
266  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
267  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x float> %vbext, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)
268  ret <vscale x 2 x float> %v
269}
270
271define <vscale x 2 x float> @vmfsac_vf_nxv2f32_commute(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
272; ZVFH-LABEL: vmfsac_vf_nxv2f32_commute:
273; ZVFH:       # %bb.0:
274; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
275; ZVFH-NEXT:    vfwmsac.vf v9, fa0, v8, v0.t
276; ZVFH-NEXT:    vmv1r.v v8, v9
277; ZVFH-NEXT:    ret
278;
279; ZVFHMIN-LABEL: vmfsac_vf_nxv2f32_commute:
280; ZVFHMIN:       # %bb.0:
281; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
282; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
283; ZVFHMIN-NEXT:    vmv.v.x v11, a1
284; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
285; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v11, v0.t
286; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
287; ZVFHMIN-NEXT:    vfmsub.vv v10, v8, v9, v0.t
288; ZVFHMIN-NEXT:    vmv.v.v v8, v10
289; ZVFHMIN-NEXT:    ret
290  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
291  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
292  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
293  %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
294  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
295  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vbext, <vscale x 2 x float> %aext, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)
296  ret <vscale x 2 x float> %v
297}
298
299define <vscale x 2 x float> @vmfsac_vf_nxv2f32_unmasked(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
300; ZVFH-LABEL: vmfsac_vf_nxv2f32_unmasked:
301; ZVFH:       # %bb.0:
302; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
303; ZVFH-NEXT:    vfwmsac.vf v9, fa0, v8
304; ZVFH-NEXT:    vmv1r.v v8, v9
305; ZVFH-NEXT:    ret
306;
307; ZVFHMIN-LABEL: vmfsac_vf_nxv2f32_unmasked:
308; ZVFHMIN:       # %bb.0:
309; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
310; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
311; ZVFHMIN-NEXT:    vmv.v.x v10, a1
312; ZVFHMIN-NEXT:    vfwcvt.f.f.v v11, v8
313; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v10
314; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
315; ZVFHMIN-NEXT:    vfmsub.vv v8, v11, v9
316; ZVFHMIN-NEXT:    ret
317  %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
318  %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
319  %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
320  %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
321  %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
322  %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x float> %vbext, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
323  ret <vscale x 2 x float> %v
324}
325
326declare <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>, i32)
327declare <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, i32)
328declare <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half>, <vscale x 4 x i1>, i32)
329
330define <vscale x 4 x float> @vmfsac_vv_nxv4f32(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
331; ZVFH-LABEL: vmfsac_vv_nxv4f32:
332; ZVFH:       # %bb.0:
333; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
334; ZVFH-NEXT:    vfwmsac.vv v10, v8, v9, v0.t
335; ZVFH-NEXT:    vmv2r.v v8, v10
336; ZVFH-NEXT:    ret
337;
338; ZVFHMIN-LABEL: vmfsac_vv_nxv4f32:
339; ZVFHMIN:       # %bb.0:
340; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
341; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
342; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9, v0.t
343; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
344; ZVFHMIN-NEXT:    vfmsub.vv v12, v14, v10, v0.t
345; ZVFHMIN-NEXT:    vmv.v.v v8, v12
346; ZVFHMIN-NEXT:    ret
347  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
348  %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)
349  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
350  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x float> %bext, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)
351  ret <vscale x 4 x float> %v
352}
353
354define <vscale x 4 x float> @vmfsac_vv_nxv4f32_unmasked(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
355; ZVFH-LABEL: vmfsac_vv_nxv4f32_unmasked:
356; ZVFH:       # %bb.0:
357; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
358; ZVFH-NEXT:    vfwmsac.vv v10, v8, v9
359; ZVFH-NEXT:    vmv2r.v v8, v10
360; ZVFH-NEXT:    ret
361;
362; ZVFHMIN-LABEL: vmfsac_vv_nxv4f32_unmasked:
363; ZVFHMIN:       # %bb.0:
364; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
365; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
366; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
367; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
368; ZVFHMIN-NEXT:    vfmsub.vv v12, v14, v10
369; ZVFHMIN-NEXT:    vmv.v.v v8, v12
370; ZVFHMIN-NEXT:    ret
371  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
372  %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
373  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
374  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x float> %bext, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
375  ret <vscale x 4 x float> %v
376}
377
378define <vscale x 4 x float> @vmfsac_vf_nxv4f32(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
379; ZVFH-LABEL: vmfsac_vf_nxv4f32:
380; ZVFH:       # %bb.0:
381; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
382; ZVFH-NEXT:    vfwmsac.vf v10, fa0, v8, v0.t
383; ZVFH-NEXT:    vmv2r.v v8, v10
384; ZVFH-NEXT:    ret
385;
386; ZVFHMIN-LABEL: vmfsac_vf_nxv4f32:
387; ZVFHMIN:       # %bb.0:
388; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
389; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
390; ZVFHMIN-NEXT:    vmv.v.x v12, a1
391; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8, v0.t
392; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12, v0.t
393; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
394; ZVFHMIN-NEXT:    vfmsub.vv v8, v14, v10, v0.t
395; ZVFHMIN-NEXT:    ret
396  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
397  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
398  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
399  %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
400  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
401  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x float> %vbext, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)
402  ret <vscale x 4 x float> %v
403}
404
405define <vscale x 4 x float> @vmfsac_vf_nxv4f32_commute(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
406; ZVFH-LABEL: vmfsac_vf_nxv4f32_commute:
407; ZVFH:       # %bb.0:
408; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
409; ZVFH-NEXT:    vfwmsac.vf v10, fa0, v8, v0.t
410; ZVFH-NEXT:    vmv2r.v v8, v10
411; ZVFH-NEXT:    ret
412;
413; ZVFHMIN-LABEL: vmfsac_vf_nxv4f32_commute:
414; ZVFHMIN:       # %bb.0:
415; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
416; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
417; ZVFHMIN-NEXT:    vmv.v.x v9, a1
418; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8, v0.t
419; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v9, v0.t
420; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
421; ZVFHMIN-NEXT:    vfmsub.vv v12, v14, v10, v0.t
422; ZVFHMIN-NEXT:    vmv.v.v v8, v12
423; ZVFHMIN-NEXT:    ret
424  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
425  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
426  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
427  %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
428  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
429  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vbext, <vscale x 4 x float> %aext, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)
430  ret <vscale x 4 x float> %v
431}
432
433define <vscale x 4 x float> @vmfsac_vf_nxv4f32_unmasked(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
434; ZVFH-LABEL: vmfsac_vf_nxv4f32_unmasked:
435; ZVFH:       # %bb.0:
436; ZVFH-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
437; ZVFH-NEXT:    vfwmsac.vf v10, fa0, v8
438; ZVFH-NEXT:    vmv2r.v v8, v10
439; ZVFH-NEXT:    ret
440;
441; ZVFHMIN-LABEL: vmfsac_vf_nxv4f32_unmasked:
442; ZVFHMIN:       # %bb.0:
443; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
444; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
445; ZVFHMIN-NEXT:    vmv.v.x v12, a1
446; ZVFHMIN-NEXT:    vfwcvt.f.f.v v14, v8
447; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v12
448; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
449; ZVFHMIN-NEXT:    vfmsub.vv v8, v14, v10
450; ZVFHMIN-NEXT:    ret
451  %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
452  %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
453  %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
454  %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
455  %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
456  %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x float> %vbext, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
457  ret <vscale x 4 x float> %v
458}
459
460declare <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x i1>, i32)
461declare <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float>, <vscale x 8 x i1>, i32)
462declare <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, i32)
463
464define <vscale x 8 x float> @vmfsac_vv_nxv8f32(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
465; ZVFH-LABEL: vmfsac_vv_nxv8f32:
466; ZVFH:       # %bb.0:
467; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
468; ZVFH-NEXT:    vfwmsac.vv v12, v8, v10, v0.t
469; ZVFH-NEXT:    vmv4r.v v8, v12
470; ZVFH-NEXT:    ret
471;
472; ZVFHMIN-LABEL: vmfsac_vv_nxv8f32:
473; ZVFHMIN:       # %bb.0:
474; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
475; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
476; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10, v0.t
477; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
478; ZVFHMIN-NEXT:    vfmsub.vv v16, v20, v12, v0.t
479; ZVFHMIN-NEXT:    vmv.v.v v8, v16
480; ZVFHMIN-NEXT:    ret
481  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
482  %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)
483  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
484  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x float> %bext, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)
485  ret <vscale x 8 x float> %v
486}
487
488define <vscale x 8 x float> @vmfsac_vv_nxv8f32_unmasked(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
489; ZVFH-LABEL: vmfsac_vv_nxv8f32_unmasked:
490; ZVFH:       # %bb.0:
491; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
492; ZVFH-NEXT:    vfwmsac.vv v12, v8, v10
493; ZVFH-NEXT:    vmv4r.v v8, v12
494; ZVFH-NEXT:    ret
495;
496; ZVFHMIN-LABEL: vmfsac_vv_nxv8f32_unmasked:
497; ZVFHMIN:       # %bb.0:
498; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
499; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
500; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
501; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
502; ZVFHMIN-NEXT:    vfmsub.vv v16, v20, v12
503; ZVFHMIN-NEXT:    vmv.v.v v8, v16
504; ZVFHMIN-NEXT:    ret
505  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
506  %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
507  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
508  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x float> %bext, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
509  ret <vscale x 8 x float> %v
510}
511
512define <vscale x 8 x float> @vmfsac_vf_nxv8f32(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
513; ZVFH-LABEL: vmfsac_vf_nxv8f32:
514; ZVFH:       # %bb.0:
515; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
516; ZVFH-NEXT:    vfwmsac.vf v12, fa0, v8, v0.t
517; ZVFH-NEXT:    vmv4r.v v8, v12
518; ZVFH-NEXT:    ret
519;
520; ZVFHMIN-LABEL: vmfsac_vf_nxv8f32:
521; ZVFHMIN:       # %bb.0:
522; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
523; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
524; ZVFHMIN-NEXT:    vmv.v.x v16, a1
525; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8, v0.t
526; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16, v0.t
527; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
528; ZVFHMIN-NEXT:    vfmsub.vv v8, v20, v12, v0.t
529; ZVFHMIN-NEXT:    ret
530  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
531  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
532  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
533  %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
534  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
535  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x float> %vbext, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)
536  ret <vscale x 8 x float> %v
537}
538
539define <vscale x 8 x float> @vmfsac_vf_nxv8f32_commute(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
540; ZVFH-LABEL: vmfsac_vf_nxv8f32_commute:
541; ZVFH:       # %bb.0:
542; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
543; ZVFH-NEXT:    vfwmsac.vf v12, fa0, v8, v0.t
544; ZVFH-NEXT:    vmv4r.v v8, v12
545; ZVFH-NEXT:    ret
546;
547; ZVFHMIN-LABEL: vmfsac_vf_nxv8f32_commute:
548; ZVFHMIN:       # %bb.0:
549; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
550; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
551; ZVFHMIN-NEXT:    vmv.v.x v10, a1
552; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8, v0.t
553; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v10, v0.t
554; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
555; ZVFHMIN-NEXT:    vfmsub.vv v16, v20, v12, v0.t
556; ZVFHMIN-NEXT:    vmv.v.v v8, v16
557; ZVFHMIN-NEXT:    ret
558  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
559  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
560  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
561  %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
562  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
563  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vbext, <vscale x 8 x float> %aext, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)
564  ret <vscale x 8 x float> %v
565}
566
567define <vscale x 8 x float> @vmfsac_vf_nxv8f32_unmasked(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
568; ZVFH-LABEL: vmfsac_vf_nxv8f32_unmasked:
569; ZVFH:       # %bb.0:
570; ZVFH-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
571; ZVFH-NEXT:    vfwmsac.vf v12, fa0, v8
572; ZVFH-NEXT:    vmv4r.v v8, v12
573; ZVFH-NEXT:    ret
574;
575; ZVFHMIN-LABEL: vmfsac_vf_nxv8f32_unmasked:
576; ZVFHMIN:       # %bb.0:
577; ZVFHMIN-NEXT:    fmv.x.h a1, fa0
578; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
579; ZVFHMIN-NEXT:    vmv.v.x v16, a1
580; ZVFHMIN-NEXT:    vfwcvt.f.f.v v20, v8
581; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v16
582; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
583; ZVFHMIN-NEXT:    vfmsub.vv v8, v20, v12
584; ZVFHMIN-NEXT:    ret
585  %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
586  %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
587  %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
588  %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
589  %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
590  %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x float> %vbext, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
591  ret <vscale x 8 x float> %v
592}
593