xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll (revision 9122c5235ec85ce0c0ad337e862b006e7b349d84) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \
3; RUN:     -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \
4; RUN:     --check-prefixes=CHECK,ZVFH
5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \
6; RUN:     -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \
7; RUN:     --check-prefixes=CHECK,ZVFH
8; RUN: llc -mtriple=riscv32 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \
9; RUN:     -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \
10; RUN:     --check-prefixes=CHECK,ZVFHMIN
11; RUN: llc -mtriple=riscv64 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \
12; RUN:     -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \
13; RUN:     --check-prefixes=CHECK,ZVFHMIN
14
15define <vscale x 1 x bfloat> @vfsub_vv_nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vb) {
16; CHECK-LABEL: vfsub_vv_nxv1bf16:
17; CHECK:       # %bb.0:
18; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
19; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9
20; CHECK-NEXT:    vfwcvtbf16.f.f.v v9, v8
21; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
22; CHECK-NEXT:    vfsub.vv v9, v9, v10
23; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
24; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9
25; CHECK-NEXT:    ret
26  %vc = fsub <vscale x 1 x bfloat> %va, %vb
27  ret <vscale x 1 x bfloat> %vc
28}
29
30define <vscale x 1 x bfloat> @vfsub_vf_nxv1bf16(<vscale x 1 x bfloat> %va, bfloat %b) {
31; CHECK-LABEL: vfsub_vf_nxv1bf16:
32; CHECK:       # %bb.0:
33; CHECK-NEXT:    fmv.x.h a0, fa0
34; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, ma
35; CHECK-NEXT:    vmv.v.x v9, a0
36; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8
37; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v9
38; CHECK-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
39; CHECK-NEXT:    vfsub.vv v9, v10, v8
40; CHECK-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
41; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9
42; CHECK-NEXT:    ret
43  %head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0
44  %splat = shufflevector <vscale x 1 x bfloat> %head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer
45  %vc = fsub <vscale x 1 x bfloat> %va, %splat
46  ret <vscale x 1 x bfloat> %vc
47}
48
49define <vscale x 2 x bfloat> @vfsub_vv_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vb) {
50; CHECK-LABEL: vfsub_vv_nxv2bf16:
51; CHECK:       # %bb.0:
52; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
53; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9
54; CHECK-NEXT:    vfwcvtbf16.f.f.v v9, v8
55; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
56; CHECK-NEXT:    vfsub.vv v9, v9, v10
57; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
58; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9
59; CHECK-NEXT:    ret
60  %vc = fsub <vscale x 2 x bfloat> %va, %vb
61  ret <vscale x 2 x bfloat> %vc
62}
63
64define <vscale x 2 x bfloat> @vfsub_vf_nxv2bf16(<vscale x 2 x bfloat> %va, bfloat %b) {
65; CHECK-LABEL: vfsub_vf_nxv2bf16:
66; CHECK:       # %bb.0:
67; CHECK-NEXT:    fmv.x.h a0, fa0
68; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, ma
69; CHECK-NEXT:    vmv.v.x v9, a0
70; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8
71; CHECK-NEXT:    vfwcvtbf16.f.f.v v8, v9
72; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
73; CHECK-NEXT:    vfsub.vv v9, v10, v8
74; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
75; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v9
76; CHECK-NEXT:    ret
77  %head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0
78  %splat = shufflevector <vscale x 2 x bfloat> %head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer
79  %vc = fsub <vscale x 2 x bfloat> %va, %splat
80  ret <vscale x 2 x bfloat> %vc
81}
82
83define <vscale x 4 x bfloat> @vfsub_vv_nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vb) {
84; CHECK-LABEL: vfsub_vv_nxv4bf16:
85; CHECK:       # %bb.0:
86; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
87; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v9
88; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v8
89; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
90; CHECK-NEXT:    vfsub.vv v10, v12, v10
91; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
92; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v10
93; CHECK-NEXT:    ret
94  %vc = fsub <vscale x 4 x bfloat> %va, %vb
95  ret <vscale x 4 x bfloat> %vc
96}
97
98define <vscale x 4 x bfloat> @vfsub_vf_nxv4bf16(<vscale x 4 x bfloat> %va, bfloat %b) {
99; CHECK-LABEL: vfsub_vf_nxv4bf16:
100; CHECK:       # %bb.0:
101; CHECK-NEXT:    fmv.x.h a0, fa0
102; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, ma
103; CHECK-NEXT:    vmv.v.x v9, a0
104; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8
105; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v9
106; CHECK-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
107; CHECK-NEXT:    vfsub.vv v10, v10, v12
108; CHECK-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
109; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v10
110; CHECK-NEXT:    ret
111  %head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0
112  %splat = shufflevector <vscale x 4 x bfloat> %head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer
113  %vc = fsub <vscale x 4 x bfloat> %va, %splat
114  ret <vscale x 4 x bfloat> %vc
115}
116
117define <vscale x 8 x bfloat> @vfsub_vv_nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vb) {
118; CHECK-LABEL: vfsub_vv_nxv8bf16:
119; CHECK:       # %bb.0:
120; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
121; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v10
122; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8
123; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
124; CHECK-NEXT:    vfsub.vv v12, v16, v12
125; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
126; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
127; CHECK-NEXT:    ret
128  %vc = fsub <vscale x 8 x bfloat> %va, %vb
129  ret <vscale x 8 x bfloat> %vc
130}
131
132define <vscale x 8 x bfloat> @vfsub_vf_nxv8bf16(<vscale x 8 x bfloat> %va, bfloat %b) {
133; CHECK-LABEL: vfsub_vf_nxv8bf16:
134; CHECK:       # %bb.0:
135; CHECK-NEXT:    fmv.x.h a0, fa0
136; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, ma
137; CHECK-NEXT:    vmv.v.x v10, a0
138; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v8
139; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v10
140; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
141; CHECK-NEXT:    vfsub.vv v12, v12, v16
142; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
143; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
144; CHECK-NEXT:    ret
145  %head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0
146  %splat = shufflevector <vscale x 8 x bfloat> %head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer
147  %vc = fsub <vscale x 8 x bfloat> %va, %splat
148  ret <vscale x 8 x bfloat> %vc
149}
150
151define <vscale x 8 x bfloat> @vfsub_fv_nxv8bf16(<vscale x 8 x bfloat> %va, bfloat %b) {
152; CHECK-LABEL: vfsub_fv_nxv8bf16:
153; CHECK:       # %bb.0:
154; CHECK-NEXT:    fmv.x.h a0, fa0
155; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, ma
156; CHECK-NEXT:    vmv.v.x v10, a0
157; CHECK-NEXT:    vfwcvtbf16.f.f.v v12, v8
158; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v10
159; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
160; CHECK-NEXT:    vfsub.vv v12, v16, v12
161; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
162; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v12
163; CHECK-NEXT:    ret
164  %head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0
165  %splat = shufflevector <vscale x 8 x bfloat> %head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer
166  %vc = fsub <vscale x 8 x bfloat> %splat, %va
167  ret <vscale x 8 x bfloat> %vc
168}
169
170define <vscale x 16 x bfloat> @vfsub_vv_nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vb) {
171; CHECK-LABEL: vfsub_vv_nxv16bf16:
172; CHECK:       # %bb.0:
173; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
174; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v12
175; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v8
176; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
177; CHECK-NEXT:    vfsub.vv v16, v24, v16
178; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
179; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v16
180; CHECK-NEXT:    ret
181  %vc = fsub <vscale x 16 x bfloat> %va, %vb
182  ret <vscale x 16 x bfloat> %vc
183}
184
185define <vscale x 16 x bfloat> @vfsub_vf_nxv16bf16(<vscale x 16 x bfloat> %va, bfloat %b) {
186; CHECK-LABEL: vfsub_vf_nxv16bf16:
187; CHECK:       # %bb.0:
188; CHECK-NEXT:    fmv.x.h a0, fa0
189; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, ma
190; CHECK-NEXT:    vmv.v.x v12, a0
191; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8
192; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v12
193; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
194; CHECK-NEXT:    vfsub.vv v16, v16, v24
195; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
196; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v16
197; CHECK-NEXT:    ret
198  %head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0
199  %splat = shufflevector <vscale x 16 x bfloat> %head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer
200  %vc = fsub <vscale x 16 x bfloat> %va, %splat
201  ret <vscale x 16 x bfloat> %vc
202}
203
204define <vscale x 32 x bfloat> @vfsub_vv_nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vb) {
205; CHECK-LABEL: vfsub_vv_nxv32bf16:
206; CHECK:       # %bb.0:
207; CHECK-NEXT:    addi sp, sp, -16
208; CHECK-NEXT:    .cfi_def_cfa_offset 16
209; CHECK-NEXT:    csrr a0, vlenb
210; CHECK-NEXT:    slli a0, a0, 3
211; CHECK-NEXT:    sub sp, sp, a0
212; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
213; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
214; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v16
215; CHECK-NEXT:    addi a0, sp, 16
216; CHECK-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
217; CHECK-NEXT:    vfwcvtbf16.f.f.v v0, v8
218; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v20
219; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v12
220; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
221; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
222; CHECK-NEXT:    vfsub.vv v0, v0, v8
223; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
224; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v0
225; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
226; CHECK-NEXT:    vfsub.vv v16, v16, v24
227; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
228; CHECK-NEXT:    vfncvtbf16.f.f.w v12, v16
229; CHECK-NEXT:    csrr a0, vlenb
230; CHECK-NEXT:    slli a0, a0, 3
231; CHECK-NEXT:    add sp, sp, a0
232; CHECK-NEXT:    .cfi_def_cfa sp, 16
233; CHECK-NEXT:    addi sp, sp, 16
234; CHECK-NEXT:    .cfi_def_cfa_offset 0
235; CHECK-NEXT:    ret
236  %vc = fsub <vscale x 32 x bfloat> %va, %vb
237  ret <vscale x 32 x bfloat> %vc
238}
239
240define <vscale x 32 x bfloat> @vfsub_vf_nxv32bf16(<vscale x 32 x bfloat> %va, bfloat %b) {
241; CHECK-LABEL: vfsub_vf_nxv32bf16:
242; CHECK:       # %bb.0:
243; CHECK-NEXT:    addi sp, sp, -16
244; CHECK-NEXT:    .cfi_def_cfa_offset 16
245; CHECK-NEXT:    csrr a0, vlenb
246; CHECK-NEXT:    slli a0, a0, 3
247; CHECK-NEXT:    sub sp, sp, a0
248; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
249; CHECK-NEXT:    fmv.x.h a0, fa0
250; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, ma
251; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v8
252; CHECK-NEXT:    addi a1, sp, 16
253; CHECK-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
254; CHECK-NEXT:    vfwcvtbf16.f.f.v v24, v12
255; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, ma
256; CHECK-NEXT:    vmv.v.x v8, a0
257; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
258; CHECK-NEXT:    vfwcvtbf16.f.f.v v0, v8
259; CHECK-NEXT:    vfwcvtbf16.f.f.v v16, v12
260; CHECK-NEXT:    addi a0, sp, 16
261; CHECK-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
262; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
263; CHECK-NEXT:    vfsub.vv v0, v8, v0
264; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
265; CHECK-NEXT:    vfncvtbf16.f.f.w v8, v0
266; CHECK-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
267; CHECK-NEXT:    vfsub.vv v16, v24, v16
268; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
269; CHECK-NEXT:    vfncvtbf16.f.f.w v12, v16
270; CHECK-NEXT:    csrr a0, vlenb
271; CHECK-NEXT:    slli a0, a0, 3
272; CHECK-NEXT:    add sp, sp, a0
273; CHECK-NEXT:    .cfi_def_cfa sp, 16
274; CHECK-NEXT:    addi sp, sp, 16
275; CHECK-NEXT:    .cfi_def_cfa_offset 0
276; CHECK-NEXT:    ret
277  %head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 0
278  %splat = shufflevector <vscale x 32 x bfloat> %head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer
279  %vc = fsub <vscale x 32 x bfloat> %va, %splat
280  ret <vscale x 32 x bfloat> %vc
281}
282
283define <vscale x 1 x half> @vfsub_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb) {
284; ZVFH-LABEL: vfsub_vv_nxv1f16:
285; ZVFH:       # %bb.0:
286; ZVFH-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
287; ZVFH-NEXT:    vfsub.vv v8, v8, v9
288; ZVFH-NEXT:    ret
289;
290; ZVFHMIN-LABEL: vfsub_vv_nxv1f16:
291; ZVFHMIN:       # %bb.0:
292; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
293; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
294; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
295; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
296; ZVFHMIN-NEXT:    vfsub.vv v9, v9, v10
297; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
298; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
299; ZVFHMIN-NEXT:    ret
300  %vc = fsub <vscale x 1 x half> %va, %vb
301  ret <vscale x 1 x half> %vc
302}
303
304define <vscale x 1 x half> @vfsub_vf_nxv1f16(<vscale x 1 x half> %va, half %b) {
305; ZVFH-LABEL: vfsub_vf_nxv1f16:
306; ZVFH:       # %bb.0:
307; ZVFH-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
308; ZVFH-NEXT:    vfsub.vf v8, v8, fa0
309; ZVFH-NEXT:    ret
310;
311; ZVFHMIN-LABEL: vfsub_vf_nxv1f16:
312; ZVFHMIN:       # %bb.0:
313; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
314; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, mf4, ta, ma
315; ZVFHMIN-NEXT:    vmv.v.x v9, a0
316; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
317; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
318; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
319; ZVFHMIN-NEXT:    vfsub.vv v9, v10, v8
320; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf4, ta, ma
321; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
322; ZVFHMIN-NEXT:    ret
323  %head = insertelement <vscale x 1 x half> poison, half %b, i32 0
324  %splat = shufflevector <vscale x 1 x half> %head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
325  %vc = fsub <vscale x 1 x half> %va, %splat
326  ret <vscale x 1 x half> %vc
327}
328
329define <vscale x 2 x half> @vfsub_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb) {
330; ZVFH-LABEL: vfsub_vv_nxv2f16:
331; ZVFH:       # %bb.0:
332; ZVFH-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
333; ZVFH-NEXT:    vfsub.vv v8, v8, v9
334; ZVFH-NEXT:    ret
335;
336; ZVFHMIN-LABEL: vfsub_vv_nxv2f16:
337; ZVFHMIN:       # %bb.0:
338; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
339; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
340; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
341; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
342; ZVFHMIN-NEXT:    vfsub.vv v9, v9, v10
343; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
344; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
345; ZVFHMIN-NEXT:    ret
346  %vc = fsub <vscale x 2 x half> %va, %vb
347  ret <vscale x 2 x half> %vc
348}
349
350define <vscale x 2 x half> @vfsub_vf_nxv2f16(<vscale x 2 x half> %va, half %b) {
351; ZVFH-LABEL: vfsub_vf_nxv2f16:
352; ZVFH:       # %bb.0:
353; ZVFH-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
354; ZVFH-NEXT:    vfsub.vf v8, v8, fa0
355; ZVFH-NEXT:    ret
356;
357; ZVFHMIN-LABEL: vfsub_vf_nxv2f16:
358; ZVFHMIN:       # %bb.0:
359; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
360; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, mf2, ta, ma
361; ZVFHMIN-NEXT:    vmv.v.x v9, a0
362; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
363; ZVFHMIN-NEXT:    vfwcvt.f.f.v v8, v9
364; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
365; ZVFHMIN-NEXT:    vfsub.vv v9, v10, v8
366; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
367; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v9
368; ZVFHMIN-NEXT:    ret
369  %head = insertelement <vscale x 2 x half> poison, half %b, i32 0
370  %splat = shufflevector <vscale x 2 x half> %head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
371  %vc = fsub <vscale x 2 x half> %va, %splat
372  ret <vscale x 2 x half> %vc
373}
374
375define <vscale x 4 x half> @vfsub_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb) {
376; ZVFH-LABEL: vfsub_vv_nxv4f16:
377; ZVFH:       # %bb.0:
378; ZVFH-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
379; ZVFH-NEXT:    vfsub.vv v8, v8, v9
380; ZVFH-NEXT:    ret
381;
382; ZVFHMIN-LABEL: vfsub_vv_nxv4f16:
383; ZVFHMIN:       # %bb.0:
384; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
385; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v9
386; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
387; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
388; ZVFHMIN-NEXT:    vfsub.vv v10, v12, v10
389; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
390; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
391; ZVFHMIN-NEXT:    ret
392  %vc = fsub <vscale x 4 x half> %va, %vb
393  ret <vscale x 4 x half> %vc
394}
395
396define <vscale x 4 x half> @vfsub_vf_nxv4f16(<vscale x 4 x half> %va, half %b) {
397; ZVFH-LABEL: vfsub_vf_nxv4f16:
398; ZVFH:       # %bb.0:
399; ZVFH-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
400; ZVFH-NEXT:    vfsub.vf v8, v8, fa0
401; ZVFH-NEXT:    ret
402;
403; ZVFHMIN-LABEL: vfsub_vf_nxv4f16:
404; ZVFHMIN:       # %bb.0:
405; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
406; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, m1, ta, ma
407; ZVFHMIN-NEXT:    vmv.v.x v9, a0
408; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
409; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v9
410; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
411; ZVFHMIN-NEXT:    vfsub.vv v10, v10, v12
412; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m1, ta, ma
413; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v10
414; ZVFHMIN-NEXT:    ret
415  %head = insertelement <vscale x 4 x half> poison, half %b, i32 0
416  %splat = shufflevector <vscale x 4 x half> %head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
417  %vc = fsub <vscale x 4 x half> %va, %splat
418  ret <vscale x 4 x half> %vc
419}
420
421define <vscale x 8 x half> @vfsub_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb) {
422; ZVFH-LABEL: vfsub_vv_nxv8f16:
423; ZVFH:       # %bb.0:
424; ZVFH-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
425; ZVFH-NEXT:    vfsub.vv v8, v8, v10
426; ZVFH-NEXT:    ret
427;
428; ZVFHMIN-LABEL: vfsub_vv_nxv8f16:
429; ZVFHMIN:       # %bb.0:
430; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
431; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v10
432; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
433; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
434; ZVFHMIN-NEXT:    vfsub.vv v12, v16, v12
435; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
436; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
437; ZVFHMIN-NEXT:    ret
438  %vc = fsub <vscale x 8 x half> %va, %vb
439  ret <vscale x 8 x half> %vc
440}
441
442define <vscale x 8 x half> @vfsub_vf_nxv8f16(<vscale x 8 x half> %va, half %b) {
443; ZVFH-LABEL: vfsub_vf_nxv8f16:
444; ZVFH:       # %bb.0:
445; ZVFH-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
446; ZVFH-NEXT:    vfsub.vf v8, v8, fa0
447; ZVFH-NEXT:    ret
448;
449; ZVFHMIN-LABEL: vfsub_vf_nxv8f16:
450; ZVFHMIN:       # %bb.0:
451; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
452; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, m2, ta, ma
453; ZVFHMIN-NEXT:    vmv.v.x v10, a0
454; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
455; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
456; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
457; ZVFHMIN-NEXT:    vfsub.vv v12, v12, v16
458; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
459; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
460; ZVFHMIN-NEXT:    ret
461  %head = insertelement <vscale x 8 x half> poison, half %b, i32 0
462  %splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
463  %vc = fsub <vscale x 8 x half> %va, %splat
464  ret <vscale x 8 x half> %vc
465}
466
467define <vscale x 8 x half> @vfsub_fv_nxv8f16(<vscale x 8 x half> %va, half %b) {
468; ZVFH-LABEL: vfsub_fv_nxv8f16:
469; ZVFH:       # %bb.0:
470; ZVFH-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
471; ZVFH-NEXT:    vfrsub.vf v8, v8, fa0
472; ZVFH-NEXT:    ret
473;
474; ZVFHMIN-LABEL: vfsub_fv_nxv8f16:
475; ZVFHMIN:       # %bb.0:
476; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
477; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, m2, ta, ma
478; ZVFHMIN-NEXT:    vmv.v.x v10, a0
479; ZVFHMIN-NEXT:    vfwcvt.f.f.v v12, v8
480; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v10
481; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
482; ZVFHMIN-NEXT:    vfsub.vv v12, v16, v12
483; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
484; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v12
485; ZVFHMIN-NEXT:    ret
486  %head = insertelement <vscale x 8 x half> poison, half %b, i32 0
487  %splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
488  %vc = fsub <vscale x 8 x half> %splat, %va
489  ret <vscale x 8 x half> %vc
490}
491
492define <vscale x 16 x half> @vfsub_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb) {
493; ZVFH-LABEL: vfsub_vv_nxv16f16:
494; ZVFH:       # %bb.0:
495; ZVFH-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
496; ZVFH-NEXT:    vfsub.vv v8, v8, v12
497; ZVFH-NEXT:    ret
498;
499; ZVFHMIN-LABEL: vfsub_vv_nxv16f16:
500; ZVFHMIN:       # %bb.0:
501; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
502; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
503; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v8
504; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
505; ZVFHMIN-NEXT:    vfsub.vv v16, v24, v16
506; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
507; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
508; ZVFHMIN-NEXT:    ret
509  %vc = fsub <vscale x 16 x half> %va, %vb
510  ret <vscale x 16 x half> %vc
511}
512
513define <vscale x 16 x half> @vfsub_vf_nxv16f16(<vscale x 16 x half> %va, half %b) {
514; ZVFH-LABEL: vfsub_vf_nxv16f16:
515; ZVFH:       # %bb.0:
516; ZVFH-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
517; ZVFH-NEXT:    vfsub.vf v8, v8, fa0
518; ZVFH-NEXT:    ret
519;
520; ZVFHMIN-LABEL: vfsub_vf_nxv16f16:
521; ZVFHMIN:       # %bb.0:
522; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
523; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, m4, ta, ma
524; ZVFHMIN-NEXT:    vmv.v.x v12, a0
525; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
526; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
527; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
528; ZVFHMIN-NEXT:    vfsub.vv v16, v16, v24
529; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
530; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v16
531; ZVFHMIN-NEXT:    ret
532  %head = insertelement <vscale x 16 x half> poison, half %b, i32 0
533  %splat = shufflevector <vscale x 16 x half> %head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
534  %vc = fsub <vscale x 16 x half> %va, %splat
535  ret <vscale x 16 x half> %vc
536}
537
538define <vscale x 32 x half> @vfsub_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb) {
539; ZVFH-LABEL: vfsub_vv_nxv32f16:
540; ZVFH:       # %bb.0:
541; ZVFH-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
542; ZVFH-NEXT:    vfsub.vv v8, v8, v16
543; ZVFH-NEXT:    ret
544;
545; ZVFHMIN-LABEL: vfsub_vv_nxv32f16:
546; ZVFHMIN:       # %bb.0:
547; ZVFHMIN-NEXT:    addi sp, sp, -16
548; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
549; ZVFHMIN-NEXT:    csrr a0, vlenb
550; ZVFHMIN-NEXT:    slli a0, a0, 3
551; ZVFHMIN-NEXT:    sub sp, sp, a0
552; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
553; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
554; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v16
555; ZVFHMIN-NEXT:    addi a0, sp, 16
556; ZVFHMIN-NEXT:    vs8r.v v24, (a0) # Unknown-size Folded Spill
557; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
558; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v20
559; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
560; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
561; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
562; ZVFHMIN-NEXT:    vfsub.vv v0, v0, v8
563; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
564; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
565; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
566; ZVFHMIN-NEXT:    vfsub.vv v16, v16, v24
567; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
568; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16
569; ZVFHMIN-NEXT:    csrr a0, vlenb
570; ZVFHMIN-NEXT:    slli a0, a0, 3
571; ZVFHMIN-NEXT:    add sp, sp, a0
572; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
573; ZVFHMIN-NEXT:    addi sp, sp, 16
574; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
575; ZVFHMIN-NEXT:    ret
576  %vc = fsub <vscale x 32 x half> %va, %vb
577  ret <vscale x 32 x half> %vc
578}
579
580define <vscale x 32 x half> @vfsub_vf_nxv32f16(<vscale x 32 x half> %va, half %b) {
581; ZVFH-LABEL: vfsub_vf_nxv32f16:
582; ZVFH:       # %bb.0:
583; ZVFH-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
584; ZVFH-NEXT:    vfsub.vf v8, v8, fa0
585; ZVFH-NEXT:    ret
586;
587; ZVFHMIN-LABEL: vfsub_vf_nxv32f16:
588; ZVFHMIN:       # %bb.0:
589; ZVFHMIN-NEXT:    addi sp, sp, -16
590; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 16
591; ZVFHMIN-NEXT:    csrr a0, vlenb
592; ZVFHMIN-NEXT:    slli a0, a0, 3
593; ZVFHMIN-NEXT:    sub sp, sp, a0
594; ZVFHMIN-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
595; ZVFHMIN-NEXT:    fmv.x.h a0, fa0
596; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, m4, ta, ma
597; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v8
598; ZVFHMIN-NEXT:    addi a1, sp, 16
599; ZVFHMIN-NEXT:    vs8r.v v16, (a1) # Unknown-size Folded Spill
600; ZVFHMIN-NEXT:    vfwcvt.f.f.v v24, v12
601; ZVFHMIN-NEXT:    vsetvli a1, zero, e16, m8, ta, ma
602; ZVFHMIN-NEXT:    vmv.v.x v8, a0
603; ZVFHMIN-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
604; ZVFHMIN-NEXT:    vfwcvt.f.f.v v0, v8
605; ZVFHMIN-NEXT:    vfwcvt.f.f.v v16, v12
606; ZVFHMIN-NEXT:    addi a0, sp, 16
607; ZVFHMIN-NEXT:    vl8r.v v8, (a0) # Unknown-size Folded Reload
608; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
609; ZVFHMIN-NEXT:    vfsub.vv v0, v8, v0
610; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
611; ZVFHMIN-NEXT:    vfncvt.f.f.w v8, v0
612; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m8, ta, ma
613; ZVFHMIN-NEXT:    vfsub.vv v16, v24, v16
614; ZVFHMIN-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
615; ZVFHMIN-NEXT:    vfncvt.f.f.w v12, v16
616; ZVFHMIN-NEXT:    csrr a0, vlenb
617; ZVFHMIN-NEXT:    slli a0, a0, 3
618; ZVFHMIN-NEXT:    add sp, sp, a0
619; ZVFHMIN-NEXT:    .cfi_def_cfa sp, 16
620; ZVFHMIN-NEXT:    addi sp, sp, 16
621; ZVFHMIN-NEXT:    .cfi_def_cfa_offset 0
622; ZVFHMIN-NEXT:    ret
623  %head = insertelement <vscale x 32 x half> poison, half %b, i32 0
624  %splat = shufflevector <vscale x 32 x half> %head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
625  %vc = fsub <vscale x 32 x half> %va, %splat
626  ret <vscale x 32 x half> %vc
627}
628
629define <vscale x 1 x float> @vfsub_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb) {
630; CHECK-LABEL: vfsub_vv_nxv1f32:
631; CHECK:       # %bb.0:
632; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
633; CHECK-NEXT:    vfsub.vv v8, v8, v9
634; CHECK-NEXT:    ret
635  %vc = fsub <vscale x 1 x float> %va, %vb
636  ret <vscale x 1 x float> %vc
637}
638
639define <vscale x 1 x float> @vfsub_vf_nxv1f32(<vscale x 1 x float> %va, float %b) {
640; CHECK-LABEL: vfsub_vf_nxv1f32:
641; CHECK:       # %bb.0:
642; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
643; CHECK-NEXT:    vfsub.vf v8, v8, fa0
644; CHECK-NEXT:    ret
645  %head = insertelement <vscale x 1 x float> poison, float %b, i32 0
646  %splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
647  %vc = fsub <vscale x 1 x float> %va, %splat
648  ret <vscale x 1 x float> %vc
649}
650
651define <vscale x 2 x float> @vfsub_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb) {
652; CHECK-LABEL: vfsub_vv_nxv2f32:
653; CHECK:       # %bb.0:
654; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
655; CHECK-NEXT:    vfsub.vv v8, v8, v9
656; CHECK-NEXT:    ret
657  %vc = fsub <vscale x 2 x float> %va, %vb
658  ret <vscale x 2 x float> %vc
659}
660
661define <vscale x 2 x float> @vfsub_vf_nxv2f32(<vscale x 2 x float> %va, float %b) {
662; CHECK-LABEL: vfsub_vf_nxv2f32:
663; CHECK:       # %bb.0:
664; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
665; CHECK-NEXT:    vfsub.vf v8, v8, fa0
666; CHECK-NEXT:    ret
667  %head = insertelement <vscale x 2 x float> poison, float %b, i32 0
668  %splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
669  %vc = fsub <vscale x 2 x float> %va, %splat
670  ret <vscale x 2 x float> %vc
671}
672
673define <vscale x 4 x float> @vfsub_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb) {
674; CHECK-LABEL: vfsub_vv_nxv4f32:
675; CHECK:       # %bb.0:
676; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
677; CHECK-NEXT:    vfsub.vv v8, v8, v10
678; CHECK-NEXT:    ret
679  %vc = fsub <vscale x 4 x float> %va, %vb
680  ret <vscale x 4 x float> %vc
681}
682
683define <vscale x 4 x float> @vfsub_vf_nxv4f32(<vscale x 4 x float> %va, float %b) {
684; CHECK-LABEL: vfsub_vf_nxv4f32:
685; CHECK:       # %bb.0:
686; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
687; CHECK-NEXT:    vfsub.vf v8, v8, fa0
688; CHECK-NEXT:    ret
689  %head = insertelement <vscale x 4 x float> poison, float %b, i32 0
690  %splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
691  %vc = fsub <vscale x 4 x float> %va, %splat
692  ret <vscale x 4 x float> %vc
693}
694
695define <vscale x 8 x float> @vfsub_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb) {
696; CHECK-LABEL: vfsub_vv_nxv8f32:
697; CHECK:       # %bb.0:
698; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
699; CHECK-NEXT:    vfsub.vv v8, v8, v12
700; CHECK-NEXT:    ret
701  %vc = fsub <vscale x 8 x float> %va, %vb
702  ret <vscale x 8 x float> %vc
703}
704
705define <vscale x 8 x float> @vfsub_vf_nxv8f32(<vscale x 8 x float> %va, float %b) {
706; CHECK-LABEL: vfsub_vf_nxv8f32:
707; CHECK:       # %bb.0:
708; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
709; CHECK-NEXT:    vfsub.vf v8, v8, fa0
710; CHECK-NEXT:    ret
711  %head = insertelement <vscale x 8 x float> poison, float %b, i32 0
712  %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
713  %vc = fsub <vscale x 8 x float> %va, %splat
714  ret <vscale x 8 x float> %vc
715}
716
717define <vscale x 8 x float> @vfsub_fv_nxv8f32(<vscale x 8 x float> %va, float %b) {
718; CHECK-LABEL: vfsub_fv_nxv8f32:
719; CHECK:       # %bb.0:
720; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
721; CHECK-NEXT:    vfrsub.vf v8, v8, fa0
722; CHECK-NEXT:    ret
723  %head = insertelement <vscale x 8 x float> poison, float %b, i32 0
724  %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
725  %vc = fsub <vscale x 8 x float> %splat, %va
726  ret <vscale x 8 x float> %vc
727}
728
729define <vscale x 16 x float> @vfsub_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb) {
730; CHECK-LABEL: vfsub_vv_nxv16f32:
731; CHECK:       # %bb.0:
732; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
733; CHECK-NEXT:    vfsub.vv v8, v8, v16
734; CHECK-NEXT:    ret
735  %vc = fsub <vscale x 16 x float> %va, %vb
736  ret <vscale x 16 x float> %vc
737}
738
739define <vscale x 16 x float> @vfsub_vf_nxv16f32(<vscale x 16 x float> %va, float %b) {
740; CHECK-LABEL: vfsub_vf_nxv16f32:
741; CHECK:       # %bb.0:
742; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
743; CHECK-NEXT:    vfsub.vf v8, v8, fa0
744; CHECK-NEXT:    ret
745  %head = insertelement <vscale x 16 x float> poison, float %b, i32 0
746  %splat = shufflevector <vscale x 16 x float> %head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
747  %vc = fsub <vscale x 16 x float> %va, %splat
748  ret <vscale x 16 x float> %vc
749}
750
751define <vscale x 1 x double> @vfsub_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb) {
752; CHECK-LABEL: vfsub_vv_nxv1f64:
753; CHECK:       # %bb.0:
754; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
755; CHECK-NEXT:    vfsub.vv v8, v8, v9
756; CHECK-NEXT:    ret
757  %vc = fsub <vscale x 1 x double> %va, %vb
758  ret <vscale x 1 x double> %vc
759}
760
761define <vscale x 1 x double> @vfsub_vf_nxv1f64(<vscale x 1 x double> %va, double %b) {
762; CHECK-LABEL: vfsub_vf_nxv1f64:
763; CHECK:       # %bb.0:
764; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
765; CHECK-NEXT:    vfsub.vf v8, v8, fa0
766; CHECK-NEXT:    ret
767  %head = insertelement <vscale x 1 x double> poison, double %b, i32 0
768  %splat = shufflevector <vscale x 1 x double> %head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
769  %vc = fsub <vscale x 1 x double> %va, %splat
770  ret <vscale x 1 x double> %vc
771}
772
773define <vscale x 2 x double> @vfsub_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb) {
774; CHECK-LABEL: vfsub_vv_nxv2f64:
775; CHECK:       # %bb.0:
776; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
777; CHECK-NEXT:    vfsub.vv v8, v8, v10
778; CHECK-NEXT:    ret
779  %vc = fsub <vscale x 2 x double> %va, %vb
780  ret <vscale x 2 x double> %vc
781}
782
783define <vscale x 2 x double> @vfsub_vf_nxv2f64(<vscale x 2 x double> %va, double %b) {
784; CHECK-LABEL: vfsub_vf_nxv2f64:
785; CHECK:       # %bb.0:
786; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
787; CHECK-NEXT:    vfsub.vf v8, v8, fa0
788; CHECK-NEXT:    ret
789  %head = insertelement <vscale x 2 x double> poison, double %b, i32 0
790  %splat = shufflevector <vscale x 2 x double> %head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
791  %vc = fsub <vscale x 2 x double> %va, %splat
792  ret <vscale x 2 x double> %vc
793}
794
795define <vscale x 4 x double> @vfsub_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb) {
796; CHECK-LABEL: vfsub_vv_nxv4f64:
797; CHECK:       # %bb.0:
798; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
799; CHECK-NEXT:    vfsub.vv v8, v8, v12
800; CHECK-NEXT:    ret
801  %vc = fsub <vscale x 4 x double> %va, %vb
802  ret <vscale x 4 x double> %vc
803}
804
805define <vscale x 4 x double> @vfsub_vf_nxv4f64(<vscale x 4 x double> %va, double %b) {
806; CHECK-LABEL: vfsub_vf_nxv4f64:
807; CHECK:       # %bb.0:
808; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
809; CHECK-NEXT:    vfsub.vf v8, v8, fa0
810; CHECK-NEXT:    ret
811  %head = insertelement <vscale x 4 x double> poison, double %b, i32 0
812  %splat = shufflevector <vscale x 4 x double> %head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
813  %vc = fsub <vscale x 4 x double> %va, %splat
814  ret <vscale x 4 x double> %vc
815}
816
817define <vscale x 8 x double> @vfsub_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb) {
818; CHECK-LABEL: vfsub_vv_nxv8f64:
819; CHECK:       # %bb.0:
820; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
821; CHECK-NEXT:    vfsub.vv v8, v8, v16
822; CHECK-NEXT:    ret
823  %vc = fsub <vscale x 8 x double> %va, %vb
824  ret <vscale x 8 x double> %vc
825}
826
827define <vscale x 8 x double> @vfsub_vf_nxv8f64(<vscale x 8 x double> %va, double %b) {
828; CHECK-LABEL: vfsub_vf_nxv8f64:
829; CHECK:       # %bb.0:
830; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
831; CHECK-NEXT:    vfsub.vf v8, v8, fa0
832; CHECK-NEXT:    ret
833  %head = insertelement <vscale x 8 x double> poison, double %b, i32 0
834  %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
835  %vc = fsub <vscale x 8 x double> %va, %splat
836  ret <vscale x 8 x double> %vc
837}
838
839define <vscale x 8 x double> @vfsub_fv_nxv8f64(<vscale x 8 x double> %va, double %b) {
840; CHECK-LABEL: vfsub_fv_nxv8f64:
841; CHECK:       # %bb.0:
842; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
843; CHECK-NEXT:    vfrsub.vf v8, v8, fa0
844; CHECK-NEXT:    ret
845  %head = insertelement <vscale x 8 x double> poison, double %b, i32 0
846  %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
847  %vc = fsub <vscale x 8 x double> %splat, %va
848  ret <vscale x 8 x double> %vc
849}
850
851define <vscale x 8 x float> @vfsub_vv_mask_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x i1> %mask) {
852; CHECK-LABEL: vfsub_vv_mask_nxv8f32:
853; CHECK:       # %bb.0:
854; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
855; CHECK-NEXT:    vfsub.vv v8, v8, v12, v0.t
856; CHECK-NEXT:    ret
857  %vs = select <vscale x 8 x i1> %mask, <vscale x 8 x float> %vb, <vscale x 8 x float> splat (float 0.0)
858  %vc = fsub fast <vscale x 8 x float> %va, %vs
859  ret <vscale x 8 x float> %vc
860}
861
862define <vscale x 8 x float> @vfsub_vf_mask_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x i1> %mask) {
863; CHECK-LABEL: vfsub_vf_mask_nxv8f32:
864; CHECK:       # %bb.0:
865; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
866; CHECK-NEXT:    vfsub.vf v8, v8, fa0, v0.t
867; CHECK-NEXT:    ret
868  %head1 = insertelement <vscale x 8 x float> poison, float %b, i32 0
869  %splat1 = shufflevector <vscale x 8 x float> %head1, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
870  %vs = select <vscale x 8 x i1> %mask, <vscale x 8 x float> %splat1, <vscale x 8 x float> splat (float 0.0)
871  %vc = fsub fast <vscale x 8 x float> %va, %vs
872  ret <vscale x 8 x float> %vc
873}
874