xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll (revision e44f03dd4ea84d3c12c916fdf02d63503c2872e2) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfh,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
3; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfh,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
4; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfhmin,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
5; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfhmin,+zvfbfmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
6
7define <vscale x 2 x i7> @vfptoui_v4i7_v4bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
8; CHECK-LABEL: vfptoui_v4i7_v4bf16:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
11; CHECK-NEXT:    vfwcvtbf16.f.f.v v9, v8
12; CHECK-NEXT:    vfncvt.rtz.x.f.w v8, v9, v0.t
13; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
14; CHECK-NEXT:    vnsrl.wi v8, v8, 0, v0.t
15; CHECK-NEXT:    ret
16  %v = call <vscale x 2 x i7> @llvm.vp.fptoui.v4i7.v4bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 %evl)
17  ret <vscale x 2 x i7> %v
18}
19
20define <vscale x 2 x i8> @vfptoui_nxv2i8_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
21; CHECK-LABEL: vfptoui_nxv2i8_nxv2bf16:
22; CHECK:       # %bb.0:
23; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
24; CHECK-NEXT:    vfwcvtbf16.f.f.v v9, v8
25; CHECK-NEXT:    vfncvt.rtz.xu.f.w v8, v9, v0.t
26; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
27; CHECK-NEXT:    vnsrl.wi v8, v8, 0, v0.t
28; CHECK-NEXT:    ret
29  %v = call <vscale x 2 x i8> @llvm.vp.fptoui.nxv2i8.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 %evl)
30  ret <vscale x 2 x i8> %v
31}
32
33define <vscale x 2 x i8> @vfptoui_nxv2i8_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, i32 zeroext %evl) {
34; CHECK-LABEL: vfptoui_nxv2i8_nxv2bf16_unmasked:
35; CHECK:       # %bb.0:
36; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
37; CHECK-NEXT:    vfwcvtbf16.f.f.v v9, v8
38; CHECK-NEXT:    vfncvt.rtz.xu.f.w v8, v9
39; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
40; CHECK-NEXT:    vnsrl.wi v8, v8, 0
41; CHECK-NEXT:    ret
42  %v = call <vscale x 2 x i8> @llvm.vp.fptoui.nxv2i8.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
43  ret <vscale x 2 x i8> %v
44}
45
46define <vscale x 2 x i16> @vfptoui_nxv2i16_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
47; CHECK-LABEL: vfptoui_nxv2i16_nxv2bf16:
48; CHECK:       # %bb.0:
49; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
50; CHECK-NEXT:    vfwcvtbf16.f.f.v v9, v8
51; CHECK-NEXT:    vfncvt.rtz.xu.f.w v8, v9, v0.t
52; CHECK-NEXT:    ret
53  %v = call <vscale x 2 x i16> @llvm.vp.fptoui.nxv2i16.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 %evl)
54  ret <vscale x 2 x i16> %v
55}
56
57define <vscale x 2 x i16> @vfptoui_nxv2i16_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, i32 zeroext %evl) {
58; CHECK-LABEL: vfptoui_nxv2i16_nxv2bf16_unmasked:
59; CHECK:       # %bb.0:
60; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
61; CHECK-NEXT:    vfwcvtbf16.f.f.v v9, v8
62; CHECK-NEXT:    vfncvt.rtz.xu.f.w v8, v9
63; CHECK-NEXT:    ret
64  %v = call <vscale x 2 x i16> @llvm.vp.fptoui.nxv2i16.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
65  ret <vscale x 2 x i16> %v
66}
67
68define <vscale x 2 x i32> @vfptoui_nxv2i32_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
69; CHECK-LABEL: vfptoui_nxv2i32_nxv2bf16:
70; CHECK:       # %bb.0:
71; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
72; CHECK-NEXT:    vfwcvtbf16.f.f.v v9, v8
73; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
74; CHECK-NEXT:    vfcvt.rtz.xu.f.v v8, v9, v0.t
75; CHECK-NEXT:    ret
76  %v = call <vscale x 2 x i32> @llvm.vp.fptoui.nxv2i32.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 %evl)
77  ret <vscale x 2 x i32> %v
78}
79
80define <vscale x 2 x i32> @vfptoui_nxv2i32_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, i32 zeroext %evl) {
81; CHECK-LABEL: vfptoui_nxv2i32_nxv2bf16_unmasked:
82; CHECK:       # %bb.0:
83; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
84; CHECK-NEXT:    vfwcvtbf16.f.f.v v9, v8
85; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
86; CHECK-NEXT:    vfcvt.rtz.xu.f.v v8, v9
87; CHECK-NEXT:    ret
88  %v = call <vscale x 2 x i32> @llvm.vp.fptoui.nxv2i32.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
89  ret <vscale x 2 x i32> %v
90}
91
92define <vscale x 2 x i64> @vfptoui_nxv2i64_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
93; CHECK-LABEL: vfptoui_nxv2i64_nxv2bf16:
94; CHECK:       # %bb.0:
95; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
96; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8
97; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
98; CHECK-NEXT:    vfwcvt.rtz.xu.f.v v8, v10, v0.t
99; CHECK-NEXT:    ret
100  %v = call <vscale x 2 x i64> @llvm.vp.fptoui.nxv2i64.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> %m, i32 %evl)
101  ret <vscale x 2 x i64> %v
102}
103
104define <vscale x 2 x i64> @vfptoui_nxv2i64_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, i32 zeroext %evl) {
105; CHECK-LABEL: vfptoui_nxv2i64_nxv2bf16_unmasked:
106; CHECK:       # %bb.0:
107; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
108; CHECK-NEXT:    vfwcvtbf16.f.f.v v10, v8
109; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
110; CHECK-NEXT:    vfwcvt.rtz.xu.f.v v8, v10
111; CHECK-NEXT:    ret
112  %v = call <vscale x 2 x i64> @llvm.vp.fptoui.nxv2i64.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
113  ret <vscale x 2 x i64> %v
114}
115
116declare <vscale x 2 x i7> @llvm.vp.fptoui.v4i7.v4f16(<vscale x 2 x half>, <vscale x 2 x i1>, i32)
117
118define <vscale x 2 x i7> @vfptoui_v4i7_v4f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
119; ZVFH-LABEL: vfptoui_v4i7_v4f16:
120; ZVFH:       # %bb.0:
121; ZVFH-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma
122; ZVFH-NEXT:    vfncvt.rtz.x.f.w v9, v8, v0.t
123; ZVFH-NEXT:    vmv1r.v v8, v9
124; ZVFH-NEXT:    ret
125;
126; ZVFHMIN-LABEL: vfptoui_v4i7_v4f16:
127; ZVFHMIN:       # %bb.0:
128; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
129; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
130; ZVFHMIN-NEXT:    vfncvt.rtz.x.f.w v8, v9, v0.t
131; ZVFHMIN-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
132; ZVFHMIN-NEXT:    vnsrl.wi v8, v8, 0, v0.t
133; ZVFHMIN-NEXT:    ret
134  %v = call <vscale x 2 x i7> @llvm.vp.fptoui.v4i7.v4f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)
135  ret <vscale x 2 x i7> %v
136}
137
138declare <vscale x 2 x i8> @llvm.vp.fptoui.nxv2i8.nxv2f16(<vscale x 2 x half>, <vscale x 2 x i1>, i32)
139
140define <vscale x 2 x i8> @vfptoui_nxv2i8_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
141; ZVFH-LABEL: vfptoui_nxv2i8_nxv2f16:
142; ZVFH:       # %bb.0:
143; ZVFH-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma
144; ZVFH-NEXT:    vfncvt.rtz.xu.f.w v9, v8, v0.t
145; ZVFH-NEXT:    vmv1r.v v8, v9
146; ZVFH-NEXT:    ret
147;
148; ZVFHMIN-LABEL: vfptoui_nxv2i8_nxv2f16:
149; ZVFHMIN:       # %bb.0:
150; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
151; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
152; ZVFHMIN-NEXT:    vfncvt.rtz.xu.f.w v8, v9, v0.t
153; ZVFHMIN-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
154; ZVFHMIN-NEXT:    vnsrl.wi v8, v8, 0, v0.t
155; ZVFHMIN-NEXT:    ret
156  %v = call <vscale x 2 x i8> @llvm.vp.fptoui.nxv2i8.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)
157  ret <vscale x 2 x i8> %v
158}
159
160define <vscale x 2 x i8> @vfptoui_nxv2i8_nxv2f16_unmasked(<vscale x 2 x half> %va, i32 zeroext %evl) {
161; ZVFH-LABEL: vfptoui_nxv2i8_nxv2f16_unmasked:
162; ZVFH:       # %bb.0:
163; ZVFH-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma
164; ZVFH-NEXT:    vfncvt.rtz.xu.f.w v9, v8
165; ZVFH-NEXT:    vmv1r.v v8, v9
166; ZVFH-NEXT:    ret
167;
168; ZVFHMIN-LABEL: vfptoui_nxv2i8_nxv2f16_unmasked:
169; ZVFHMIN:       # %bb.0:
170; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
171; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
172; ZVFHMIN-NEXT:    vfncvt.rtz.xu.f.w v8, v9
173; ZVFHMIN-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
174; ZVFHMIN-NEXT:    vnsrl.wi v8, v8, 0
175; ZVFHMIN-NEXT:    ret
176  %v = call <vscale x 2 x i8> @llvm.vp.fptoui.nxv2i8.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
177  ret <vscale x 2 x i8> %v
178}
179
180declare <vscale x 2 x i16> @llvm.vp.fptoui.nxv2i16.nxv2f16(<vscale x 2 x half>, <vscale x 2 x i1>, i32)
181
182define <vscale x 2 x i16> @vfptoui_nxv2i16_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
183; ZVFH-LABEL: vfptoui_nxv2i16_nxv2f16:
184; ZVFH:       # %bb.0:
185; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
186; ZVFH-NEXT:    vfcvt.rtz.xu.f.v v8, v8, v0.t
187; ZVFH-NEXT:    ret
188;
189; ZVFHMIN-LABEL: vfptoui_nxv2i16_nxv2f16:
190; ZVFHMIN:       # %bb.0:
191; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
192; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
193; ZVFHMIN-NEXT:    vfncvt.rtz.xu.f.w v8, v9, v0.t
194; ZVFHMIN-NEXT:    ret
195  %v = call <vscale x 2 x i16> @llvm.vp.fptoui.nxv2i16.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)
196  ret <vscale x 2 x i16> %v
197}
198
199define <vscale x 2 x i16> @vfptoui_nxv2i16_nxv2f16_unmasked(<vscale x 2 x half> %va, i32 zeroext %evl) {
200; ZVFH-LABEL: vfptoui_nxv2i16_nxv2f16_unmasked:
201; ZVFH:       # %bb.0:
202; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
203; ZVFH-NEXT:    vfcvt.rtz.xu.f.v v8, v8
204; ZVFH-NEXT:    ret
205;
206; ZVFHMIN-LABEL: vfptoui_nxv2i16_nxv2f16_unmasked:
207; ZVFHMIN:       # %bb.0:
208; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
209; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
210; ZVFHMIN-NEXT:    vfncvt.rtz.xu.f.w v8, v9
211; ZVFHMIN-NEXT:    ret
212  %v = call <vscale x 2 x i16> @llvm.vp.fptoui.nxv2i16.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
213  ret <vscale x 2 x i16> %v
214}
215
216declare <vscale x 2 x i32> @llvm.vp.fptoui.nxv2i32.nxv2f16(<vscale x 2 x half>, <vscale x 2 x i1>, i32)
217
218define <vscale x 2 x i32> @vfptoui_nxv2i32_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
219; ZVFH-LABEL: vfptoui_nxv2i32_nxv2f16:
220; ZVFH:       # %bb.0:
221; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
222; ZVFH-NEXT:    vfwcvt.rtz.xu.f.v v9, v8, v0.t
223; ZVFH-NEXT:    vmv1r.v v8, v9
224; ZVFH-NEXT:    ret
225;
226; ZVFHMIN-LABEL: vfptoui_nxv2i32_nxv2f16:
227; ZVFHMIN:       # %bb.0:
228; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
229; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
230; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
231; ZVFHMIN-NEXT:    vfcvt.rtz.xu.f.v v8, v9, v0.t
232; ZVFHMIN-NEXT:    ret
233  %v = call <vscale x 2 x i32> @llvm.vp.fptoui.nxv2i32.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)
234  ret <vscale x 2 x i32> %v
235}
236
237define <vscale x 2 x i32> @vfptoui_nxv2i32_nxv2f16_unmasked(<vscale x 2 x half> %va, i32 zeroext %evl) {
238; ZVFH-LABEL: vfptoui_nxv2i32_nxv2f16_unmasked:
239; ZVFH:       # %bb.0:
240; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
241; ZVFH-NEXT:    vfwcvt.rtz.xu.f.v v9, v8
242; ZVFH-NEXT:    vmv1r.v v8, v9
243; ZVFH-NEXT:    ret
244;
245; ZVFHMIN-LABEL: vfptoui_nxv2i32_nxv2f16_unmasked:
246; ZVFHMIN:       # %bb.0:
247; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
248; ZVFHMIN-NEXT:    vfwcvt.f.f.v v9, v8
249; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
250; ZVFHMIN-NEXT:    vfcvt.rtz.xu.f.v v8, v9
251; ZVFHMIN-NEXT:    ret
252  %v = call <vscale x 2 x i32> @llvm.vp.fptoui.nxv2i32.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
253  ret <vscale x 2 x i32> %v
254}
255
256declare <vscale x 2 x i64> @llvm.vp.fptoui.nxv2i64.nxv2f16(<vscale x 2 x half>, <vscale x 2 x i1>, i32)
257
258define <vscale x 2 x i64> @vfptoui_nxv2i64_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
259; ZVFH-LABEL: vfptoui_nxv2i64_nxv2f16:
260; ZVFH:       # %bb.0:
261; ZVFH-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
262; ZVFH-NEXT:    vfwcvt.f.f.v v10, v8, v0.t
263; ZVFH-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
264; ZVFH-NEXT:    vfwcvt.rtz.xu.f.v v8, v10, v0.t
265; ZVFH-NEXT:    ret
266;
267; ZVFHMIN-LABEL: vfptoui_nxv2i64_nxv2f16:
268; ZVFHMIN:       # %bb.0:
269; ZVFHMIN-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
270; ZVFHMIN-NEXT:    vfwcvt.f.f.v v10, v8
271; ZVFHMIN-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
272; ZVFHMIN-NEXT:    vfwcvt.rtz.xu.f.v v8, v10, v0.t
273; ZVFHMIN-NEXT:    ret
274  %v = call <vscale x 2 x i64> @llvm.vp.fptoui.nxv2i64.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)
275  ret <vscale x 2 x i64> %v
276}
277
278define <vscale x 2 x i64> @vfptoui_nxv2i64_nxv2f16_unmasked(<vscale x 2 x half> %va, i32 zeroext %evl) {
279; CHECK-LABEL: vfptoui_nxv2i64_nxv2f16_unmasked:
280; CHECK:       # %bb.0:
281; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
282; CHECK-NEXT:    vfwcvt.f.f.v v10, v8
283; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
284; CHECK-NEXT:    vfwcvt.rtz.xu.f.v v8, v10
285; CHECK-NEXT:    ret
286  %v = call <vscale x 2 x i64> @llvm.vp.fptoui.nxv2i64.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
287  ret <vscale x 2 x i64> %v
288}
289
290declare <vscale x 2 x i8> @llvm.vp.fptoui.nxv2i8.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
291
292define <vscale x 2 x i8> @vfptoui_nxv2i8_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
293; CHECK-LABEL: vfptoui_nxv2i8_nxv2f32:
294; CHECK:       # %bb.0:
295; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
296; CHECK-NEXT:    vfncvt.rtz.xu.f.w v9, v8, v0.t
297; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
298; CHECK-NEXT:    vnsrl.wi v8, v9, 0, v0.t
299; CHECK-NEXT:    ret
300  %v = call <vscale x 2 x i8> @llvm.vp.fptoui.nxv2i8.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)
301  ret <vscale x 2 x i8> %v
302}
303
304define <vscale x 2 x i8> @vfptoui_nxv2i8_nxv2f32_unmasked(<vscale x 2 x float> %va, i32 zeroext %evl) {
305; CHECK-LABEL: vfptoui_nxv2i8_nxv2f32_unmasked:
306; CHECK:       # %bb.0:
307; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
308; CHECK-NEXT:    vfncvt.rtz.xu.f.w v9, v8
309; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
310; CHECK-NEXT:    vnsrl.wi v8, v9, 0
311; CHECK-NEXT:    ret
312  %v = call <vscale x 2 x i8> @llvm.vp.fptoui.nxv2i8.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
313  ret <vscale x 2 x i8> %v
314}
315
316declare <vscale x 2 x i16> @llvm.vp.fptoui.nxv2i16.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
317
318define <vscale x 2 x i16> @vfptoui_nxv2i16_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
319; CHECK-LABEL: vfptoui_nxv2i16_nxv2f32:
320; CHECK:       # %bb.0:
321; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
322; CHECK-NEXT:    vfncvt.rtz.xu.f.w v9, v8, v0.t
323; CHECK-NEXT:    vmv1r.v v8, v9
324; CHECK-NEXT:    ret
325  %v = call <vscale x 2 x i16> @llvm.vp.fptoui.nxv2i16.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)
326  ret <vscale x 2 x i16> %v
327}
328
329define <vscale x 2 x i16> @vfptoui_nxv2i16_nxv2f32_unmasked(<vscale x 2 x float> %va, i32 zeroext %evl) {
330; CHECK-LABEL: vfptoui_nxv2i16_nxv2f32_unmasked:
331; CHECK:       # %bb.0:
332; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
333; CHECK-NEXT:    vfncvt.rtz.xu.f.w v9, v8
334; CHECK-NEXT:    vmv1r.v v8, v9
335; CHECK-NEXT:    ret
336  %v = call <vscale x 2 x i16> @llvm.vp.fptoui.nxv2i16.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
337  ret <vscale x 2 x i16> %v
338}
339
340declare <vscale x 2 x i32> @llvm.vp.fptoui.nxv2i32.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
341
342define <vscale x 2 x i32> @vfptoui_nxv2i32_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
343; CHECK-LABEL: vfptoui_nxv2i32_nxv2f32:
344; CHECK:       # %bb.0:
345; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
346; CHECK-NEXT:    vfcvt.rtz.xu.f.v v8, v8, v0.t
347; CHECK-NEXT:    ret
348  %v = call <vscale x 2 x i32> @llvm.vp.fptoui.nxv2i32.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)
349  ret <vscale x 2 x i32> %v
350}
351
352define <vscale x 2 x i32> @vfptoui_nxv2i32_nxv2f32_unmasked(<vscale x 2 x float> %va, i32 zeroext %evl) {
353; CHECK-LABEL: vfptoui_nxv2i32_nxv2f32_unmasked:
354; CHECK:       # %bb.0:
355; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
356; CHECK-NEXT:    vfcvt.rtz.xu.f.v v8, v8
357; CHECK-NEXT:    ret
358  %v = call <vscale x 2 x i32> @llvm.vp.fptoui.nxv2i32.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
359  ret <vscale x 2 x i32> %v
360}
361
362declare <vscale x 2 x i64> @llvm.vp.fptoui.nxv2i64.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
363
364define <vscale x 2 x i64> @vfptoui_nxv2i64_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
365; CHECK-LABEL: vfptoui_nxv2i64_nxv2f32:
366; CHECK:       # %bb.0:
367; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
368; CHECK-NEXT:    vfwcvt.rtz.xu.f.v v10, v8, v0.t
369; CHECK-NEXT:    vmv2r.v v8, v10
370; CHECK-NEXT:    ret
371  %v = call <vscale x 2 x i64> @llvm.vp.fptoui.nxv2i64.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)
372  ret <vscale x 2 x i64> %v
373}
374
375define <vscale x 2 x i64> @vfptoui_nxv2i64_nxv2f32_unmasked(<vscale x 2 x float> %va, i32 zeroext %evl) {
376; CHECK-LABEL: vfptoui_nxv2i64_nxv2f32_unmasked:
377; CHECK:       # %bb.0:
378; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
379; CHECK-NEXT:    vfwcvt.rtz.xu.f.v v10, v8
380; CHECK-NEXT:    vmv2r.v v8, v10
381; CHECK-NEXT:    ret
382  %v = call <vscale x 2 x i64> @llvm.vp.fptoui.nxv2i64.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
383  ret <vscale x 2 x i64> %v
384}
385
386declare <vscale x 2 x i8> @llvm.vp.fptoui.nxv2i8.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, i32)
387
388define <vscale x 2 x i8> @vfptoui_nxv2i8_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
389; CHECK-LABEL: vfptoui_nxv2i8_nxv2f64:
390; CHECK:       # %bb.0:
391; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
392; CHECK-NEXT:    vfncvt.rtz.xu.f.w v10, v8, v0.t
393; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
394; CHECK-NEXT:    vnsrl.wi v8, v10, 0, v0.t
395; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
396; CHECK-NEXT:    vnsrl.wi v8, v8, 0, v0.t
397; CHECK-NEXT:    ret
398  %v = call <vscale x 2 x i8> @llvm.vp.fptoui.nxv2i8.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)
399  ret <vscale x 2 x i8> %v
400}
401
402define <vscale x 2 x i8> @vfptoui_nxv2i8_nxv2f64_unmasked(<vscale x 2 x double> %va, i32 zeroext %evl) {
403; CHECK-LABEL: vfptoui_nxv2i8_nxv2f64_unmasked:
404; CHECK:       # %bb.0:
405; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
406; CHECK-NEXT:    vfncvt.rtz.xu.f.w v10, v8
407; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
408; CHECK-NEXT:    vnsrl.wi v8, v10, 0
409; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma
410; CHECK-NEXT:    vnsrl.wi v8, v8, 0
411; CHECK-NEXT:    ret
412  %v = call <vscale x 2 x i8> @llvm.vp.fptoui.nxv2i8.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
413  ret <vscale x 2 x i8> %v
414}
415
416declare <vscale x 2 x i16> @llvm.vp.fptoui.nxv2i16.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, i32)
417
418define <vscale x 2 x i16> @vfptoui_nxv2i16_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
419; CHECK-LABEL: vfptoui_nxv2i16_nxv2f64:
420; CHECK:       # %bb.0:
421; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
422; CHECK-NEXT:    vfncvt.rtz.xu.f.w v10, v8, v0.t
423; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
424; CHECK-NEXT:    vnsrl.wi v8, v10, 0, v0.t
425; CHECK-NEXT:    ret
426  %v = call <vscale x 2 x i16> @llvm.vp.fptoui.nxv2i16.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)
427  ret <vscale x 2 x i16> %v
428}
429
430define <vscale x 2 x i16> @vfptoui_nxv2i16_nxv2f64_unmasked(<vscale x 2 x double> %va, i32 zeroext %evl) {
431; CHECK-LABEL: vfptoui_nxv2i16_nxv2f64_unmasked:
432; CHECK:       # %bb.0:
433; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
434; CHECK-NEXT:    vfncvt.rtz.xu.f.w v10, v8
435; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma
436; CHECK-NEXT:    vnsrl.wi v8, v10, 0
437; CHECK-NEXT:    ret
438  %v = call <vscale x 2 x i16> @llvm.vp.fptoui.nxv2i16.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
439  ret <vscale x 2 x i16> %v
440}
441
442declare <vscale x 2 x i32> @llvm.vp.fptoui.nxv2i32.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, i32)
443
444define <vscale x 2 x i32> @vfptoui_nxv2i32_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
445; CHECK-LABEL: vfptoui_nxv2i32_nxv2f64:
446; CHECK:       # %bb.0:
447; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
448; CHECK-NEXT:    vfncvt.rtz.xu.f.w v10, v8, v0.t
449; CHECK-NEXT:    vmv.v.v v8, v10
450; CHECK-NEXT:    ret
451  %v = call <vscale x 2 x i32> @llvm.vp.fptoui.nxv2i32.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)
452  ret <vscale x 2 x i32> %v
453}
454
455define <vscale x 2 x i32> @vfptoui_nxv2i32_nxv2f64_unmasked(<vscale x 2 x double> %va, i32 zeroext %evl) {
456; CHECK-LABEL: vfptoui_nxv2i32_nxv2f64_unmasked:
457; CHECK:       # %bb.0:
458; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
459; CHECK-NEXT:    vfncvt.rtz.xu.f.w v10, v8
460; CHECK-NEXT:    vmv.v.v v8, v10
461; CHECK-NEXT:    ret
462  %v = call <vscale x 2 x i32> @llvm.vp.fptoui.nxv2i32.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
463  ret <vscale x 2 x i32> %v
464}
465
466declare <vscale x 2 x i64> @llvm.vp.fptoui.nxv2i64.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, i32)
467
468define <vscale x 2 x i64> @vfptoui_nxv2i64_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
469; CHECK-LABEL: vfptoui_nxv2i64_nxv2f64:
470; CHECK:       # %bb.0:
471; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
472; CHECK-NEXT:    vfcvt.rtz.xu.f.v v8, v8, v0.t
473; CHECK-NEXT:    ret
474  %v = call <vscale x 2 x i64> @llvm.vp.fptoui.nxv2i64.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)
475  ret <vscale x 2 x i64> %v
476}
477
478define <vscale x 2 x i64> @vfptoui_nxv2i64_nxv2f64_unmasked(<vscale x 2 x double> %va, i32 zeroext %evl) {
479; CHECK-LABEL: vfptoui_nxv2i64_nxv2f64_unmasked:
480; CHECK:       # %bb.0:
481; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
482; CHECK-NEXT:    vfcvt.rtz.xu.f.v v8, v8
483; CHECK-NEXT:    ret
484  %v = call <vscale x 2 x i64> @llvm.vp.fptoui.nxv2i64.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)
485  ret <vscale x 2 x i64> %v
486}
487
488declare <vscale x 32 x i16> @llvm.vp.fptoui.nxv32i16.nxv32f32(<vscale x 32 x float>, <vscale x 32 x i1>, i32)
489
490define <vscale x 32 x i16> @vfptoui_nxv32i16_nxv32f32(<vscale x 32 x float> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {
491; CHECK-LABEL: vfptoui_nxv32i16_nxv32f32:
492; CHECK:       # %bb.0:
493; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, ma
494; CHECK-NEXT:    vmv1r.v v24, v0
495; CHECK-NEXT:    csrr a1, vlenb
496; CHECK-NEXT:    srli a2, a1, 2
497; CHECK-NEXT:    slli a1, a1, 1
498; CHECK-NEXT:    vslidedown.vx v0, v0, a2
499; CHECK-NEXT:    sub a2, a0, a1
500; CHECK-NEXT:    sltu a3, a0, a2
501; CHECK-NEXT:    addi a3, a3, -1
502; CHECK-NEXT:    and a2, a3, a2
503; CHECK-NEXT:    vsetvli zero, a2, e16, m4, ta, ma
504; CHECK-NEXT:    vfncvt.rtz.xu.f.w v28, v16, v0.t
505; CHECK-NEXT:    bltu a0, a1, .LBB34_2
506; CHECK-NEXT:  # %bb.1:
507; CHECK-NEXT:    mv a0, a1
508; CHECK-NEXT:  .LBB34_2:
509; CHECK-NEXT:    vmv1r.v v0, v24
510; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, ma
511; CHECK-NEXT:    vfncvt.rtz.xu.f.w v24, v8, v0.t
512; CHECK-NEXT:    vmv8r.v v8, v24
513; CHECK-NEXT:    ret
514  %v = call <vscale x 32 x i16> @llvm.vp.fptoui.nxv32i16.nxv32f32(<vscale x 32 x float> %va, <vscale x 32 x i1> %m, i32 %evl)
515  ret <vscale x 32 x i16> %v
516}
517
518declare <vscale x 32 x i32> @llvm.vp.fptoui.nxv32i32.nxv32f32(<vscale x 32 x float>, <vscale x 32 x i1>, i32)
519
520define <vscale x 32 x i32> @vfptoui_nxv32i32_nxv32f32(<vscale x 32 x float> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {
521; CHECK-LABEL: vfptoui_nxv32i32_nxv32f32:
522; CHECK:       # %bb.0:
523; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, ma
524; CHECK-NEXT:    vmv1r.v v24, v0
525; CHECK-NEXT:    csrr a1, vlenb
526; CHECK-NEXT:    srli a2, a1, 2
527; CHECK-NEXT:    slli a1, a1, 1
528; CHECK-NEXT:    vslidedown.vx v0, v0, a2
529; CHECK-NEXT:    sub a2, a0, a1
530; CHECK-NEXT:    sltu a3, a0, a2
531; CHECK-NEXT:    addi a3, a3, -1
532; CHECK-NEXT:    and a2, a3, a2
533; CHECK-NEXT:    vsetvli zero, a2, e32, m8, ta, ma
534; CHECK-NEXT:    vfcvt.rtz.xu.f.v v16, v16, v0.t
535; CHECK-NEXT:    bltu a0, a1, .LBB35_2
536; CHECK-NEXT:  # %bb.1:
537; CHECK-NEXT:    mv a0, a1
538; CHECK-NEXT:  .LBB35_2:
539; CHECK-NEXT:    vmv1r.v v0, v24
540; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
541; CHECK-NEXT:    vfcvt.rtz.xu.f.v v8, v8, v0.t
542; CHECK-NEXT:    ret
543  %v = call <vscale x 32 x i32> @llvm.vp.fptoui.nxv32i32.nxv32f32(<vscale x 32 x float> %va, <vscale x 32 x i1> %m, i32 %evl)
544  ret <vscale x 32 x i32> %v
545}
546
547define <vscale x 32 x i32> @vfptoui_nxv32i32_nxv32f32_unmasked(<vscale x 32 x float> %va, i32 zeroext %evl) {
548; CHECK-LABEL: vfptoui_nxv32i32_nxv32f32_unmasked:
549; CHECK:       # %bb.0:
550; CHECK-NEXT:    csrr a1, vlenb
551; CHECK-NEXT:    slli a1, a1, 1
552; CHECK-NEXT:    sub a2, a0, a1
553; CHECK-NEXT:    sltu a3, a0, a2
554; CHECK-NEXT:    addi a3, a3, -1
555; CHECK-NEXT:    and a2, a3, a2
556; CHECK-NEXT:    vsetvli zero, a2, e32, m8, ta, ma
557; CHECK-NEXT:    vfcvt.rtz.xu.f.v v16, v16
558; CHECK-NEXT:    bltu a0, a1, .LBB36_2
559; CHECK-NEXT:  # %bb.1:
560; CHECK-NEXT:    mv a0, a1
561; CHECK-NEXT:  .LBB36_2:
562; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma
563; CHECK-NEXT:    vfcvt.rtz.xu.f.v v8, v8
564; CHECK-NEXT:    ret
565  %v = call <vscale x 32 x i32> @llvm.vp.fptoui.nxv32i32.nxv32f32(<vscale x 32 x float> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)
566  ret <vscale x 32 x i32> %v
567}
568