1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zvfbfmin,+v \ 3; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \ 4; RUN: --check-prefixes=CHECK,ZVFH 5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v,+zvfbfmin \ 6; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \ 7; RUN: --check-prefixes=CHECK,ZVFH 8; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfhmin,+v,+zvfbfmin \ 9; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \ 10; RUN: --check-prefixes=CHECK,ZVFHMIN 11; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfhmin,+v,+zvfbfmin \ 12; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \ 13; RUN: --check-prefixes=CHECK,ZVFHMIN 14 15define <vscale x 1 x i1> @vfptosi_nxv1bf16_nxv1i1(<vscale x 1 x bfloat> %va) { 16; CHECK-LABEL: vfptosi_nxv1bf16_nxv1i1: 17; CHECK: # %bb.0: 18; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 19; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 20; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9 21; CHECK-NEXT: vand.vi v8, v8, 1 22; CHECK-NEXT: vmsne.vi v0, v8, 0 23; CHECK-NEXT: ret 24 %evec = fptosi <vscale x 1 x bfloat> %va to <vscale x 1 x i1> 25 ret <vscale x 1 x i1> %evec 26} 27 28define <vscale x 1 x i7> @vfptosi_nxv1bf16_nxv1i7(<vscale x 1 x bfloat> %va) { 29; CHECK-LABEL: vfptosi_nxv1bf16_nxv1i7: 30; CHECK: # %bb.0: 31; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 32; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 33; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9 34; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 35; CHECK-NEXT: vnsrl.wi v8, v8, 0 36; CHECK-NEXT: ret 37 %evec = fptosi <vscale x 1 x bfloat> %va to <vscale x 1 x i7> 38 ret <vscale x 1 x i7> %evec 39} 40 41define <vscale x 1 x i7> @vfptoui_nxv1bf16_nxv1i7(<vscale x 1 x bfloat> %va) { 42; CHECK-LABEL: vfptoui_nxv1bf16_nxv1i7: 43; CHECK: # %bb.0: 44; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 45; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 46; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9 47; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 48; CHECK-NEXT: vnsrl.wi v8, v8, 0 49; CHECK-NEXT: ret 50 %evec = fptoui <vscale x 1 x bfloat> %va to <vscale x 1 x i7> 51 ret <vscale x 1 x i7> %evec 52} 53 54define <vscale x 1 x i1> @vfptoui_nxv1bf16_nxv1i1(<vscale x 1 x bfloat> %va) { 55; CHECK-LABEL: vfptoui_nxv1bf16_nxv1i1: 56; CHECK: # %bb.0: 57; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 58; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 59; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v9 60; CHECK-NEXT: vand.vi v8, v8, 1 61; CHECK-NEXT: vmsne.vi v0, v8, 0 62; CHECK-NEXT: ret 63 %evec = fptoui <vscale x 1 x bfloat> %va to <vscale x 1 x i1> 64 ret <vscale x 1 x i1> %evec 65} 66 67define <vscale x 1 x i8> @vfptosi_nxv1bf16_nxv1i8(<vscale x 1 x bfloat> %va) { 68; CHECK-LABEL: vfptosi_nxv1bf16_nxv1i8: 69; CHECK: # %bb.0: 70; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 71; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 72; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9 73; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 74; CHECK-NEXT: vnsrl.wi v8, v8, 0 75; CHECK-NEXT: ret 76 %evec = fptosi <vscale x 1 x bfloat> %va to <vscale x 1 x i8> 77 ret <vscale x 1 x i8> %evec 78} 79 80define <vscale x 1 x i8> @vfptoui_nxv1bf16_nxv1i8(<vscale x 1 x bfloat> %va) { 81; CHECK-LABEL: vfptoui_nxv1bf16_nxv1i8: 82; CHECK: # %bb.0: 83; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 84; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 85; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v9 86; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 87; CHECK-NEXT: vnsrl.wi v8, v8, 0 88; CHECK-NEXT: ret 89 %evec = fptoui <vscale x 1 x bfloat> %va to <vscale x 1 x i8> 90 ret <vscale x 1 x i8> %evec 91} 92 93define <vscale x 1 x i16> @vfptosi_nxv1bf16_nxv1i16(<vscale x 1 x bfloat> %va) { 94; CHECK-LABEL: vfptosi_nxv1bf16_nxv1i16: 95; CHECK: # %bb.0: 96; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 97; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 98; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9 99; CHECK-NEXT: ret 100 %evec = fptosi <vscale x 1 x bfloat> %va to <vscale x 1 x i16> 101 ret <vscale x 1 x i16> %evec 102} 103 104define <vscale x 1 x i16> @vfptoui_nxv1bf16_nxv1i16(<vscale x 1 x bfloat> %va) { 105; CHECK-LABEL: vfptoui_nxv1bf16_nxv1i16: 106; CHECK: # %bb.0: 107; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 108; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 109; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v9 110; CHECK-NEXT: ret 111 %evec = fptoui <vscale x 1 x bfloat> %va to <vscale x 1 x i16> 112 ret <vscale x 1 x i16> %evec 113} 114 115define <vscale x 1 x i32> @vfptosi_nxv1bf16_nxv1i32(<vscale x 1 x bfloat> %va) { 116; CHECK-LABEL: vfptosi_nxv1bf16_nxv1i32: 117; CHECK: # %bb.0: 118; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 119; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 120; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma 121; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v9 122; CHECK-NEXT: ret 123 %evec = fptosi <vscale x 1 x bfloat> %va to <vscale x 1 x i32> 124 ret <vscale x 1 x i32> %evec 125} 126 127define <vscale x 1 x i32> @vfptoui_nxv1bf16_nxv1i32(<vscale x 1 x bfloat> %va) { 128; CHECK-LABEL: vfptoui_nxv1bf16_nxv1i32: 129; CHECK: # %bb.0: 130; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 131; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 132; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma 133; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v9 134; CHECK-NEXT: ret 135 %evec = fptoui <vscale x 1 x bfloat> %va to <vscale x 1 x i32> 136 ret <vscale x 1 x i32> %evec 137} 138 139define <vscale x 1 x i64> @vfptosi_nxv1bf16_nxv1i64(<vscale x 1 x bfloat> %va) { 140; CHECK-LABEL: vfptosi_nxv1bf16_nxv1i64: 141; CHECK: # %bb.0: 142; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 143; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 144; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma 145; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v9 146; CHECK-NEXT: ret 147 %evec = fptosi <vscale x 1 x bfloat> %va to <vscale x 1 x i64> 148 ret <vscale x 1 x i64> %evec 149} 150 151define <vscale x 1 x i64> @vfptoui_nxv1bf16_nxv1i64(<vscale x 1 x bfloat> %va) { 152; CHECK-LABEL: vfptoui_nxv1bf16_nxv1i64: 153; CHECK: # %bb.0: 154; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 155; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 156; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma 157; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v9 158; CHECK-NEXT: ret 159 %evec = fptoui <vscale x 1 x bfloat> %va to <vscale x 1 x i64> 160 ret <vscale x 1 x i64> %evec 161} 162 163define <vscale x 2 x i1> @vfptosi_nxv2bf16_nxv2i1(<vscale x 2 x bfloat> %va) { 164; CHECK-LABEL: vfptosi_nxv2bf16_nxv2i1: 165; CHECK: # %bb.0: 166; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 167; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 168; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9 169; CHECK-NEXT: vand.vi v8, v8, 1 170; CHECK-NEXT: vmsne.vi v0, v8, 0 171; CHECK-NEXT: ret 172 %evec = fptosi <vscale x 2 x bfloat> %va to <vscale x 2 x i1> 173 ret <vscale x 2 x i1> %evec 174} 175 176define <vscale x 2 x i1> @vfptoui_nxv2bf16_nxv2i1(<vscale x 2 x bfloat> %va) { 177; CHECK-LABEL: vfptoui_nxv2bf16_nxv2i1: 178; CHECK: # %bb.0: 179; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 180; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 181; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v9 182; CHECK-NEXT: vand.vi v8, v8, 1 183; CHECK-NEXT: vmsne.vi v0, v8, 0 184; CHECK-NEXT: ret 185 %evec = fptoui <vscale x 2 x bfloat> %va to <vscale x 2 x i1> 186 ret <vscale x 2 x i1> %evec 187} 188 189define <vscale x 2 x i8> @vfptosi_nxv2bf16_nxv2i8(<vscale x 2 x bfloat> %va) { 190; CHECK-LABEL: vfptosi_nxv2bf16_nxv2i8: 191; CHECK: # %bb.0: 192; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 193; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 194; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9 195; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma 196; CHECK-NEXT: vnsrl.wi v8, v8, 0 197; CHECK-NEXT: ret 198 %evec = fptosi <vscale x 2 x bfloat> %va to <vscale x 2 x i8> 199 ret <vscale x 2 x i8> %evec 200} 201 202define <vscale x 2 x i8> @vfptoui_nxv2bf16_nxv2i8(<vscale x 2 x bfloat> %va) { 203; CHECK-LABEL: vfptoui_nxv2bf16_nxv2i8: 204; CHECK: # %bb.0: 205; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 206; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 207; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v9 208; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma 209; CHECK-NEXT: vnsrl.wi v8, v8, 0 210; CHECK-NEXT: ret 211 %evec = fptoui <vscale x 2 x bfloat> %va to <vscale x 2 x i8> 212 ret <vscale x 2 x i8> %evec 213} 214 215define <vscale x 2 x i16> @vfptosi_nxv2bf16_nxv2i16(<vscale x 2 x bfloat> %va) { 216; CHECK-LABEL: vfptosi_nxv2bf16_nxv2i16: 217; CHECK: # %bb.0: 218; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 219; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 220; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9 221; CHECK-NEXT: ret 222 %evec = fptosi <vscale x 2 x bfloat> %va to <vscale x 2 x i16> 223 ret <vscale x 2 x i16> %evec 224} 225 226define <vscale x 2 x i16> @vfptoui_nxv2bf16_nxv2i16(<vscale x 2 x bfloat> %va) { 227; CHECK-LABEL: vfptoui_nxv2bf16_nxv2i16: 228; CHECK: # %bb.0: 229; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 230; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 231; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v9 232; CHECK-NEXT: ret 233 %evec = fptoui <vscale x 2 x bfloat> %va to <vscale x 2 x i16> 234 ret <vscale x 2 x i16> %evec 235} 236 237define <vscale x 2 x i32> @vfptosi_nxv2bf16_nxv2i32(<vscale x 2 x bfloat> %va) { 238; CHECK-LABEL: vfptosi_nxv2bf16_nxv2i32: 239; CHECK: # %bb.0: 240; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 241; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 242; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma 243; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v9 244; CHECK-NEXT: ret 245 %evec = fptosi <vscale x 2 x bfloat> %va to <vscale x 2 x i32> 246 ret <vscale x 2 x i32> %evec 247} 248 249define <vscale x 2 x i32> @vfptoui_nxv2bf16_nxv2i32(<vscale x 2 x bfloat> %va) { 250; CHECK-LABEL: vfptoui_nxv2bf16_nxv2i32: 251; CHECK: # %bb.0: 252; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 253; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8 254; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma 255; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v9 256; CHECK-NEXT: ret 257 %evec = fptoui <vscale x 2 x bfloat> %va to <vscale x 2 x i32> 258 ret <vscale x 2 x i32> %evec 259} 260 261define <vscale x 2 x i64> @vfptosi_nxv2bf16_nxv2i64(<vscale x 2 x bfloat> %va) { 262; CHECK-LABEL: vfptosi_nxv2bf16_nxv2i64: 263; CHECK: # %bb.0: 264; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 265; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 266; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma 267; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v10 268; CHECK-NEXT: ret 269 %evec = fptosi <vscale x 2 x bfloat> %va to <vscale x 2 x i64> 270 ret <vscale x 2 x i64> %evec 271} 272 273define <vscale x 2 x i64> @vfptoui_nxv2bf16_nxv2i64(<vscale x 2 x bfloat> %va) { 274; CHECK-LABEL: vfptoui_nxv2bf16_nxv2i64: 275; CHECK: # %bb.0: 276; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 277; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 278; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma 279; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v10 280; CHECK-NEXT: ret 281 %evec = fptoui <vscale x 2 x bfloat> %va to <vscale x 2 x i64> 282 ret <vscale x 2 x i64> %evec 283} 284 285define <vscale x 4 x i1> @vfptosi_nxv4bf16_nxv4i1(<vscale x 4 x bfloat> %va) { 286; CHECK-LABEL: vfptosi_nxv4bf16_nxv4i1: 287; CHECK: # %bb.0: 288; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 289; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 290; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v10 291; CHECK-NEXT: vand.vi v8, v8, 1 292; CHECK-NEXT: vmsne.vi v0, v8, 0 293; CHECK-NEXT: ret 294 %evec = fptosi <vscale x 4 x bfloat> %va to <vscale x 4 x i1> 295 ret <vscale x 4 x i1> %evec 296} 297 298define <vscale x 4 x i1> @vfptoui_nxv4bf16_nxv4i1(<vscale x 4 x bfloat> %va) { 299; CHECK-LABEL: vfptoui_nxv4bf16_nxv4i1: 300; CHECK: # %bb.0: 301; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 302; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 303; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v10 304; CHECK-NEXT: vand.vi v8, v8, 1 305; CHECK-NEXT: vmsne.vi v0, v8, 0 306; CHECK-NEXT: ret 307 %evec = fptoui <vscale x 4 x bfloat> %va to <vscale x 4 x i1> 308 ret <vscale x 4 x i1> %evec 309} 310 311define <vscale x 4 x i8> @vfptosi_nxv4bf16_nxv4i8(<vscale x 4 x bfloat> %va) { 312; CHECK-LABEL: vfptosi_nxv4bf16_nxv4i8: 313; CHECK: # %bb.0: 314; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 315; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 316; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v10 317; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma 318; CHECK-NEXT: vnsrl.wi v8, v8, 0 319; CHECK-NEXT: ret 320 %evec = fptosi <vscale x 4 x bfloat> %va to <vscale x 4 x i8> 321 ret <vscale x 4 x i8> %evec 322} 323 324define <vscale x 4 x i8> @vfptoui_nxv4bf16_nxv4i8(<vscale x 4 x bfloat> %va) { 325; CHECK-LABEL: vfptoui_nxv4bf16_nxv4i8: 326; CHECK: # %bb.0: 327; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 328; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 329; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v10 330; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma 331; CHECK-NEXT: vnsrl.wi v8, v8, 0 332; CHECK-NEXT: ret 333 %evec = fptoui <vscale x 4 x bfloat> %va to <vscale x 4 x i8> 334 ret <vscale x 4 x i8> %evec 335} 336 337define <vscale x 4 x i16> @vfptosi_nxv4bf16_nxv4i16(<vscale x 4 x bfloat> %va) { 338; CHECK-LABEL: vfptosi_nxv4bf16_nxv4i16: 339; CHECK: # %bb.0: 340; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 341; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 342; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v10 343; CHECK-NEXT: ret 344 %evec = fptosi <vscale x 4 x bfloat> %va to <vscale x 4 x i16> 345 ret <vscale x 4 x i16> %evec 346} 347 348define <vscale x 4 x i16> @vfptoui_nxv4bf16_nxv4i16(<vscale x 4 x bfloat> %va) { 349; CHECK-LABEL: vfptoui_nxv4bf16_nxv4i16: 350; CHECK: # %bb.0: 351; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 352; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 353; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v10 354; CHECK-NEXT: ret 355 %evec = fptoui <vscale x 4 x bfloat> %va to <vscale x 4 x i16> 356 ret <vscale x 4 x i16> %evec 357} 358 359define <vscale x 4 x i32> @vfptosi_nxv4bf16_nxv4i32(<vscale x 4 x bfloat> %va) { 360; CHECK-LABEL: vfptosi_nxv4bf16_nxv4i32: 361; CHECK: # %bb.0: 362; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 363; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 364; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma 365; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v10 366; CHECK-NEXT: ret 367 %evec = fptosi <vscale x 4 x bfloat> %va to <vscale x 4 x i32> 368 ret <vscale x 4 x i32> %evec 369} 370 371define <vscale x 4 x i32> @vfptoui_nxv4bf16_nxv4i32(<vscale x 4 x bfloat> %va) { 372; CHECK-LABEL: vfptoui_nxv4bf16_nxv4i32: 373; CHECK: # %bb.0: 374; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 375; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8 376; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma 377; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v10 378; CHECK-NEXT: ret 379 %evec = fptoui <vscale x 4 x bfloat> %va to <vscale x 4 x i32> 380 ret <vscale x 4 x i32> %evec 381} 382 383define <vscale x 4 x i64> @vfptosi_nxv4bf16_nxv4i64(<vscale x 4 x bfloat> %va) { 384; CHECK-LABEL: vfptosi_nxv4bf16_nxv4i64: 385; CHECK: # %bb.0: 386; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 387; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 388; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma 389; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v12 390; CHECK-NEXT: ret 391 %evec = fptosi <vscale x 4 x bfloat> %va to <vscale x 4 x i64> 392 ret <vscale x 4 x i64> %evec 393} 394 395define <vscale x 4 x i64> @vfptoui_nxv4bf16_nxv4i64(<vscale x 4 x bfloat> %va) { 396; CHECK-LABEL: vfptoui_nxv4bf16_nxv4i64: 397; CHECK: # %bb.0: 398; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 399; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 400; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma 401; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v12 402; CHECK-NEXT: ret 403 %evec = fptoui <vscale x 4 x bfloat> %va to <vscale x 4 x i64> 404 ret <vscale x 4 x i64> %evec 405} 406 407define <vscale x 8 x i1> @vfptosi_nxv8bf16_nxv8i1(<vscale x 8 x bfloat> %va) { 408; CHECK-LABEL: vfptosi_nxv8bf16_nxv8i1: 409; CHECK: # %bb.0: 410; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 411; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 412; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v12 413; CHECK-NEXT: vand.vi v8, v8, 1 414; CHECK-NEXT: vmsne.vi v0, v8, 0 415; CHECK-NEXT: ret 416 %evec = fptosi <vscale x 8 x bfloat> %va to <vscale x 8 x i1> 417 ret <vscale x 8 x i1> %evec 418} 419 420define <vscale x 8 x i1> @vfptoui_nxv8bf16_nxv8i1(<vscale x 8 x bfloat> %va) { 421; CHECK-LABEL: vfptoui_nxv8bf16_nxv8i1: 422; CHECK: # %bb.0: 423; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 424; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 425; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v12 426; CHECK-NEXT: vand.vi v8, v8, 1 427; CHECK-NEXT: vmsne.vi v0, v8, 0 428; CHECK-NEXT: ret 429 %evec = fptoui <vscale x 8 x bfloat> %va to <vscale x 8 x i1> 430 ret <vscale x 8 x i1> %evec 431} 432 433define <vscale x 8 x i8> @vfptosi_nxv8bf16_nxv8i8(<vscale x 8 x bfloat> %va) { 434; CHECK-LABEL: vfptosi_nxv8bf16_nxv8i8: 435; CHECK: # %bb.0: 436; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 437; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 438; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v12 439; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma 440; CHECK-NEXT: vnsrl.wi v8, v10, 0 441; CHECK-NEXT: ret 442 %evec = fptosi <vscale x 8 x bfloat> %va to <vscale x 8 x i8> 443 ret <vscale x 8 x i8> %evec 444} 445 446define <vscale x 8 x i8> @vfptoui_nxv8bf16_nxv8i8(<vscale x 8 x bfloat> %va) { 447; CHECK-LABEL: vfptoui_nxv8bf16_nxv8i8: 448; CHECK: # %bb.0: 449; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 450; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 451; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v12 452; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma 453; CHECK-NEXT: vnsrl.wi v8, v10, 0 454; CHECK-NEXT: ret 455 %evec = fptoui <vscale x 8 x bfloat> %va to <vscale x 8 x i8> 456 ret <vscale x 8 x i8> %evec 457} 458 459define <vscale x 8 x i16> @vfptosi_nxv8bf16_nxv8i16(<vscale x 8 x bfloat> %va) { 460; CHECK-LABEL: vfptosi_nxv8bf16_nxv8i16: 461; CHECK: # %bb.0: 462; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 463; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 464; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v12 465; CHECK-NEXT: ret 466 %evec = fptosi <vscale x 8 x bfloat> %va to <vscale x 8 x i16> 467 ret <vscale x 8 x i16> %evec 468} 469 470define <vscale x 8 x i16> @vfptoui_nxv8bf16_nxv8i16(<vscale x 8 x bfloat> %va) { 471; CHECK-LABEL: vfptoui_nxv8bf16_nxv8i16: 472; CHECK: # %bb.0: 473; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 474; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 475; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v12 476; CHECK-NEXT: ret 477 %evec = fptoui <vscale x 8 x bfloat> %va to <vscale x 8 x i16> 478 ret <vscale x 8 x i16> %evec 479} 480 481define <vscale x 8 x i32> @vfptosi_nxv8bf16_nxv8i32(<vscale x 8 x bfloat> %va) { 482; CHECK-LABEL: vfptosi_nxv8bf16_nxv8i32: 483; CHECK: # %bb.0: 484; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 485; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 486; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma 487; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v12 488; CHECK-NEXT: ret 489 %evec = fptosi <vscale x 8 x bfloat> %va to <vscale x 8 x i32> 490 ret <vscale x 8 x i32> %evec 491} 492 493define <vscale x 8 x i32> @vfptoui_nxv8bf16_nxv8i32(<vscale x 8 x bfloat> %va) { 494; CHECK-LABEL: vfptoui_nxv8bf16_nxv8i32: 495; CHECK: # %bb.0: 496; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 497; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 498; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma 499; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v12 500; CHECK-NEXT: ret 501 %evec = fptoui <vscale x 8 x bfloat> %va to <vscale x 8 x i32> 502 ret <vscale x 8 x i32> %evec 503} 504 505define <vscale x 8 x i64> @vfptosi_nxv8bf16_nxv8i64(<vscale x 8 x bfloat> %va) { 506; CHECK-LABEL: vfptosi_nxv8bf16_nxv8i64: 507; CHECK: # %bb.0: 508; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 509; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 510; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma 511; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v16 512; CHECK-NEXT: ret 513 %evec = fptosi <vscale x 8 x bfloat> %va to <vscale x 8 x i64> 514 ret <vscale x 8 x i64> %evec 515} 516 517define <vscale x 8 x i64> @vfptoui_nxv8bf16_nxv8i64(<vscale x 8 x bfloat> %va) { 518; CHECK-LABEL: vfptoui_nxv8bf16_nxv8i64: 519; CHECK: # %bb.0: 520; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 521; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 522; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma 523; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v16 524; CHECK-NEXT: ret 525 %evec = fptoui <vscale x 8 x bfloat> %va to <vscale x 8 x i64> 526 ret <vscale x 8 x i64> %evec 527} 528 529define <vscale x 16 x i1> @vfptosi_nxv16bf16_nxv16i1(<vscale x 16 x bfloat> %va) { 530; CHECK-LABEL: vfptosi_nxv16bf16_nxv16i1: 531; CHECK: # %bb.0: 532; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 533; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 534; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v16 535; CHECK-NEXT: vand.vi v8, v8, 1 536; CHECK-NEXT: vmsne.vi v0, v8, 0 537; CHECK-NEXT: ret 538 %evec = fptosi <vscale x 16 x bfloat> %va to <vscale x 16 x i1> 539 ret <vscale x 16 x i1> %evec 540} 541 542define <vscale x 16 x i1> @vfptoui_nxv16bf16_nxv16i1(<vscale x 16 x bfloat> %va) { 543; CHECK-LABEL: vfptoui_nxv16bf16_nxv16i1: 544; CHECK: # %bb.0: 545; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 546; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 547; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v16 548; CHECK-NEXT: vand.vi v8, v8, 1 549; CHECK-NEXT: vmsne.vi v0, v8, 0 550; CHECK-NEXT: ret 551 %evec = fptoui <vscale x 16 x bfloat> %va to <vscale x 16 x i1> 552 ret <vscale x 16 x i1> %evec 553} 554 555define <vscale x 16 x i8> @vfptosi_nxv16bf16_nxv16i8(<vscale x 16 x bfloat> %va) { 556; CHECK-LABEL: vfptosi_nxv16bf16_nxv16i8: 557; CHECK: # %bb.0: 558; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 559; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 560; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v16 561; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma 562; CHECK-NEXT: vnsrl.wi v8, v12, 0 563; CHECK-NEXT: ret 564 %evec = fptosi <vscale x 16 x bfloat> %va to <vscale x 16 x i8> 565 ret <vscale x 16 x i8> %evec 566} 567 568define <vscale x 16 x i8> @vfptoui_nxv16bf16_nxv16i8(<vscale x 16 x bfloat> %va) { 569; CHECK-LABEL: vfptoui_nxv16bf16_nxv16i8: 570; CHECK: # %bb.0: 571; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 572; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 573; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v16 574; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma 575; CHECK-NEXT: vnsrl.wi v8, v12, 0 576; CHECK-NEXT: ret 577 %evec = fptoui <vscale x 16 x bfloat> %va to <vscale x 16 x i8> 578 ret <vscale x 16 x i8> %evec 579} 580 581define <vscale x 16 x i16> @vfptosi_nxv16bf16_nxv16i16(<vscale x 16 x bfloat> %va) { 582; CHECK-LABEL: vfptosi_nxv16bf16_nxv16i16: 583; CHECK: # %bb.0: 584; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 585; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 586; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v16 587; CHECK-NEXT: ret 588 %evec = fptosi <vscale x 16 x bfloat> %va to <vscale x 16 x i16> 589 ret <vscale x 16 x i16> %evec 590} 591 592define <vscale x 16 x i16> @vfptoui_nxv16bf16_nxv16i16(<vscale x 16 x bfloat> %va) { 593; CHECK-LABEL: vfptoui_nxv16bf16_nxv16i16: 594; CHECK: # %bb.0: 595; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 596; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 597; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v16 598; CHECK-NEXT: ret 599 %evec = fptoui <vscale x 16 x bfloat> %va to <vscale x 16 x i16> 600 ret <vscale x 16 x i16> %evec 601} 602 603define <vscale x 16 x i32> @vfptosi_nxv16bf16_nxv16i32(<vscale x 16 x bfloat> %va) { 604; CHECK-LABEL: vfptosi_nxv16bf16_nxv16i32: 605; CHECK: # %bb.0: 606; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 607; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 608; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma 609; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v16 610; CHECK-NEXT: ret 611 %evec = fptosi <vscale x 16 x bfloat> %va to <vscale x 16 x i32> 612 ret <vscale x 16 x i32> %evec 613} 614 615define <vscale x 16 x i32> @vfptoui_nxv16bf16_nxv16i32(<vscale x 16 x bfloat> %va) { 616; CHECK-LABEL: vfptoui_nxv16bf16_nxv16i32: 617; CHECK: # %bb.0: 618; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 619; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 620; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma 621; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v16 622; CHECK-NEXT: ret 623 %evec = fptoui <vscale x 16 x bfloat> %va to <vscale x 16 x i32> 624 ret <vscale x 16 x i32> %evec 625} 626 627define <vscale x 32 x i1> @vfptosi_nxv32bf16_nxv32i1(<vscale x 32 x bfloat> %va) { 628; CHECK-LABEL: vfptosi_nxv32bf16_nxv32i1: 629; CHECK: # %bb.0: 630; CHECK-NEXT: csrr a0, vlenb 631; CHECK-NEXT: vsetvli a1, zero, e16, m4, ta, ma 632; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12 633; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8 634; CHECK-NEXT: srli a0, a0, 2 635; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v16 636; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v24 637; CHECK-NEXT: add a1, a0, a0 638; CHECK-NEXT: vand.vi v8, v8, 1 639; CHECK-NEXT: vand.vi v12, v12, 1 640; CHECK-NEXT: vmsne.vi v16, v8, 0 641; CHECK-NEXT: vmsne.vi v0, v12, 0 642; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma 643; CHECK-NEXT: vslideup.vx v0, v16, a0 644; CHECK-NEXT: ret 645 %evec = fptosi <vscale x 32 x bfloat> %va to <vscale x 32 x i1> 646 ret <vscale x 32 x i1> %evec 647} 648 649define <vscale x 32 x i1> @vfptoui_nxv32bf16_nxv32i1(<vscale x 32 x bfloat> %va) { 650; CHECK-LABEL: vfptoui_nxv32bf16_nxv32i1: 651; CHECK: # %bb.0: 652; CHECK-NEXT: csrr a0, vlenb 653; CHECK-NEXT: vsetvli a1, zero, e16, m4, ta, ma 654; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12 655; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8 656; CHECK-NEXT: srli a0, a0, 2 657; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v16 658; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v24 659; CHECK-NEXT: add a1, a0, a0 660; CHECK-NEXT: vand.vi v8, v8, 1 661; CHECK-NEXT: vand.vi v12, v12, 1 662; CHECK-NEXT: vmsne.vi v16, v8, 0 663; CHECK-NEXT: vmsne.vi v0, v12, 0 664; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma 665; CHECK-NEXT: vslideup.vx v0, v16, a0 666; CHECK-NEXT: ret 667 %evec = fptoui <vscale x 32 x bfloat> %va to <vscale x 32 x i1> 668 ret <vscale x 32 x i1> %evec 669} 670 671define <vscale x 32 x i8> @vfptosi_nxv32bf16_nxv32i8(<vscale x 32 x bfloat> %va) { 672; CHECK-LABEL: vfptosi_nxv32bf16_nxv32i8: 673; CHECK: # %bb.0: 674; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 675; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 676; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v12 677; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v16 678; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma 679; CHECK-NEXT: vnsrl.wi v8, v12, 0 680; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma 681; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v24 682; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma 683; CHECK-NEXT: vnsrl.wi v10, v12, 0 684; CHECK-NEXT: ret 685 %evec = fptosi <vscale x 32 x bfloat> %va to <vscale x 32 x i8> 686 ret <vscale x 32 x i8> %evec 687} 688 689define <vscale x 32 x i8> @vfptoui_nxv32bf16_nxv32i8(<vscale x 32 x bfloat> %va) { 690; CHECK-LABEL: vfptoui_nxv32bf16_nxv32i8: 691; CHECK: # %bb.0: 692; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 693; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 694; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v12 695; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v16 696; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma 697; CHECK-NEXT: vnsrl.wi v8, v12, 0 698; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma 699; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v24 700; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma 701; CHECK-NEXT: vnsrl.wi v10, v12, 0 702; CHECK-NEXT: ret 703 %evec = fptoui <vscale x 32 x bfloat> %va to <vscale x 32 x i8> 704 ret <vscale x 32 x i8> %evec 705} 706 707define <vscale x 32 x i16> @vfptosi_nxv32bf16_nxv32i16(<vscale x 32 x bfloat> %va) { 708; CHECK-LABEL: vfptosi_nxv32bf16_nxv32i16: 709; CHECK: # %bb.0: 710; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 711; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 712; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v16 713; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12 714; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v16 715; CHECK-NEXT: ret 716 %evec = fptosi <vscale x 32 x bfloat> %va to <vscale x 32 x i16> 717 ret <vscale x 32 x i16> %evec 718} 719 720define <vscale x 32 x i16> @vfptoui_nxv32bf16_nxv32i16(<vscale x 32 x bfloat> %va) { 721; CHECK-LABEL: vfptoui_nxv32bf16_nxv32i16: 722; CHECK: # %bb.0: 723; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 724; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8 725; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v16 726; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12 727; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v16 728; CHECK-NEXT: ret 729 %evec = fptoui <vscale x 32 x bfloat> %va to <vscale x 32 x i16> 730 ret <vscale x 32 x i16> %evec 731} 732 733define <vscale x 1 x i1> @vfptosi_nxv1f16_nxv1i1(<vscale x 1 x half> %va) { 734; ZVFH-LABEL: vfptosi_nxv1f16_nxv1i1: 735; ZVFH: # %bb.0: 736; ZVFH-NEXT: vsetvli a0, zero, e8, mf8, ta, ma 737; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 738; ZVFH-NEXT: vand.vi v8, v9, 1 739; ZVFH-NEXT: vmsne.vi v0, v8, 0 740; ZVFH-NEXT: ret 741; 742; ZVFHMIN-LABEL: vfptosi_nxv1f16_nxv1i1: 743; ZVFHMIN: # %bb.0: 744; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 745; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 746; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9 747; ZVFHMIN-NEXT: vand.vi v8, v8, 1 748; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 749; ZVFHMIN-NEXT: ret 750 %evec = fptosi <vscale x 1 x half> %va to <vscale x 1 x i1> 751 ret <vscale x 1 x i1> %evec 752} 753 754define <vscale x 1 x i7> @vfptosi_nxv1f16_nxv1i7(<vscale x 1 x half> %va) { 755; ZVFH-LABEL: vfptosi_nxv1f16_nxv1i7: 756; ZVFH: # %bb.0: 757; ZVFH-NEXT: vsetvli a0, zero, e8, mf8, ta, ma 758; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 759; ZVFH-NEXT: vmv1r.v v8, v9 760; ZVFH-NEXT: ret 761; 762; ZVFHMIN-LABEL: vfptosi_nxv1f16_nxv1i7: 763; ZVFHMIN: # %bb.0: 764; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 765; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 766; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9 767; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 768; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0 769; ZVFHMIN-NEXT: ret 770 %evec = fptosi <vscale x 1 x half> %va to <vscale x 1 x i7> 771 ret <vscale x 1 x i7> %evec 772} 773 774define <vscale x 1 x i7> @vfptoui_nxv1f16_nxv1i7(<vscale x 1 x half> %va) { 775; ZVFH-LABEL: vfptoui_nxv1f16_nxv1i7: 776; ZVFH: # %bb.0: 777; ZVFH-NEXT: vsetvli a0, zero, e8, mf8, ta, ma 778; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 779; ZVFH-NEXT: vmv1r.v v8, v9 780; ZVFH-NEXT: ret 781; 782; ZVFHMIN-LABEL: vfptoui_nxv1f16_nxv1i7: 783; ZVFHMIN: # %bb.0: 784; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 785; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 786; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9 787; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 788; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0 789; ZVFHMIN-NEXT: ret 790 %evec = fptoui <vscale x 1 x half> %va to <vscale x 1 x i7> 791 ret <vscale x 1 x i7> %evec 792} 793 794define <vscale x 1 x i1> @vfptoui_nxv1f16_nxv1i1(<vscale x 1 x half> %va) { 795; ZVFH-LABEL: vfptoui_nxv1f16_nxv1i1: 796; ZVFH: # %bb.0: 797; ZVFH-NEXT: vsetvli a0, zero, e8, mf8, ta, ma 798; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8 799; ZVFH-NEXT: vand.vi v8, v9, 1 800; ZVFH-NEXT: vmsne.vi v0, v8, 0 801; ZVFH-NEXT: ret 802; 803; ZVFHMIN-LABEL: vfptoui_nxv1f16_nxv1i1: 804; ZVFHMIN: # %bb.0: 805; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 806; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 807; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9 808; ZVFHMIN-NEXT: vand.vi v8, v8, 1 809; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 810; ZVFHMIN-NEXT: ret 811 %evec = fptoui <vscale x 1 x half> %va to <vscale x 1 x i1> 812 ret <vscale x 1 x i1> %evec 813} 814 815define <vscale x 1 x i8> @vfptosi_nxv1f16_nxv1i8(<vscale x 1 x half> %va) { 816; ZVFH-LABEL: vfptosi_nxv1f16_nxv1i8: 817; ZVFH: # %bb.0: 818; ZVFH-NEXT: vsetvli a0, zero, e8, mf8, ta, ma 819; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 820; ZVFH-NEXT: vmv1r.v v8, v9 821; ZVFH-NEXT: ret 822; 823; ZVFHMIN-LABEL: vfptosi_nxv1f16_nxv1i8: 824; ZVFHMIN: # %bb.0: 825; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 826; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 827; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9 828; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 829; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0 830; ZVFHMIN-NEXT: ret 831 %evec = fptosi <vscale x 1 x half> %va to <vscale x 1 x i8> 832 ret <vscale x 1 x i8> %evec 833} 834 835define <vscale x 1 x i8> @vfptoui_nxv1f16_nxv1i8(<vscale x 1 x half> %va) { 836; ZVFH-LABEL: vfptoui_nxv1f16_nxv1i8: 837; ZVFH: # %bb.0: 838; ZVFH-NEXT: vsetvli a0, zero, e8, mf8, ta, ma 839; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8 840; ZVFH-NEXT: vmv1r.v v8, v9 841; ZVFH-NEXT: ret 842; 843; ZVFHMIN-LABEL: vfptoui_nxv1f16_nxv1i8: 844; ZVFHMIN: # %bb.0: 845; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 846; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 847; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9 848; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 849; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0 850; ZVFHMIN-NEXT: ret 851 %evec = fptoui <vscale x 1 x half> %va to <vscale x 1 x i8> 852 ret <vscale x 1 x i8> %evec 853} 854 855define <vscale x 1 x i16> @vfptosi_nxv1f16_nxv1i16(<vscale x 1 x half> %va) { 856; ZVFH-LABEL: vfptosi_nxv1f16_nxv1i16: 857; ZVFH: # %bb.0: 858; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 859; ZVFH-NEXT: vfcvt.rtz.x.f.v v8, v8 860; ZVFH-NEXT: ret 861; 862; ZVFHMIN-LABEL: vfptosi_nxv1f16_nxv1i16: 863; ZVFHMIN: # %bb.0: 864; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 865; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 866; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9 867; ZVFHMIN-NEXT: ret 868 %evec = fptosi <vscale x 1 x half> %va to <vscale x 1 x i16> 869 ret <vscale x 1 x i16> %evec 870} 871 872define <vscale x 1 x i16> @vfptoui_nxv1f16_nxv1i16(<vscale x 1 x half> %va) { 873; ZVFH-LABEL: vfptoui_nxv1f16_nxv1i16: 874; ZVFH: # %bb.0: 875; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 876; ZVFH-NEXT: vfcvt.rtz.xu.f.v v8, v8 877; ZVFH-NEXT: ret 878; 879; ZVFHMIN-LABEL: vfptoui_nxv1f16_nxv1i16: 880; ZVFHMIN: # %bb.0: 881; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 882; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 883; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9 884; ZVFHMIN-NEXT: ret 885 %evec = fptoui <vscale x 1 x half> %va to <vscale x 1 x i16> 886 ret <vscale x 1 x i16> %evec 887} 888 889define <vscale x 1 x i32> @vfptosi_nxv1f16_nxv1i32(<vscale x 1 x half> %va) { 890; ZVFH-LABEL: vfptosi_nxv1f16_nxv1i32: 891; ZVFH: # %bb.0: 892; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 893; ZVFH-NEXT: vfwcvt.rtz.x.f.v v9, v8 894; ZVFH-NEXT: vmv1r.v v8, v9 895; ZVFH-NEXT: ret 896; 897; ZVFHMIN-LABEL: vfptosi_nxv1f16_nxv1i32: 898; ZVFHMIN: # %bb.0: 899; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 900; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 901; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma 902; ZVFHMIN-NEXT: vfcvt.rtz.x.f.v v8, v9 903; ZVFHMIN-NEXT: ret 904 %evec = fptosi <vscale x 1 x half> %va to <vscale x 1 x i32> 905 ret <vscale x 1 x i32> %evec 906} 907 908define <vscale x 1 x i32> @vfptoui_nxv1f16_nxv1i32(<vscale x 1 x half> %va) { 909; ZVFH-LABEL: vfptoui_nxv1f16_nxv1i32: 910; ZVFH: # %bb.0: 911; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 912; ZVFH-NEXT: vfwcvt.rtz.xu.f.v v9, v8 913; ZVFH-NEXT: vmv1r.v v8, v9 914; ZVFH-NEXT: ret 915; 916; ZVFHMIN-LABEL: vfptoui_nxv1f16_nxv1i32: 917; ZVFHMIN: # %bb.0: 918; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 919; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 920; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma 921; ZVFHMIN-NEXT: vfcvt.rtz.xu.f.v v8, v9 922; ZVFHMIN-NEXT: ret 923 %evec = fptoui <vscale x 1 x half> %va to <vscale x 1 x i32> 924 ret <vscale x 1 x i32> %evec 925} 926 927define <vscale x 1 x i64> @vfptosi_nxv1f16_nxv1i64(<vscale x 1 x half> %va) { 928; CHECK-LABEL: vfptosi_nxv1f16_nxv1i64: 929; CHECK: # %bb.0: 930; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 931; CHECK-NEXT: vfwcvt.f.f.v v9, v8 932; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma 933; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v9 934; CHECK-NEXT: ret 935 %evec = fptosi <vscale x 1 x half> %va to <vscale x 1 x i64> 936 ret <vscale x 1 x i64> %evec 937} 938 939define <vscale x 1 x i64> @vfptoui_nxv1f16_nxv1i64(<vscale x 1 x half> %va) { 940; CHECK-LABEL: vfptoui_nxv1f16_nxv1i64: 941; CHECK: # %bb.0: 942; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 943; CHECK-NEXT: vfwcvt.f.f.v v9, v8 944; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma 945; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v9 946; CHECK-NEXT: ret 947 %evec = fptoui <vscale x 1 x half> %va to <vscale x 1 x i64> 948 ret <vscale x 1 x i64> %evec 949} 950 951define <vscale x 2 x i1> @vfptosi_nxv2f16_nxv2i1(<vscale x 2 x half> %va) { 952; ZVFH-LABEL: vfptosi_nxv2f16_nxv2i1: 953; ZVFH: # %bb.0: 954; ZVFH-NEXT: vsetvli a0, zero, e8, mf4, ta, ma 955; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 956; ZVFH-NEXT: vand.vi v8, v9, 1 957; ZVFH-NEXT: vmsne.vi v0, v8, 0 958; ZVFH-NEXT: ret 959; 960; ZVFHMIN-LABEL: vfptosi_nxv2f16_nxv2i1: 961; ZVFHMIN: # %bb.0: 962; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 963; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 964; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9 965; ZVFHMIN-NEXT: vand.vi v8, v8, 1 966; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 967; ZVFHMIN-NEXT: ret 968 %evec = fptosi <vscale x 2 x half> %va to <vscale x 2 x i1> 969 ret <vscale x 2 x i1> %evec 970} 971 972define <vscale x 2 x i1> @vfptoui_nxv2f16_nxv2i1(<vscale x 2 x half> %va) { 973; ZVFH-LABEL: vfptoui_nxv2f16_nxv2i1: 974; ZVFH: # %bb.0: 975; ZVFH-NEXT: vsetvli a0, zero, e8, mf4, ta, ma 976; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8 977; ZVFH-NEXT: vand.vi v8, v9, 1 978; ZVFH-NEXT: vmsne.vi v0, v8, 0 979; ZVFH-NEXT: ret 980; 981; ZVFHMIN-LABEL: vfptoui_nxv2f16_nxv2i1: 982; ZVFHMIN: # %bb.0: 983; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 984; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 985; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9 986; ZVFHMIN-NEXT: vand.vi v8, v8, 1 987; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 988; ZVFHMIN-NEXT: ret 989 %evec = fptoui <vscale x 2 x half> %va to <vscale x 2 x i1> 990 ret <vscale x 2 x i1> %evec 991} 992 993define <vscale x 2 x i8> @vfptosi_nxv2f16_nxv2i8(<vscale x 2 x half> %va) { 994; ZVFH-LABEL: vfptosi_nxv2f16_nxv2i8: 995; ZVFH: # %bb.0: 996; ZVFH-NEXT: vsetvli a0, zero, e8, mf4, ta, ma 997; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 998; ZVFH-NEXT: vmv1r.v v8, v9 999; ZVFH-NEXT: ret 1000; 1001; ZVFHMIN-LABEL: vfptosi_nxv2f16_nxv2i8: 1002; ZVFHMIN: # %bb.0: 1003; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1004; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 1005; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9 1006; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf4, ta, ma 1007; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0 1008; ZVFHMIN-NEXT: ret 1009 %evec = fptosi <vscale x 2 x half> %va to <vscale x 2 x i8> 1010 ret <vscale x 2 x i8> %evec 1011} 1012 1013define <vscale x 2 x i8> @vfptoui_nxv2f16_nxv2i8(<vscale x 2 x half> %va) { 1014; ZVFH-LABEL: vfptoui_nxv2f16_nxv2i8: 1015; ZVFH: # %bb.0: 1016; ZVFH-NEXT: vsetvli a0, zero, e8, mf4, ta, ma 1017; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8 1018; ZVFH-NEXT: vmv1r.v v8, v9 1019; ZVFH-NEXT: ret 1020; 1021; ZVFHMIN-LABEL: vfptoui_nxv2f16_nxv2i8: 1022; ZVFHMIN: # %bb.0: 1023; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1024; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 1025; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9 1026; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf4, ta, ma 1027; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0 1028; ZVFHMIN-NEXT: ret 1029 %evec = fptoui <vscale x 2 x half> %va to <vscale x 2 x i8> 1030 ret <vscale x 2 x i8> %evec 1031} 1032 1033define <vscale x 2 x i16> @vfptosi_nxv2f16_nxv2i16(<vscale x 2 x half> %va) { 1034; ZVFH-LABEL: vfptosi_nxv2f16_nxv2i16: 1035; ZVFH: # %bb.0: 1036; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1037; ZVFH-NEXT: vfcvt.rtz.x.f.v v8, v8 1038; ZVFH-NEXT: ret 1039; 1040; ZVFHMIN-LABEL: vfptosi_nxv2f16_nxv2i16: 1041; ZVFHMIN: # %bb.0: 1042; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1043; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 1044; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9 1045; ZVFHMIN-NEXT: ret 1046 %evec = fptosi <vscale x 2 x half> %va to <vscale x 2 x i16> 1047 ret <vscale x 2 x i16> %evec 1048} 1049 1050define <vscale x 2 x i16> @vfptoui_nxv2f16_nxv2i16(<vscale x 2 x half> %va) { 1051; ZVFH-LABEL: vfptoui_nxv2f16_nxv2i16: 1052; ZVFH: # %bb.0: 1053; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1054; ZVFH-NEXT: vfcvt.rtz.xu.f.v v8, v8 1055; ZVFH-NEXT: ret 1056; 1057; ZVFHMIN-LABEL: vfptoui_nxv2f16_nxv2i16: 1058; ZVFHMIN: # %bb.0: 1059; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1060; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 1061; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9 1062; ZVFHMIN-NEXT: ret 1063 %evec = fptoui <vscale x 2 x half> %va to <vscale x 2 x i16> 1064 ret <vscale x 2 x i16> %evec 1065} 1066 1067define <vscale x 2 x i32> @vfptosi_nxv2f16_nxv2i32(<vscale x 2 x half> %va) { 1068; ZVFH-LABEL: vfptosi_nxv2f16_nxv2i32: 1069; ZVFH: # %bb.0: 1070; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1071; ZVFH-NEXT: vfwcvt.rtz.x.f.v v9, v8 1072; ZVFH-NEXT: vmv1r.v v8, v9 1073; ZVFH-NEXT: ret 1074; 1075; ZVFHMIN-LABEL: vfptosi_nxv2f16_nxv2i32: 1076; ZVFHMIN: # %bb.0: 1077; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1078; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 1079; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma 1080; ZVFHMIN-NEXT: vfcvt.rtz.x.f.v v8, v9 1081; ZVFHMIN-NEXT: ret 1082 %evec = fptosi <vscale x 2 x half> %va to <vscale x 2 x i32> 1083 ret <vscale x 2 x i32> %evec 1084} 1085 1086define <vscale x 2 x i32> @vfptoui_nxv2f16_nxv2i32(<vscale x 2 x half> %va) { 1087; ZVFH-LABEL: vfptoui_nxv2f16_nxv2i32: 1088; ZVFH: # %bb.0: 1089; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1090; ZVFH-NEXT: vfwcvt.rtz.xu.f.v v9, v8 1091; ZVFH-NEXT: vmv1r.v v8, v9 1092; ZVFH-NEXT: ret 1093; 1094; ZVFHMIN-LABEL: vfptoui_nxv2f16_nxv2i32: 1095; ZVFHMIN: # %bb.0: 1096; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1097; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8 1098; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma 1099; ZVFHMIN-NEXT: vfcvt.rtz.xu.f.v v8, v9 1100; ZVFHMIN-NEXT: ret 1101 %evec = fptoui <vscale x 2 x half> %va to <vscale x 2 x i32> 1102 ret <vscale x 2 x i32> %evec 1103} 1104 1105define <vscale x 2 x i64> @vfptosi_nxv2f16_nxv2i64(<vscale x 2 x half> %va) { 1106; CHECK-LABEL: vfptosi_nxv2f16_nxv2i64: 1107; CHECK: # %bb.0: 1108; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1109; CHECK-NEXT: vfwcvt.f.f.v v10, v8 1110; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma 1111; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v10 1112; CHECK-NEXT: ret 1113 %evec = fptosi <vscale x 2 x half> %va to <vscale x 2 x i64> 1114 ret <vscale x 2 x i64> %evec 1115} 1116 1117define <vscale x 2 x i64> @vfptoui_nxv2f16_nxv2i64(<vscale x 2 x half> %va) { 1118; CHECK-LABEL: vfptoui_nxv2f16_nxv2i64: 1119; CHECK: # %bb.0: 1120; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1121; CHECK-NEXT: vfwcvt.f.f.v v10, v8 1122; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma 1123; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v10 1124; CHECK-NEXT: ret 1125 %evec = fptoui <vscale x 2 x half> %va to <vscale x 2 x i64> 1126 ret <vscale x 2 x i64> %evec 1127} 1128 1129define <vscale x 4 x i1> @vfptosi_nxv4f16_nxv4i1(<vscale x 4 x half> %va) { 1130; ZVFH-LABEL: vfptosi_nxv4f16_nxv4i1: 1131; ZVFH: # %bb.0: 1132; ZVFH-NEXT: vsetvli a0, zero, e8, mf2, ta, ma 1133; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 1134; ZVFH-NEXT: vand.vi v8, v9, 1 1135; ZVFH-NEXT: vmsne.vi v0, v8, 0 1136; ZVFH-NEXT: ret 1137; 1138; ZVFHMIN-LABEL: vfptosi_nxv4f16_nxv4i1: 1139; ZVFHMIN: # %bb.0: 1140; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1141; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1142; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v10 1143; ZVFHMIN-NEXT: vand.vi v8, v8, 1 1144; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 1145; ZVFHMIN-NEXT: ret 1146 %evec = fptosi <vscale x 4 x half> %va to <vscale x 4 x i1> 1147 ret <vscale x 4 x i1> %evec 1148} 1149 1150define <vscale x 4 x i1> @vfptoui_nxv4f16_nxv4i1(<vscale x 4 x half> %va) { 1151; ZVFH-LABEL: vfptoui_nxv4f16_nxv4i1: 1152; ZVFH: # %bb.0: 1153; ZVFH-NEXT: vsetvli a0, zero, e8, mf2, ta, ma 1154; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8 1155; ZVFH-NEXT: vand.vi v8, v9, 1 1156; ZVFH-NEXT: vmsne.vi v0, v8, 0 1157; ZVFH-NEXT: ret 1158; 1159; ZVFHMIN-LABEL: vfptoui_nxv4f16_nxv4i1: 1160; ZVFHMIN: # %bb.0: 1161; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1162; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1163; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v10 1164; ZVFHMIN-NEXT: vand.vi v8, v8, 1 1165; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 1166; ZVFHMIN-NEXT: ret 1167 %evec = fptoui <vscale x 4 x half> %va to <vscale x 4 x i1> 1168 ret <vscale x 4 x i1> %evec 1169} 1170 1171define <vscale x 4 x i8> @vfptosi_nxv4f16_nxv4i8(<vscale x 4 x half> %va) { 1172; ZVFH-LABEL: vfptosi_nxv4f16_nxv4i8: 1173; ZVFH: # %bb.0: 1174; ZVFH-NEXT: vsetvli a0, zero, e8, mf2, ta, ma 1175; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8 1176; ZVFH-NEXT: vmv1r.v v8, v9 1177; ZVFH-NEXT: ret 1178; 1179; ZVFHMIN-LABEL: vfptosi_nxv4f16_nxv4i8: 1180; ZVFHMIN: # %bb.0: 1181; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1182; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1183; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v10 1184; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf2, ta, ma 1185; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0 1186; ZVFHMIN-NEXT: ret 1187 %evec = fptosi <vscale x 4 x half> %va to <vscale x 4 x i8> 1188 ret <vscale x 4 x i8> %evec 1189} 1190 1191define <vscale x 4 x i8> @vfptoui_nxv4f16_nxv4i8(<vscale x 4 x half> %va) { 1192; ZVFH-LABEL: vfptoui_nxv4f16_nxv4i8: 1193; ZVFH: # %bb.0: 1194; ZVFH-NEXT: vsetvli a0, zero, e8, mf2, ta, ma 1195; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8 1196; ZVFH-NEXT: vmv1r.v v8, v9 1197; ZVFH-NEXT: ret 1198; 1199; ZVFHMIN-LABEL: vfptoui_nxv4f16_nxv4i8: 1200; ZVFHMIN: # %bb.0: 1201; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1202; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1203; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v10 1204; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf2, ta, ma 1205; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0 1206; ZVFHMIN-NEXT: ret 1207 %evec = fptoui <vscale x 4 x half> %va to <vscale x 4 x i8> 1208 ret <vscale x 4 x i8> %evec 1209} 1210 1211define <vscale x 4 x i16> @vfptosi_nxv4f16_nxv4i16(<vscale x 4 x half> %va) { 1212; ZVFH-LABEL: vfptosi_nxv4f16_nxv4i16: 1213; ZVFH: # %bb.0: 1214; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1215; ZVFH-NEXT: vfcvt.rtz.x.f.v v8, v8 1216; ZVFH-NEXT: ret 1217; 1218; ZVFHMIN-LABEL: vfptosi_nxv4f16_nxv4i16: 1219; ZVFHMIN: # %bb.0: 1220; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1221; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1222; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v10 1223; ZVFHMIN-NEXT: ret 1224 %evec = fptosi <vscale x 4 x half> %va to <vscale x 4 x i16> 1225 ret <vscale x 4 x i16> %evec 1226} 1227 1228define <vscale x 4 x i16> @vfptoui_nxv4f16_nxv4i16(<vscale x 4 x half> %va) { 1229; ZVFH-LABEL: vfptoui_nxv4f16_nxv4i16: 1230; ZVFH: # %bb.0: 1231; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1232; ZVFH-NEXT: vfcvt.rtz.xu.f.v v8, v8 1233; ZVFH-NEXT: ret 1234; 1235; ZVFHMIN-LABEL: vfptoui_nxv4f16_nxv4i16: 1236; ZVFHMIN: # %bb.0: 1237; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1238; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1239; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v10 1240; ZVFHMIN-NEXT: ret 1241 %evec = fptoui <vscale x 4 x half> %va to <vscale x 4 x i16> 1242 ret <vscale x 4 x i16> %evec 1243} 1244 1245define <vscale x 4 x i32> @vfptosi_nxv4f16_nxv4i32(<vscale x 4 x half> %va) { 1246; ZVFH-LABEL: vfptosi_nxv4f16_nxv4i32: 1247; ZVFH: # %bb.0: 1248; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1249; ZVFH-NEXT: vfwcvt.rtz.x.f.v v10, v8 1250; ZVFH-NEXT: vmv2r.v v8, v10 1251; ZVFH-NEXT: ret 1252; 1253; ZVFHMIN-LABEL: vfptosi_nxv4f16_nxv4i32: 1254; ZVFHMIN: # %bb.0: 1255; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1256; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1257; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma 1258; ZVFHMIN-NEXT: vfcvt.rtz.x.f.v v8, v10 1259; ZVFHMIN-NEXT: ret 1260 %evec = fptosi <vscale x 4 x half> %va to <vscale x 4 x i32> 1261 ret <vscale x 4 x i32> %evec 1262} 1263 1264define <vscale x 4 x i32> @vfptoui_nxv4f16_nxv4i32(<vscale x 4 x half> %va) { 1265; ZVFH-LABEL: vfptoui_nxv4f16_nxv4i32: 1266; ZVFH: # %bb.0: 1267; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1268; ZVFH-NEXT: vfwcvt.rtz.xu.f.v v10, v8 1269; ZVFH-NEXT: vmv2r.v v8, v10 1270; ZVFH-NEXT: ret 1271; 1272; ZVFHMIN-LABEL: vfptoui_nxv4f16_nxv4i32: 1273; ZVFHMIN: # %bb.0: 1274; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1275; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8 1276; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma 1277; ZVFHMIN-NEXT: vfcvt.rtz.xu.f.v v8, v10 1278; ZVFHMIN-NEXT: ret 1279 %evec = fptoui <vscale x 4 x half> %va to <vscale x 4 x i32> 1280 ret <vscale x 4 x i32> %evec 1281} 1282 1283define <vscale x 4 x i64> @vfptosi_nxv4f16_nxv4i64(<vscale x 4 x half> %va) { 1284; CHECK-LABEL: vfptosi_nxv4f16_nxv4i64: 1285; CHECK: # %bb.0: 1286; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1287; CHECK-NEXT: vfwcvt.f.f.v v12, v8 1288; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma 1289; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v12 1290; CHECK-NEXT: ret 1291 %evec = fptosi <vscale x 4 x half> %va to <vscale x 4 x i64> 1292 ret <vscale x 4 x i64> %evec 1293} 1294 1295define <vscale x 4 x i64> @vfptoui_nxv4f16_nxv4i64(<vscale x 4 x half> %va) { 1296; CHECK-LABEL: vfptoui_nxv4f16_nxv4i64: 1297; CHECK: # %bb.0: 1298; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 1299; CHECK-NEXT: vfwcvt.f.f.v v12, v8 1300; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma 1301; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v12 1302; CHECK-NEXT: ret 1303 %evec = fptoui <vscale x 4 x half> %va to <vscale x 4 x i64> 1304 ret <vscale x 4 x i64> %evec 1305} 1306 1307define <vscale x 8 x i1> @vfptosi_nxv8f16_nxv8i1(<vscale x 8 x half> %va) { 1308; ZVFH-LABEL: vfptosi_nxv8f16_nxv8i1: 1309; ZVFH: # %bb.0: 1310; ZVFH-NEXT: vsetvli a0, zero, e8, m1, ta, ma 1311; ZVFH-NEXT: vfncvt.rtz.x.f.w v10, v8 1312; ZVFH-NEXT: vand.vi v8, v10, 1 1313; ZVFH-NEXT: vmsne.vi v0, v8, 0 1314; ZVFH-NEXT: ret 1315; 1316; ZVFHMIN-LABEL: vfptosi_nxv8f16_nxv8i1: 1317; ZVFHMIN: # %bb.0: 1318; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1319; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 1320; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v12 1321; ZVFHMIN-NEXT: vand.vi v8, v8, 1 1322; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 1323; ZVFHMIN-NEXT: ret 1324 %evec = fptosi <vscale x 8 x half> %va to <vscale x 8 x i1> 1325 ret <vscale x 8 x i1> %evec 1326} 1327 1328define <vscale x 8 x i1> @vfptoui_nxv8f16_nxv8i1(<vscale x 8 x half> %va) { 1329; ZVFH-LABEL: vfptoui_nxv8f16_nxv8i1: 1330; ZVFH: # %bb.0: 1331; ZVFH-NEXT: vsetvli a0, zero, e8, m1, ta, ma 1332; ZVFH-NEXT: vfncvt.rtz.xu.f.w v10, v8 1333; ZVFH-NEXT: vand.vi v8, v10, 1 1334; ZVFH-NEXT: vmsne.vi v0, v8, 0 1335; ZVFH-NEXT: ret 1336; 1337; ZVFHMIN-LABEL: vfptoui_nxv8f16_nxv8i1: 1338; ZVFHMIN: # %bb.0: 1339; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1340; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 1341; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v12 1342; ZVFHMIN-NEXT: vand.vi v8, v8, 1 1343; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 1344; ZVFHMIN-NEXT: ret 1345 %evec = fptoui <vscale x 8 x half> %va to <vscale x 8 x i1> 1346 ret <vscale x 8 x i1> %evec 1347} 1348 1349define <vscale x 8 x i8> @vfptosi_nxv8f16_nxv8i8(<vscale x 8 x half> %va) { 1350; ZVFH-LABEL: vfptosi_nxv8f16_nxv8i8: 1351; ZVFH: # %bb.0: 1352; ZVFH-NEXT: vsetvli a0, zero, e8, m1, ta, ma 1353; ZVFH-NEXT: vfncvt.rtz.x.f.w v10, v8 1354; ZVFH-NEXT: vmv.v.v v8, v10 1355; ZVFH-NEXT: ret 1356; 1357; ZVFHMIN-LABEL: vfptosi_nxv8f16_nxv8i8: 1358; ZVFHMIN: # %bb.0: 1359; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1360; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 1361; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v10, v12 1362; ZVFHMIN-NEXT: vsetvli zero, zero, e8, m1, ta, ma 1363; ZVFHMIN-NEXT: vnsrl.wi v8, v10, 0 1364; ZVFHMIN-NEXT: ret 1365 %evec = fptosi <vscale x 8 x half> %va to <vscale x 8 x i8> 1366 ret <vscale x 8 x i8> %evec 1367} 1368 1369define <vscale x 8 x i8> @vfptoui_nxv8f16_nxv8i8(<vscale x 8 x half> %va) { 1370; ZVFH-LABEL: vfptoui_nxv8f16_nxv8i8: 1371; ZVFH: # %bb.0: 1372; ZVFH-NEXT: vsetvli a0, zero, e8, m1, ta, ma 1373; ZVFH-NEXT: vfncvt.rtz.xu.f.w v10, v8 1374; ZVFH-NEXT: vmv.v.v v8, v10 1375; ZVFH-NEXT: ret 1376; 1377; ZVFHMIN-LABEL: vfptoui_nxv8f16_nxv8i8: 1378; ZVFHMIN: # %bb.0: 1379; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1380; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 1381; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v10, v12 1382; ZVFHMIN-NEXT: vsetvli zero, zero, e8, m1, ta, ma 1383; ZVFHMIN-NEXT: vnsrl.wi v8, v10, 0 1384; ZVFHMIN-NEXT: ret 1385 %evec = fptoui <vscale x 8 x half> %va to <vscale x 8 x i8> 1386 ret <vscale x 8 x i8> %evec 1387} 1388 1389define <vscale x 8 x i16> @vfptosi_nxv8f16_nxv8i16(<vscale x 8 x half> %va) { 1390; ZVFH-LABEL: vfptosi_nxv8f16_nxv8i16: 1391; ZVFH: # %bb.0: 1392; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1393; ZVFH-NEXT: vfcvt.rtz.x.f.v v8, v8 1394; ZVFH-NEXT: ret 1395; 1396; ZVFHMIN-LABEL: vfptosi_nxv8f16_nxv8i16: 1397; ZVFHMIN: # %bb.0: 1398; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1399; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 1400; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v12 1401; ZVFHMIN-NEXT: ret 1402 %evec = fptosi <vscale x 8 x half> %va to <vscale x 8 x i16> 1403 ret <vscale x 8 x i16> %evec 1404} 1405 1406define <vscale x 8 x i16> @vfptoui_nxv8f16_nxv8i16(<vscale x 8 x half> %va) { 1407; ZVFH-LABEL: vfptoui_nxv8f16_nxv8i16: 1408; ZVFH: # %bb.0: 1409; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1410; ZVFH-NEXT: vfcvt.rtz.xu.f.v v8, v8 1411; ZVFH-NEXT: ret 1412; 1413; ZVFHMIN-LABEL: vfptoui_nxv8f16_nxv8i16: 1414; ZVFHMIN: # %bb.0: 1415; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1416; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 1417; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v12 1418; ZVFHMIN-NEXT: ret 1419 %evec = fptoui <vscale x 8 x half> %va to <vscale x 8 x i16> 1420 ret <vscale x 8 x i16> %evec 1421} 1422 1423define <vscale x 8 x i32> @vfptosi_nxv8f16_nxv8i32(<vscale x 8 x half> %va) { 1424; ZVFH-LABEL: vfptosi_nxv8f16_nxv8i32: 1425; ZVFH: # %bb.0: 1426; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1427; ZVFH-NEXT: vfwcvt.rtz.x.f.v v12, v8 1428; ZVFH-NEXT: vmv4r.v v8, v12 1429; ZVFH-NEXT: ret 1430; 1431; ZVFHMIN-LABEL: vfptosi_nxv8f16_nxv8i32: 1432; ZVFHMIN: # %bb.0: 1433; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1434; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 1435; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma 1436; ZVFHMIN-NEXT: vfcvt.rtz.x.f.v v8, v12 1437; ZVFHMIN-NEXT: ret 1438 %evec = fptosi <vscale x 8 x half> %va to <vscale x 8 x i32> 1439 ret <vscale x 8 x i32> %evec 1440} 1441 1442define <vscale x 8 x i32> @vfptoui_nxv8f16_nxv8i32(<vscale x 8 x half> %va) { 1443; ZVFH-LABEL: vfptoui_nxv8f16_nxv8i32: 1444; ZVFH: # %bb.0: 1445; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1446; ZVFH-NEXT: vfwcvt.rtz.xu.f.v v12, v8 1447; ZVFH-NEXT: vmv4r.v v8, v12 1448; ZVFH-NEXT: ret 1449; 1450; ZVFHMIN-LABEL: vfptoui_nxv8f16_nxv8i32: 1451; ZVFHMIN: # %bb.0: 1452; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1453; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 1454; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma 1455; ZVFHMIN-NEXT: vfcvt.rtz.xu.f.v v8, v12 1456; ZVFHMIN-NEXT: ret 1457 %evec = fptoui <vscale x 8 x half> %va to <vscale x 8 x i32> 1458 ret <vscale x 8 x i32> %evec 1459} 1460 1461define <vscale x 8 x i64> @vfptosi_nxv8f16_nxv8i64(<vscale x 8 x half> %va) { 1462; CHECK-LABEL: vfptosi_nxv8f16_nxv8i64: 1463; CHECK: # %bb.0: 1464; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1465; CHECK-NEXT: vfwcvt.f.f.v v16, v8 1466; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma 1467; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v16 1468; CHECK-NEXT: ret 1469 %evec = fptosi <vscale x 8 x half> %va to <vscale x 8 x i64> 1470 ret <vscale x 8 x i64> %evec 1471} 1472 1473define <vscale x 8 x i64> @vfptoui_nxv8f16_nxv8i64(<vscale x 8 x half> %va) { 1474; CHECK-LABEL: vfptoui_nxv8f16_nxv8i64: 1475; CHECK: # %bb.0: 1476; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 1477; CHECK-NEXT: vfwcvt.f.f.v v16, v8 1478; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma 1479; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v16 1480; CHECK-NEXT: ret 1481 %evec = fptoui <vscale x 8 x half> %va to <vscale x 8 x i64> 1482 ret <vscale x 8 x i64> %evec 1483} 1484 1485define <vscale x 16 x i1> @vfptosi_nxv16f16_nxv16i1(<vscale x 16 x half> %va) { 1486; ZVFH-LABEL: vfptosi_nxv16f16_nxv16i1: 1487; ZVFH: # %bb.0: 1488; ZVFH-NEXT: vsetvli a0, zero, e8, m2, ta, ma 1489; ZVFH-NEXT: vfncvt.rtz.x.f.w v12, v8 1490; ZVFH-NEXT: vand.vi v8, v12, 1 1491; ZVFH-NEXT: vmsne.vi v0, v8, 0 1492; ZVFH-NEXT: ret 1493; 1494; ZVFHMIN-LABEL: vfptosi_nxv16f16_nxv16i1: 1495; ZVFHMIN: # %bb.0: 1496; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1497; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1498; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v16 1499; ZVFHMIN-NEXT: vand.vi v8, v8, 1 1500; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 1501; ZVFHMIN-NEXT: ret 1502 %evec = fptosi <vscale x 16 x half> %va to <vscale x 16 x i1> 1503 ret <vscale x 16 x i1> %evec 1504} 1505 1506define <vscale x 16 x i1> @vfptoui_nxv16f16_nxv16i1(<vscale x 16 x half> %va) { 1507; ZVFH-LABEL: vfptoui_nxv16f16_nxv16i1: 1508; ZVFH: # %bb.0: 1509; ZVFH-NEXT: vsetvli a0, zero, e8, m2, ta, ma 1510; ZVFH-NEXT: vfncvt.rtz.xu.f.w v12, v8 1511; ZVFH-NEXT: vand.vi v8, v12, 1 1512; ZVFH-NEXT: vmsne.vi v0, v8, 0 1513; ZVFH-NEXT: ret 1514; 1515; ZVFHMIN-LABEL: vfptoui_nxv16f16_nxv16i1: 1516; ZVFHMIN: # %bb.0: 1517; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1518; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1519; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v16 1520; ZVFHMIN-NEXT: vand.vi v8, v8, 1 1521; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0 1522; ZVFHMIN-NEXT: ret 1523 %evec = fptoui <vscale x 16 x half> %va to <vscale x 16 x i1> 1524 ret <vscale x 16 x i1> %evec 1525} 1526 1527define <vscale x 16 x i8> @vfptosi_nxv16f16_nxv16i8(<vscale x 16 x half> %va) { 1528; ZVFH-LABEL: vfptosi_nxv16f16_nxv16i8: 1529; ZVFH: # %bb.0: 1530; ZVFH-NEXT: vsetvli a0, zero, e8, m2, ta, ma 1531; ZVFH-NEXT: vfncvt.rtz.x.f.w v12, v8 1532; ZVFH-NEXT: vmv.v.v v8, v12 1533; ZVFH-NEXT: ret 1534; 1535; ZVFHMIN-LABEL: vfptosi_nxv16f16_nxv16i8: 1536; ZVFHMIN: # %bb.0: 1537; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1538; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1539; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v12, v16 1540; ZVFHMIN-NEXT: vsetvli zero, zero, e8, m2, ta, ma 1541; ZVFHMIN-NEXT: vnsrl.wi v8, v12, 0 1542; ZVFHMIN-NEXT: ret 1543 %evec = fptosi <vscale x 16 x half> %va to <vscale x 16 x i8> 1544 ret <vscale x 16 x i8> %evec 1545} 1546 1547define <vscale x 16 x i8> @vfptoui_nxv16f16_nxv16i8(<vscale x 16 x half> %va) { 1548; ZVFH-LABEL: vfptoui_nxv16f16_nxv16i8: 1549; ZVFH: # %bb.0: 1550; ZVFH-NEXT: vsetvli a0, zero, e8, m2, ta, ma 1551; ZVFH-NEXT: vfncvt.rtz.xu.f.w v12, v8 1552; ZVFH-NEXT: vmv.v.v v8, v12 1553; ZVFH-NEXT: ret 1554; 1555; ZVFHMIN-LABEL: vfptoui_nxv16f16_nxv16i8: 1556; ZVFHMIN: # %bb.0: 1557; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1558; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1559; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v12, v16 1560; ZVFHMIN-NEXT: vsetvli zero, zero, e8, m2, ta, ma 1561; ZVFHMIN-NEXT: vnsrl.wi v8, v12, 0 1562; ZVFHMIN-NEXT: ret 1563 %evec = fptoui <vscale x 16 x half> %va to <vscale x 16 x i8> 1564 ret <vscale x 16 x i8> %evec 1565} 1566 1567define <vscale x 16 x i16> @vfptosi_nxv16f16_nxv16i16(<vscale x 16 x half> %va) { 1568; ZVFH-LABEL: vfptosi_nxv16f16_nxv16i16: 1569; ZVFH: # %bb.0: 1570; ZVFH-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1571; ZVFH-NEXT: vfcvt.rtz.x.f.v v8, v8 1572; ZVFH-NEXT: ret 1573; 1574; ZVFHMIN-LABEL: vfptosi_nxv16f16_nxv16i16: 1575; ZVFHMIN: # %bb.0: 1576; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1577; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1578; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v16 1579; ZVFHMIN-NEXT: ret 1580 %evec = fptosi <vscale x 16 x half> %va to <vscale x 16 x i16> 1581 ret <vscale x 16 x i16> %evec 1582} 1583 1584define <vscale x 16 x i16> @vfptoui_nxv16f16_nxv16i16(<vscale x 16 x half> %va) { 1585; ZVFH-LABEL: vfptoui_nxv16f16_nxv16i16: 1586; ZVFH: # %bb.0: 1587; ZVFH-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1588; ZVFH-NEXT: vfcvt.rtz.xu.f.v v8, v8 1589; ZVFH-NEXT: ret 1590; 1591; ZVFHMIN-LABEL: vfptoui_nxv16f16_nxv16i16: 1592; ZVFHMIN: # %bb.0: 1593; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1594; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1595; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v16 1596; ZVFHMIN-NEXT: ret 1597 %evec = fptoui <vscale x 16 x half> %va to <vscale x 16 x i16> 1598 ret <vscale x 16 x i16> %evec 1599} 1600 1601define <vscale x 16 x i32> @vfptosi_nxv16f16_nxv16i32(<vscale x 16 x half> %va) { 1602; ZVFH-LABEL: vfptosi_nxv16f16_nxv16i32: 1603; ZVFH: # %bb.0: 1604; ZVFH-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1605; ZVFH-NEXT: vfwcvt.rtz.x.f.v v16, v8 1606; ZVFH-NEXT: vmv8r.v v8, v16 1607; ZVFH-NEXT: ret 1608; 1609; ZVFHMIN-LABEL: vfptosi_nxv16f16_nxv16i32: 1610; ZVFHMIN: # %bb.0: 1611; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1612; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1613; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma 1614; ZVFHMIN-NEXT: vfcvt.rtz.x.f.v v8, v16 1615; ZVFHMIN-NEXT: ret 1616 %evec = fptosi <vscale x 16 x half> %va to <vscale x 16 x i32> 1617 ret <vscale x 16 x i32> %evec 1618} 1619 1620define <vscale x 16 x i32> @vfptoui_nxv16f16_nxv16i32(<vscale x 16 x half> %va) { 1621; ZVFH-LABEL: vfptoui_nxv16f16_nxv16i32: 1622; ZVFH: # %bb.0: 1623; ZVFH-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1624; ZVFH-NEXT: vfwcvt.rtz.xu.f.v v16, v8 1625; ZVFH-NEXT: vmv8r.v v8, v16 1626; ZVFH-NEXT: ret 1627; 1628; ZVFHMIN-LABEL: vfptoui_nxv16f16_nxv16i32: 1629; ZVFHMIN: # %bb.0: 1630; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1631; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1632; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma 1633; ZVFHMIN-NEXT: vfcvt.rtz.xu.f.v v8, v16 1634; ZVFHMIN-NEXT: ret 1635 %evec = fptoui <vscale x 16 x half> %va to <vscale x 16 x i32> 1636 ret <vscale x 16 x i32> %evec 1637} 1638 1639define <vscale x 32 x i1> @vfptosi_nxv32f16_nxv32i1(<vscale x 32 x half> %va) { 1640; ZVFH-LABEL: vfptosi_nxv32f16_nxv32i1: 1641; ZVFH: # %bb.0: 1642; ZVFH-NEXT: vsetvli a0, zero, e8, m4, ta, ma 1643; ZVFH-NEXT: vfncvt.rtz.x.f.w v16, v8 1644; ZVFH-NEXT: vand.vi v8, v16, 1 1645; ZVFH-NEXT: vmsne.vi v0, v8, 0 1646; ZVFH-NEXT: ret 1647; 1648; ZVFHMIN-LABEL: vfptosi_nxv32f16_nxv32i1: 1649; ZVFHMIN: # %bb.0: 1650; ZVFHMIN-NEXT: csrr a0, vlenb 1651; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m4, ta, ma 1652; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12 1653; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8 1654; ZVFHMIN-NEXT: srli a0, a0, 2 1655; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v16 1656; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v12, v24 1657; ZVFHMIN-NEXT: add a1, a0, a0 1658; ZVFHMIN-NEXT: vand.vi v8, v8, 1 1659; ZVFHMIN-NEXT: vand.vi v12, v12, 1 1660; ZVFHMIN-NEXT: vmsne.vi v16, v8, 0 1661; ZVFHMIN-NEXT: vmsne.vi v0, v12, 0 1662; ZVFHMIN-NEXT: vsetvli zero, a1, e8, mf2, ta, ma 1663; ZVFHMIN-NEXT: vslideup.vx v0, v16, a0 1664; ZVFHMIN-NEXT: ret 1665 %evec = fptosi <vscale x 32 x half> %va to <vscale x 32 x i1> 1666 ret <vscale x 32 x i1> %evec 1667} 1668 1669define <vscale x 32 x i1> @vfptoui_nxv32f16_nxv32i1(<vscale x 32 x half> %va) { 1670; ZVFH-LABEL: vfptoui_nxv32f16_nxv32i1: 1671; ZVFH: # %bb.0: 1672; ZVFH-NEXT: vsetvli a0, zero, e8, m4, ta, ma 1673; ZVFH-NEXT: vfncvt.rtz.xu.f.w v16, v8 1674; ZVFH-NEXT: vand.vi v8, v16, 1 1675; ZVFH-NEXT: vmsne.vi v0, v8, 0 1676; ZVFH-NEXT: ret 1677; 1678; ZVFHMIN-LABEL: vfptoui_nxv32f16_nxv32i1: 1679; ZVFHMIN: # %bb.0: 1680; ZVFHMIN-NEXT: csrr a0, vlenb 1681; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m4, ta, ma 1682; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12 1683; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8 1684; ZVFHMIN-NEXT: srli a0, a0, 2 1685; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v16 1686; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v12, v24 1687; ZVFHMIN-NEXT: add a1, a0, a0 1688; ZVFHMIN-NEXT: vand.vi v8, v8, 1 1689; ZVFHMIN-NEXT: vand.vi v12, v12, 1 1690; ZVFHMIN-NEXT: vmsne.vi v16, v8, 0 1691; ZVFHMIN-NEXT: vmsne.vi v0, v12, 0 1692; ZVFHMIN-NEXT: vsetvli zero, a1, e8, mf2, ta, ma 1693; ZVFHMIN-NEXT: vslideup.vx v0, v16, a0 1694; ZVFHMIN-NEXT: ret 1695 %evec = fptoui <vscale x 32 x half> %va to <vscale x 32 x i1> 1696 ret <vscale x 32 x i1> %evec 1697} 1698 1699define <vscale x 32 x i8> @vfptosi_nxv32f16_nxv32i8(<vscale x 32 x half> %va) { 1700; ZVFH-LABEL: vfptosi_nxv32f16_nxv32i8: 1701; ZVFH: # %bb.0: 1702; ZVFH-NEXT: vsetvli a0, zero, e8, m4, ta, ma 1703; ZVFH-NEXT: vfncvt.rtz.x.f.w v16, v8 1704; ZVFH-NEXT: vmv.v.v v8, v16 1705; ZVFH-NEXT: ret 1706; 1707; ZVFHMIN-LABEL: vfptosi_nxv32f16_nxv32i8: 1708; ZVFHMIN: # %bb.0: 1709; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1710; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1711; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12 1712; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v12, v16 1713; ZVFHMIN-NEXT: vsetvli zero, zero, e8, m2, ta, ma 1714; ZVFHMIN-NEXT: vnsrl.wi v8, v12, 0 1715; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma 1716; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v12, v24 1717; ZVFHMIN-NEXT: vsetvli zero, zero, e8, m2, ta, ma 1718; ZVFHMIN-NEXT: vnsrl.wi v10, v12, 0 1719; ZVFHMIN-NEXT: ret 1720 %evec = fptosi <vscale x 32 x half> %va to <vscale x 32 x i8> 1721 ret <vscale x 32 x i8> %evec 1722} 1723 1724define <vscale x 32 x i8> @vfptoui_nxv32f16_nxv32i8(<vscale x 32 x half> %va) { 1725; ZVFH-LABEL: vfptoui_nxv32f16_nxv32i8: 1726; ZVFH: # %bb.0: 1727; ZVFH-NEXT: vsetvli a0, zero, e8, m4, ta, ma 1728; ZVFH-NEXT: vfncvt.rtz.xu.f.w v16, v8 1729; ZVFH-NEXT: vmv.v.v v8, v16 1730; ZVFH-NEXT: ret 1731; 1732; ZVFHMIN-LABEL: vfptoui_nxv32f16_nxv32i8: 1733; ZVFHMIN: # %bb.0: 1734; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1735; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1736; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12 1737; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v12, v16 1738; ZVFHMIN-NEXT: vsetvli zero, zero, e8, m2, ta, ma 1739; ZVFHMIN-NEXT: vnsrl.wi v8, v12, 0 1740; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma 1741; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v12, v24 1742; ZVFHMIN-NEXT: vsetvli zero, zero, e8, m2, ta, ma 1743; ZVFHMIN-NEXT: vnsrl.wi v10, v12, 0 1744; ZVFHMIN-NEXT: ret 1745 %evec = fptoui <vscale x 32 x half> %va to <vscale x 32 x i8> 1746 ret <vscale x 32 x i8> %evec 1747} 1748 1749define <vscale x 32 x i16> @vfptosi_nxv32f16_nxv32i16(<vscale x 32 x half> %va) { 1750; ZVFH-LABEL: vfptosi_nxv32f16_nxv32i16: 1751; ZVFH: # %bb.0: 1752; ZVFH-NEXT: vsetvli a0, zero, e16, m8, ta, ma 1753; ZVFH-NEXT: vfcvt.rtz.x.f.v v8, v8 1754; ZVFH-NEXT: ret 1755; 1756; ZVFHMIN-LABEL: vfptosi_nxv32f16_nxv32i16: 1757; ZVFHMIN: # %bb.0: 1758; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1759; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1760; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v16 1761; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12 1762; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v12, v16 1763; ZVFHMIN-NEXT: ret 1764 %evec = fptosi <vscale x 32 x half> %va to <vscale x 32 x i16> 1765 ret <vscale x 32 x i16> %evec 1766} 1767 1768define <vscale x 32 x i16> @vfptoui_nxv32f16_nxv32i16(<vscale x 32 x half> %va) { 1769; ZVFH-LABEL: vfptoui_nxv32f16_nxv32i16: 1770; ZVFH: # %bb.0: 1771; ZVFH-NEXT: vsetvli a0, zero, e16, m8, ta, ma 1772; ZVFH-NEXT: vfcvt.rtz.xu.f.v v8, v8 1773; ZVFH-NEXT: ret 1774; 1775; ZVFHMIN-LABEL: vfptoui_nxv32f16_nxv32i16: 1776; ZVFHMIN: # %bb.0: 1777; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma 1778; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8 1779; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v16 1780; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12 1781; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v12, v16 1782; ZVFHMIN-NEXT: ret 1783 %evec = fptoui <vscale x 32 x half> %va to <vscale x 32 x i16> 1784 ret <vscale x 32 x i16> %evec 1785} 1786 1787define <vscale x 1 x i1> @vfptosi_nxv1f32_nxv1i1(<vscale x 1 x float> %va) { 1788; CHECK-LABEL: vfptosi_nxv1f32_nxv1i1: 1789; CHECK: # %bb.0: 1790; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 1791; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 1792; CHECK-NEXT: vand.vi v8, v9, 1 1793; CHECK-NEXT: vmsne.vi v0, v8, 0 1794; CHECK-NEXT: ret 1795 %evec = fptosi <vscale x 1 x float> %va to <vscale x 1 x i1> 1796 ret <vscale x 1 x i1> %evec 1797} 1798 1799define <vscale x 1 x i1> @vfptoui_nxv1f32_nxv1i1(<vscale x 1 x float> %va) { 1800; CHECK-LABEL: vfptoui_nxv1f32_nxv1i1: 1801; CHECK: # %bb.0: 1802; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 1803; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 1804; CHECK-NEXT: vand.vi v8, v9, 1 1805; CHECK-NEXT: vmsne.vi v0, v8, 0 1806; CHECK-NEXT: ret 1807 %evec = fptoui <vscale x 1 x float> %va to <vscale x 1 x i1> 1808 ret <vscale x 1 x i1> %evec 1809} 1810 1811define <vscale x 1 x i8> @vfptosi_nxv1f32_nxv1i8(<vscale x 1 x float> %va) { 1812; CHECK-LABEL: vfptosi_nxv1f32_nxv1i8: 1813; CHECK: # %bb.0: 1814; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 1815; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 1816; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 1817; CHECK-NEXT: vnsrl.wi v8, v9, 0 1818; CHECK-NEXT: ret 1819 %evec = fptosi <vscale x 1 x float> %va to <vscale x 1 x i8> 1820 ret <vscale x 1 x i8> %evec 1821} 1822 1823define <vscale x 1 x i8> @vfptoui_nxv1f32_nxv1i8(<vscale x 1 x float> %va) { 1824; CHECK-LABEL: vfptoui_nxv1f32_nxv1i8: 1825; CHECK: # %bb.0: 1826; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 1827; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 1828; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 1829; CHECK-NEXT: vnsrl.wi v8, v9, 0 1830; CHECK-NEXT: ret 1831 %evec = fptoui <vscale x 1 x float> %va to <vscale x 1 x i8> 1832 ret <vscale x 1 x i8> %evec 1833} 1834 1835define <vscale x 1 x i16> @vfptosi_nxv1f32_nxv1i16(<vscale x 1 x float> %va) { 1836; CHECK-LABEL: vfptosi_nxv1f32_nxv1i16: 1837; CHECK: # %bb.0: 1838; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 1839; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 1840; CHECK-NEXT: vmv1r.v v8, v9 1841; CHECK-NEXT: ret 1842 %evec = fptosi <vscale x 1 x float> %va to <vscale x 1 x i16> 1843 ret <vscale x 1 x i16> %evec 1844} 1845 1846define <vscale x 1 x i16> @vfptoui_nxv1f32_nxv1i16(<vscale x 1 x float> %va) { 1847; CHECK-LABEL: vfptoui_nxv1f32_nxv1i16: 1848; CHECK: # %bb.0: 1849; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma 1850; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 1851; CHECK-NEXT: vmv1r.v v8, v9 1852; CHECK-NEXT: ret 1853 %evec = fptoui <vscale x 1 x float> %va to <vscale x 1 x i16> 1854 ret <vscale x 1 x i16> %evec 1855} 1856 1857define <vscale x 1 x i32> @vfptosi_nxv1f32_nxv1i32(<vscale x 1 x float> %va) { 1858; CHECK-LABEL: vfptosi_nxv1f32_nxv1i32: 1859; CHECK: # %bb.0: 1860; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 1861; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8 1862; CHECK-NEXT: ret 1863 %evec = fptosi <vscale x 1 x float> %va to <vscale x 1 x i32> 1864 ret <vscale x 1 x i32> %evec 1865} 1866 1867define <vscale x 1 x i32> @vfptoui_nxv1f32_nxv1i32(<vscale x 1 x float> %va) { 1868; CHECK-LABEL: vfptoui_nxv1f32_nxv1i32: 1869; CHECK: # %bb.0: 1870; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 1871; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8 1872; CHECK-NEXT: ret 1873 %evec = fptoui <vscale x 1 x float> %va to <vscale x 1 x i32> 1874 ret <vscale x 1 x i32> %evec 1875} 1876 1877define <vscale x 1 x i64> @vfptosi_nxv1f32_nxv1i64(<vscale x 1 x float> %va) { 1878; CHECK-LABEL: vfptosi_nxv1f32_nxv1i64: 1879; CHECK: # %bb.0: 1880; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 1881; CHECK-NEXT: vfwcvt.rtz.x.f.v v9, v8 1882; CHECK-NEXT: vmv1r.v v8, v9 1883; CHECK-NEXT: ret 1884 %evec = fptosi <vscale x 1 x float> %va to <vscale x 1 x i64> 1885 ret <vscale x 1 x i64> %evec 1886} 1887 1888define <vscale x 1 x i64> @vfptoui_nxv1f32_nxv1i64(<vscale x 1 x float> %va) { 1889; CHECK-LABEL: vfptoui_nxv1f32_nxv1i64: 1890; CHECK: # %bb.0: 1891; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 1892; CHECK-NEXT: vfwcvt.rtz.xu.f.v v9, v8 1893; CHECK-NEXT: vmv1r.v v8, v9 1894; CHECK-NEXT: ret 1895 %evec = fptoui <vscale x 1 x float> %va to <vscale x 1 x i64> 1896 ret <vscale x 1 x i64> %evec 1897} 1898 1899define <vscale x 2 x i1> @vfptosi_nxv2f32_nxv2i1(<vscale x 2 x float> %va) { 1900; CHECK-LABEL: vfptosi_nxv2f32_nxv2i1: 1901; CHECK: # %bb.0: 1902; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1903; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 1904; CHECK-NEXT: vand.vi v8, v9, 1 1905; CHECK-NEXT: vmsne.vi v0, v8, 0 1906; CHECK-NEXT: ret 1907 %evec = fptosi <vscale x 2 x float> %va to <vscale x 2 x i1> 1908 ret <vscale x 2 x i1> %evec 1909} 1910 1911define <vscale x 2 x i1> @vfptoui_nxv2f32_nxv2i1(<vscale x 2 x float> %va) { 1912; CHECK-LABEL: vfptoui_nxv2f32_nxv2i1: 1913; CHECK: # %bb.0: 1914; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1915; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 1916; CHECK-NEXT: vand.vi v8, v9, 1 1917; CHECK-NEXT: vmsne.vi v0, v8, 0 1918; CHECK-NEXT: ret 1919 %evec = fptoui <vscale x 2 x float> %va to <vscale x 2 x i1> 1920 ret <vscale x 2 x i1> %evec 1921} 1922 1923define <vscale x 2 x i8> @vfptosi_nxv2f32_nxv2i8(<vscale x 2 x float> %va) { 1924; CHECK-LABEL: vfptosi_nxv2f32_nxv2i8: 1925; CHECK: # %bb.0: 1926; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1927; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 1928; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma 1929; CHECK-NEXT: vnsrl.wi v8, v9, 0 1930; CHECK-NEXT: ret 1931 %evec = fptosi <vscale x 2 x float> %va to <vscale x 2 x i8> 1932 ret <vscale x 2 x i8> %evec 1933} 1934 1935define <vscale x 2 x i8> @vfptoui_nxv2f32_nxv2i8(<vscale x 2 x float> %va) { 1936; CHECK-LABEL: vfptoui_nxv2f32_nxv2i8: 1937; CHECK: # %bb.0: 1938; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1939; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 1940; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma 1941; CHECK-NEXT: vnsrl.wi v8, v9, 0 1942; CHECK-NEXT: ret 1943 %evec = fptoui <vscale x 2 x float> %va to <vscale x 2 x i8> 1944 ret <vscale x 2 x i8> %evec 1945} 1946 1947define <vscale x 2 x i16> @vfptosi_nxv2f32_nxv2i16(<vscale x 2 x float> %va) { 1948; CHECK-LABEL: vfptosi_nxv2f32_nxv2i16: 1949; CHECK: # %bb.0: 1950; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1951; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 1952; CHECK-NEXT: vmv1r.v v8, v9 1953; CHECK-NEXT: ret 1954 %evec = fptosi <vscale x 2 x float> %va to <vscale x 2 x i16> 1955 ret <vscale x 2 x i16> %evec 1956} 1957 1958define <vscale x 2 x i16> @vfptoui_nxv2f32_nxv2i16(<vscale x 2 x float> %va) { 1959; CHECK-LABEL: vfptoui_nxv2f32_nxv2i16: 1960; CHECK: # %bb.0: 1961; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma 1962; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 1963; CHECK-NEXT: vmv1r.v v8, v9 1964; CHECK-NEXT: ret 1965 %evec = fptoui <vscale x 2 x float> %va to <vscale x 2 x i16> 1966 ret <vscale x 2 x i16> %evec 1967} 1968 1969define <vscale x 2 x i32> @vfptosi_nxv2f32_nxv2i32(<vscale x 2 x float> %va) { 1970; CHECK-LABEL: vfptosi_nxv2f32_nxv2i32: 1971; CHECK: # %bb.0: 1972; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 1973; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8 1974; CHECK-NEXT: ret 1975 %evec = fptosi <vscale x 2 x float> %va to <vscale x 2 x i32> 1976 ret <vscale x 2 x i32> %evec 1977} 1978 1979define <vscale x 2 x i32> @vfptoui_nxv2f32_nxv2i32(<vscale x 2 x float> %va) { 1980; CHECK-LABEL: vfptoui_nxv2f32_nxv2i32: 1981; CHECK: # %bb.0: 1982; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 1983; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8 1984; CHECK-NEXT: ret 1985 %evec = fptoui <vscale x 2 x float> %va to <vscale x 2 x i32> 1986 ret <vscale x 2 x i32> %evec 1987} 1988 1989define <vscale x 2 x i64> @vfptosi_nxv2f32_nxv2i64(<vscale x 2 x float> %va) { 1990; CHECK-LABEL: vfptosi_nxv2f32_nxv2i64: 1991; CHECK: # %bb.0: 1992; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 1993; CHECK-NEXT: vfwcvt.rtz.x.f.v v10, v8 1994; CHECK-NEXT: vmv2r.v v8, v10 1995; CHECK-NEXT: ret 1996 %evec = fptosi <vscale x 2 x float> %va to <vscale x 2 x i64> 1997 ret <vscale x 2 x i64> %evec 1998} 1999 2000define <vscale x 2 x i64> @vfptoui_nxv2f32_nxv2i64(<vscale x 2 x float> %va) { 2001; CHECK-LABEL: vfptoui_nxv2f32_nxv2i64: 2002; CHECK: # %bb.0: 2003; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 2004; CHECK-NEXT: vfwcvt.rtz.xu.f.v v10, v8 2005; CHECK-NEXT: vmv2r.v v8, v10 2006; CHECK-NEXT: ret 2007 %evec = fptoui <vscale x 2 x float> %va to <vscale x 2 x i64> 2008 ret <vscale x 2 x i64> %evec 2009} 2010 2011define <vscale x 4 x i1> @vfptosi_nxv4f32_nxv4i1(<vscale x 4 x float> %va) { 2012; CHECK-LABEL: vfptosi_nxv4f32_nxv4i1: 2013; CHECK: # %bb.0: 2014; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 2015; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8 2016; CHECK-NEXT: vand.vi v8, v10, 1 2017; CHECK-NEXT: vmsne.vi v0, v8, 0 2018; CHECK-NEXT: ret 2019 %evec = fptosi <vscale x 4 x float> %va to <vscale x 4 x i1> 2020 ret <vscale x 4 x i1> %evec 2021} 2022 2023define <vscale x 4 x i1> @vfptoui_nxv4f32_nxv4i1(<vscale x 4 x float> %va) { 2024; CHECK-LABEL: vfptoui_nxv4f32_nxv4i1: 2025; CHECK: # %bb.0: 2026; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 2027; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8 2028; CHECK-NEXT: vand.vi v8, v10, 1 2029; CHECK-NEXT: vmsne.vi v0, v8, 0 2030; CHECK-NEXT: ret 2031 %evec = fptoui <vscale x 4 x float> %va to <vscale x 4 x i1> 2032 ret <vscale x 4 x i1> %evec 2033} 2034 2035define <vscale x 4 x i8> @vfptosi_nxv4f32_nxv4i8(<vscale x 4 x float> %va) { 2036; CHECK-LABEL: vfptosi_nxv4f32_nxv4i8: 2037; CHECK: # %bb.0: 2038; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 2039; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8 2040; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma 2041; CHECK-NEXT: vnsrl.wi v8, v10, 0 2042; CHECK-NEXT: ret 2043 %evec = fptosi <vscale x 4 x float> %va to <vscale x 4 x i8> 2044 ret <vscale x 4 x i8> %evec 2045} 2046 2047define <vscale x 4 x i8> @vfptoui_nxv4f32_nxv4i8(<vscale x 4 x float> %va) { 2048; CHECK-LABEL: vfptoui_nxv4f32_nxv4i8: 2049; CHECK: # %bb.0: 2050; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 2051; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8 2052; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma 2053; CHECK-NEXT: vnsrl.wi v8, v10, 0 2054; CHECK-NEXT: ret 2055 %evec = fptoui <vscale x 4 x float> %va to <vscale x 4 x i8> 2056 ret <vscale x 4 x i8> %evec 2057} 2058 2059define <vscale x 4 x i16> @vfptosi_nxv4f32_nxv4i16(<vscale x 4 x float> %va) { 2060; CHECK-LABEL: vfptosi_nxv4f32_nxv4i16: 2061; CHECK: # %bb.0: 2062; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 2063; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8 2064; CHECK-NEXT: vmv.v.v v8, v10 2065; CHECK-NEXT: ret 2066 %evec = fptosi <vscale x 4 x float> %va to <vscale x 4 x i16> 2067 ret <vscale x 4 x i16> %evec 2068} 2069 2070define <vscale x 4 x i16> @vfptoui_nxv4f32_nxv4i16(<vscale x 4 x float> %va) { 2071; CHECK-LABEL: vfptoui_nxv4f32_nxv4i16: 2072; CHECK: # %bb.0: 2073; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma 2074; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8 2075; CHECK-NEXT: vmv.v.v v8, v10 2076; CHECK-NEXT: ret 2077 %evec = fptoui <vscale x 4 x float> %va to <vscale x 4 x i16> 2078 ret <vscale x 4 x i16> %evec 2079} 2080 2081define <vscale x 4 x i32> @vfptosi_nxv4f32_nxv4i32(<vscale x 4 x float> %va) { 2082; CHECK-LABEL: vfptosi_nxv4f32_nxv4i32: 2083; CHECK: # %bb.0: 2084; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2085; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8 2086; CHECK-NEXT: ret 2087 %evec = fptosi <vscale x 4 x float> %va to <vscale x 4 x i32> 2088 ret <vscale x 4 x i32> %evec 2089} 2090 2091define <vscale x 4 x i32> @vfptoui_nxv4f32_nxv4i32(<vscale x 4 x float> %va) { 2092; CHECK-LABEL: vfptoui_nxv4f32_nxv4i32: 2093; CHECK: # %bb.0: 2094; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2095; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8 2096; CHECK-NEXT: ret 2097 %evec = fptoui <vscale x 4 x float> %va to <vscale x 4 x i32> 2098 ret <vscale x 4 x i32> %evec 2099} 2100 2101define <vscale x 4 x i64> @vfptosi_nxv4f32_nxv4i64(<vscale x 4 x float> %va) { 2102; CHECK-LABEL: vfptosi_nxv4f32_nxv4i64: 2103; CHECK: # %bb.0: 2104; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2105; CHECK-NEXT: vfwcvt.rtz.x.f.v v12, v8 2106; CHECK-NEXT: vmv4r.v v8, v12 2107; CHECK-NEXT: ret 2108 %evec = fptosi <vscale x 4 x float> %va to <vscale x 4 x i64> 2109 ret <vscale x 4 x i64> %evec 2110} 2111 2112define <vscale x 4 x i64> @vfptoui_nxv4f32_nxv4i64(<vscale x 4 x float> %va) { 2113; CHECK-LABEL: vfptoui_nxv4f32_nxv4i64: 2114; CHECK: # %bb.0: 2115; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2116; CHECK-NEXT: vfwcvt.rtz.xu.f.v v12, v8 2117; CHECK-NEXT: vmv4r.v v8, v12 2118; CHECK-NEXT: ret 2119 %evec = fptoui <vscale x 4 x float> %va to <vscale x 4 x i64> 2120 ret <vscale x 4 x i64> %evec 2121} 2122 2123define <vscale x 8 x i1> @vfptosi_nxv8f32_nxv8i1(<vscale x 8 x float> %va) { 2124; CHECK-LABEL: vfptosi_nxv8f32_nxv8i1: 2125; CHECK: # %bb.0: 2126; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 2127; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8 2128; CHECK-NEXT: vand.vi v8, v12, 1 2129; CHECK-NEXT: vmsne.vi v0, v8, 0 2130; CHECK-NEXT: ret 2131 %evec = fptosi <vscale x 8 x float> %va to <vscale x 8 x i1> 2132 ret <vscale x 8 x i1> %evec 2133} 2134 2135define <vscale x 8 x i1> @vfptoui_nxv8f32_nxv8i1(<vscale x 8 x float> %va) { 2136; CHECK-LABEL: vfptoui_nxv8f32_nxv8i1: 2137; CHECK: # %bb.0: 2138; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 2139; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8 2140; CHECK-NEXT: vand.vi v8, v12, 1 2141; CHECK-NEXT: vmsne.vi v0, v8, 0 2142; CHECK-NEXT: ret 2143 %evec = fptoui <vscale x 8 x float> %va to <vscale x 8 x i1> 2144 ret <vscale x 8 x i1> %evec 2145} 2146 2147define <vscale x 8 x i8> @vfptosi_nxv8f32_nxv8i8(<vscale x 8 x float> %va) { 2148; CHECK-LABEL: vfptosi_nxv8f32_nxv8i8: 2149; CHECK: # %bb.0: 2150; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 2151; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8 2152; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma 2153; CHECK-NEXT: vnsrl.wi v8, v12, 0 2154; CHECK-NEXT: ret 2155 %evec = fptosi <vscale x 8 x float> %va to <vscale x 8 x i8> 2156 ret <vscale x 8 x i8> %evec 2157} 2158 2159define <vscale x 8 x i8> @vfptoui_nxv8f32_nxv8i8(<vscale x 8 x float> %va) { 2160; CHECK-LABEL: vfptoui_nxv8f32_nxv8i8: 2161; CHECK: # %bb.0: 2162; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 2163; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8 2164; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma 2165; CHECK-NEXT: vnsrl.wi v8, v12, 0 2166; CHECK-NEXT: ret 2167 %evec = fptoui <vscale x 8 x float> %va to <vscale x 8 x i8> 2168 ret <vscale x 8 x i8> %evec 2169} 2170 2171define <vscale x 8 x i16> @vfptosi_nxv8f32_nxv8i16(<vscale x 8 x float> %va) { 2172; CHECK-LABEL: vfptosi_nxv8f32_nxv8i16: 2173; CHECK: # %bb.0: 2174; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 2175; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8 2176; CHECK-NEXT: vmv.v.v v8, v12 2177; CHECK-NEXT: ret 2178 %evec = fptosi <vscale x 8 x float> %va to <vscale x 8 x i16> 2179 ret <vscale x 8 x i16> %evec 2180} 2181 2182define <vscale x 8 x i16> @vfptoui_nxv8f32_nxv8i16(<vscale x 8 x float> %va) { 2183; CHECK-LABEL: vfptoui_nxv8f32_nxv8i16: 2184; CHECK: # %bb.0: 2185; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma 2186; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8 2187; CHECK-NEXT: vmv.v.v v8, v12 2188; CHECK-NEXT: ret 2189 %evec = fptoui <vscale x 8 x float> %va to <vscale x 8 x i16> 2190 ret <vscale x 8 x i16> %evec 2191} 2192 2193define <vscale x 8 x i32> @vfptosi_nxv8f32_nxv8i32(<vscale x 8 x float> %va) { 2194; CHECK-LABEL: vfptosi_nxv8f32_nxv8i32: 2195; CHECK: # %bb.0: 2196; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2197; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8 2198; CHECK-NEXT: ret 2199 %evec = fptosi <vscale x 8 x float> %va to <vscale x 8 x i32> 2200 ret <vscale x 8 x i32> %evec 2201} 2202 2203define <vscale x 8 x i32> @vfptoui_nxv8f32_nxv8i32(<vscale x 8 x float> %va) { 2204; CHECK-LABEL: vfptoui_nxv8f32_nxv8i32: 2205; CHECK: # %bb.0: 2206; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2207; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8 2208; CHECK-NEXT: ret 2209 %evec = fptoui <vscale x 8 x float> %va to <vscale x 8 x i32> 2210 ret <vscale x 8 x i32> %evec 2211} 2212 2213define <vscale x 8 x i64> @vfptosi_nxv8f32_nxv8i64(<vscale x 8 x float> %va) { 2214; CHECK-LABEL: vfptosi_nxv8f32_nxv8i64: 2215; CHECK: # %bb.0: 2216; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2217; CHECK-NEXT: vfwcvt.rtz.x.f.v v16, v8 2218; CHECK-NEXT: vmv8r.v v8, v16 2219; CHECK-NEXT: ret 2220 %evec = fptosi <vscale x 8 x float> %va to <vscale x 8 x i64> 2221 ret <vscale x 8 x i64> %evec 2222} 2223 2224define <vscale x 8 x i64> @vfptoui_nxv8f32_nxv8i64(<vscale x 8 x float> %va) { 2225; CHECK-LABEL: vfptoui_nxv8f32_nxv8i64: 2226; CHECK: # %bb.0: 2227; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2228; CHECK-NEXT: vfwcvt.rtz.xu.f.v v16, v8 2229; CHECK-NEXT: vmv8r.v v8, v16 2230; CHECK-NEXT: ret 2231 %evec = fptoui <vscale x 8 x float> %va to <vscale x 8 x i64> 2232 ret <vscale x 8 x i64> %evec 2233} 2234 2235define <vscale x 16 x i1> @vfptosi_nxv16f32_nxv16i1(<vscale x 16 x float> %va) { 2236; CHECK-LABEL: vfptosi_nxv16f32_nxv16i1: 2237; CHECK: # %bb.0: 2238; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 2239; CHECK-NEXT: vfncvt.rtz.x.f.w v16, v8 2240; CHECK-NEXT: vand.vi v8, v16, 1 2241; CHECK-NEXT: vmsne.vi v0, v8, 0 2242; CHECK-NEXT: ret 2243 %evec = fptosi <vscale x 16 x float> %va to <vscale x 16 x i1> 2244 ret <vscale x 16 x i1> %evec 2245} 2246 2247define <vscale x 16 x i1> @vfptoui_nxv16f32_nxv16i1(<vscale x 16 x float> %va) { 2248; CHECK-LABEL: vfptoui_nxv16f32_nxv16i1: 2249; CHECK: # %bb.0: 2250; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 2251; CHECK-NEXT: vfncvt.rtz.xu.f.w v16, v8 2252; CHECK-NEXT: vand.vi v8, v16, 1 2253; CHECK-NEXT: vmsne.vi v0, v8, 0 2254; CHECK-NEXT: ret 2255 %evec = fptoui <vscale x 16 x float> %va to <vscale x 16 x i1> 2256 ret <vscale x 16 x i1> %evec 2257} 2258 2259define <vscale x 16 x i8> @vfptosi_nxv16f32_nxv16i8(<vscale x 16 x float> %va) { 2260; CHECK-LABEL: vfptosi_nxv16f32_nxv16i8: 2261; CHECK: # %bb.0: 2262; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 2263; CHECK-NEXT: vfncvt.rtz.x.f.w v16, v8 2264; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma 2265; CHECK-NEXT: vnsrl.wi v8, v16, 0 2266; CHECK-NEXT: ret 2267 %evec = fptosi <vscale x 16 x float> %va to <vscale x 16 x i8> 2268 ret <vscale x 16 x i8> %evec 2269} 2270 2271define <vscale x 16 x i8> @vfptoui_nxv16f32_nxv16i8(<vscale x 16 x float> %va) { 2272; CHECK-LABEL: vfptoui_nxv16f32_nxv16i8: 2273; CHECK: # %bb.0: 2274; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 2275; CHECK-NEXT: vfncvt.rtz.xu.f.w v16, v8 2276; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma 2277; CHECK-NEXT: vnsrl.wi v8, v16, 0 2278; CHECK-NEXT: ret 2279 %evec = fptoui <vscale x 16 x float> %va to <vscale x 16 x i8> 2280 ret <vscale x 16 x i8> %evec 2281} 2282 2283define <vscale x 16 x i16> @vfptosi_nxv16f32_nxv16i16(<vscale x 16 x float> %va) { 2284; CHECK-LABEL: vfptosi_nxv16f32_nxv16i16: 2285; CHECK: # %bb.0: 2286; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 2287; CHECK-NEXT: vfncvt.rtz.x.f.w v16, v8 2288; CHECK-NEXT: vmv.v.v v8, v16 2289; CHECK-NEXT: ret 2290 %evec = fptosi <vscale x 16 x float> %va to <vscale x 16 x i16> 2291 ret <vscale x 16 x i16> %evec 2292} 2293 2294define <vscale x 16 x i16> @vfptoui_nxv16f32_nxv16i16(<vscale x 16 x float> %va) { 2295; CHECK-LABEL: vfptoui_nxv16f32_nxv16i16: 2296; CHECK: # %bb.0: 2297; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma 2298; CHECK-NEXT: vfncvt.rtz.xu.f.w v16, v8 2299; CHECK-NEXT: vmv.v.v v8, v16 2300; CHECK-NEXT: ret 2301 %evec = fptoui <vscale x 16 x float> %va to <vscale x 16 x i16> 2302 ret <vscale x 16 x i16> %evec 2303} 2304 2305define <vscale x 16 x i32> @vfptosi_nxv16f32_nxv16i32(<vscale x 16 x float> %va) { 2306; CHECK-LABEL: vfptosi_nxv16f32_nxv16i32: 2307; CHECK: # %bb.0: 2308; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma 2309; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8 2310; CHECK-NEXT: ret 2311 %evec = fptosi <vscale x 16 x float> %va to <vscale x 16 x i32> 2312 ret <vscale x 16 x i32> %evec 2313} 2314 2315define <vscale x 16 x i32> @vfptoui_nxv16f32_nxv16i32(<vscale x 16 x float> %va) { 2316; CHECK-LABEL: vfptoui_nxv16f32_nxv16i32: 2317; CHECK: # %bb.0: 2318; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma 2319; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8 2320; CHECK-NEXT: ret 2321 %evec = fptoui <vscale x 16 x float> %va to <vscale x 16 x i32> 2322 ret <vscale x 16 x i32> %evec 2323} 2324 2325define <vscale x 1 x i1> @vfptosi_nxv1f64_nxv1i1(<vscale x 1 x double> %va) { 2326; CHECK-LABEL: vfptosi_nxv1f64_nxv1i1: 2327; CHECK: # %bb.0: 2328; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 2329; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 2330; CHECK-NEXT: vand.vi v8, v9, 1 2331; CHECK-NEXT: vmsne.vi v0, v8, 0 2332; CHECK-NEXT: ret 2333 %evec = fptosi <vscale x 1 x double> %va to <vscale x 1 x i1> 2334 ret <vscale x 1 x i1> %evec 2335} 2336 2337define <vscale x 1 x i1> @vfptoui_nxv1f64_nxv1i1(<vscale x 1 x double> %va) { 2338; CHECK-LABEL: vfptoui_nxv1f64_nxv1i1: 2339; CHECK: # %bb.0: 2340; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 2341; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 2342; CHECK-NEXT: vand.vi v8, v9, 1 2343; CHECK-NEXT: vmsne.vi v0, v8, 0 2344; CHECK-NEXT: ret 2345 %evec = fptoui <vscale x 1 x double> %va to <vscale x 1 x i1> 2346 ret <vscale x 1 x i1> %evec 2347} 2348 2349define <vscale x 1 x i8> @vfptosi_nxv1f64_nxv1i8(<vscale x 1 x double> %va) { 2350; CHECK-LABEL: vfptosi_nxv1f64_nxv1i8: 2351; CHECK: # %bb.0: 2352; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 2353; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 2354; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma 2355; CHECK-NEXT: vnsrl.wi v8, v9, 0 2356; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 2357; CHECK-NEXT: vnsrl.wi v8, v8, 0 2358; CHECK-NEXT: ret 2359 %evec = fptosi <vscale x 1 x double> %va to <vscale x 1 x i8> 2360 ret <vscale x 1 x i8> %evec 2361} 2362 2363define <vscale x 1 x i8> @vfptoui_nxv1f64_nxv1i8(<vscale x 1 x double> %va) { 2364; CHECK-LABEL: vfptoui_nxv1f64_nxv1i8: 2365; CHECK: # %bb.0: 2366; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 2367; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 2368; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma 2369; CHECK-NEXT: vnsrl.wi v8, v9, 0 2370; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma 2371; CHECK-NEXT: vnsrl.wi v8, v8, 0 2372; CHECK-NEXT: ret 2373 %evec = fptoui <vscale x 1 x double> %va to <vscale x 1 x i8> 2374 ret <vscale x 1 x i8> %evec 2375} 2376 2377define <vscale x 1 x i16> @vfptosi_nxv1f64_nxv1i16(<vscale x 1 x double> %va) { 2378; CHECK-LABEL: vfptosi_nxv1f64_nxv1i16: 2379; CHECK: # %bb.0: 2380; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 2381; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 2382; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma 2383; CHECK-NEXT: vnsrl.wi v8, v9, 0 2384; CHECK-NEXT: ret 2385 %evec = fptosi <vscale x 1 x double> %va to <vscale x 1 x i16> 2386 ret <vscale x 1 x i16> %evec 2387} 2388 2389define <vscale x 1 x i16> @vfptoui_nxv1f64_nxv1i16(<vscale x 1 x double> %va) { 2390; CHECK-LABEL: vfptoui_nxv1f64_nxv1i16: 2391; CHECK: # %bb.0: 2392; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 2393; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 2394; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma 2395; CHECK-NEXT: vnsrl.wi v8, v9, 0 2396; CHECK-NEXT: ret 2397 %evec = fptoui <vscale x 1 x double> %va to <vscale x 1 x i16> 2398 ret <vscale x 1 x i16> %evec 2399} 2400 2401define <vscale x 1 x i32> @vfptosi_nxv1f64_nxv1i32(<vscale x 1 x double> %va) { 2402; CHECK-LABEL: vfptosi_nxv1f64_nxv1i32: 2403; CHECK: # %bb.0: 2404; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 2405; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8 2406; CHECK-NEXT: vmv1r.v v8, v9 2407; CHECK-NEXT: ret 2408 %evec = fptosi <vscale x 1 x double> %va to <vscale x 1 x i32> 2409 ret <vscale x 1 x i32> %evec 2410} 2411 2412define <vscale x 1 x i32> @vfptoui_nxv1f64_nxv1i32(<vscale x 1 x double> %va) { 2413; CHECK-LABEL: vfptoui_nxv1f64_nxv1i32: 2414; CHECK: # %bb.0: 2415; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma 2416; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8 2417; CHECK-NEXT: vmv1r.v v8, v9 2418; CHECK-NEXT: ret 2419 %evec = fptoui <vscale x 1 x double> %va to <vscale x 1 x i32> 2420 ret <vscale x 1 x i32> %evec 2421} 2422 2423define <vscale x 1 x i64> @vfptosi_nxv1f64_nxv1i64(<vscale x 1 x double> %va) { 2424; CHECK-LABEL: vfptosi_nxv1f64_nxv1i64: 2425; CHECK: # %bb.0: 2426; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma 2427; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8 2428; CHECK-NEXT: ret 2429 %evec = fptosi <vscale x 1 x double> %va to <vscale x 1 x i64> 2430 ret <vscale x 1 x i64> %evec 2431} 2432 2433define <vscale x 1 x i64> @vfptoui_nxv1f64_nxv1i64(<vscale x 1 x double> %va) { 2434; CHECK-LABEL: vfptoui_nxv1f64_nxv1i64: 2435; CHECK: # %bb.0: 2436; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma 2437; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8 2438; CHECK-NEXT: ret 2439 %evec = fptoui <vscale x 1 x double> %va to <vscale x 1 x i64> 2440 ret <vscale x 1 x i64> %evec 2441} 2442 2443define <vscale x 2 x i1> @vfptosi_nxv2f64_nxv2i1(<vscale x 2 x double> %va) { 2444; CHECK-LABEL: vfptosi_nxv2f64_nxv2i1: 2445; CHECK: # %bb.0: 2446; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 2447; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8 2448; CHECK-NEXT: vand.vi v8, v10, 1 2449; CHECK-NEXT: vmsne.vi v0, v8, 0 2450; CHECK-NEXT: ret 2451 %evec = fptosi <vscale x 2 x double> %va to <vscale x 2 x i1> 2452 ret <vscale x 2 x i1> %evec 2453} 2454 2455define <vscale x 2 x i1> @vfptoui_nxv2f64_nxv2i1(<vscale x 2 x double> %va) { 2456; CHECK-LABEL: vfptoui_nxv2f64_nxv2i1: 2457; CHECK: # %bb.0: 2458; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 2459; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8 2460; CHECK-NEXT: vand.vi v8, v10, 1 2461; CHECK-NEXT: vmsne.vi v0, v8, 0 2462; CHECK-NEXT: ret 2463 %evec = fptoui <vscale x 2 x double> %va to <vscale x 2 x i1> 2464 ret <vscale x 2 x i1> %evec 2465} 2466 2467define <vscale x 2 x i8> @vfptosi_nxv2f64_nxv2i8(<vscale x 2 x double> %va) { 2468; CHECK-LABEL: vfptosi_nxv2f64_nxv2i8: 2469; CHECK: # %bb.0: 2470; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 2471; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8 2472; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma 2473; CHECK-NEXT: vnsrl.wi v8, v10, 0 2474; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma 2475; CHECK-NEXT: vnsrl.wi v8, v8, 0 2476; CHECK-NEXT: ret 2477 %evec = fptosi <vscale x 2 x double> %va to <vscale x 2 x i8> 2478 ret <vscale x 2 x i8> %evec 2479} 2480 2481define <vscale x 2 x i8> @vfptoui_nxv2f64_nxv2i8(<vscale x 2 x double> %va) { 2482; CHECK-LABEL: vfptoui_nxv2f64_nxv2i8: 2483; CHECK: # %bb.0: 2484; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 2485; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8 2486; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma 2487; CHECK-NEXT: vnsrl.wi v8, v10, 0 2488; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma 2489; CHECK-NEXT: vnsrl.wi v8, v8, 0 2490; CHECK-NEXT: ret 2491 %evec = fptoui <vscale x 2 x double> %va to <vscale x 2 x i8> 2492 ret <vscale x 2 x i8> %evec 2493} 2494 2495define <vscale x 2 x i16> @vfptosi_nxv2f64_nxv2i16(<vscale x 2 x double> %va) { 2496; CHECK-LABEL: vfptosi_nxv2f64_nxv2i16: 2497; CHECK: # %bb.0: 2498; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 2499; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8 2500; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma 2501; CHECK-NEXT: vnsrl.wi v8, v10, 0 2502; CHECK-NEXT: ret 2503 %evec = fptosi <vscale x 2 x double> %va to <vscale x 2 x i16> 2504 ret <vscale x 2 x i16> %evec 2505} 2506 2507define <vscale x 2 x i16> @vfptoui_nxv2f64_nxv2i16(<vscale x 2 x double> %va) { 2508; CHECK-LABEL: vfptoui_nxv2f64_nxv2i16: 2509; CHECK: # %bb.0: 2510; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 2511; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8 2512; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma 2513; CHECK-NEXT: vnsrl.wi v8, v10, 0 2514; CHECK-NEXT: ret 2515 %evec = fptoui <vscale x 2 x double> %va to <vscale x 2 x i16> 2516 ret <vscale x 2 x i16> %evec 2517} 2518 2519define <vscale x 2 x i32> @vfptosi_nxv2f64_nxv2i32(<vscale x 2 x double> %va) { 2520; CHECK-LABEL: vfptosi_nxv2f64_nxv2i32: 2521; CHECK: # %bb.0: 2522; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 2523; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8 2524; CHECK-NEXT: vmv.v.v v8, v10 2525; CHECK-NEXT: ret 2526 %evec = fptosi <vscale x 2 x double> %va to <vscale x 2 x i32> 2527 ret <vscale x 2 x i32> %evec 2528} 2529 2530define <vscale x 2 x i32> @vfptoui_nxv2f64_nxv2i32(<vscale x 2 x double> %va) { 2531; CHECK-LABEL: vfptoui_nxv2f64_nxv2i32: 2532; CHECK: # %bb.0: 2533; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma 2534; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8 2535; CHECK-NEXT: vmv.v.v v8, v10 2536; CHECK-NEXT: ret 2537 %evec = fptoui <vscale x 2 x double> %va to <vscale x 2 x i32> 2538 ret <vscale x 2 x i32> %evec 2539} 2540 2541define <vscale x 2 x i64> @vfptosi_nxv2f64_nxv2i64(<vscale x 2 x double> %va) { 2542; CHECK-LABEL: vfptosi_nxv2f64_nxv2i64: 2543; CHECK: # %bb.0: 2544; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma 2545; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8 2546; CHECK-NEXT: ret 2547 %evec = fptosi <vscale x 2 x double> %va to <vscale x 2 x i64> 2548 ret <vscale x 2 x i64> %evec 2549} 2550 2551define <vscale x 2 x i64> @vfptoui_nxv2f64_nxv2i64(<vscale x 2 x double> %va) { 2552; CHECK-LABEL: vfptoui_nxv2f64_nxv2i64: 2553; CHECK: # %bb.0: 2554; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma 2555; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8 2556; CHECK-NEXT: ret 2557 %evec = fptoui <vscale x 2 x double> %va to <vscale x 2 x i64> 2558 ret <vscale x 2 x i64> %evec 2559} 2560 2561define <vscale x 4 x i1> @vfptosi_nxv4f64_nxv4i1(<vscale x 4 x double> %va) { 2562; CHECK-LABEL: vfptosi_nxv4f64_nxv4i1: 2563; CHECK: # %bb.0: 2564; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2565; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8 2566; CHECK-NEXT: vand.vi v8, v12, 1 2567; CHECK-NEXT: vmsne.vi v0, v8, 0 2568; CHECK-NEXT: ret 2569 %evec = fptosi <vscale x 4 x double> %va to <vscale x 4 x i1> 2570 ret <vscale x 4 x i1> %evec 2571} 2572 2573define <vscale x 4 x i1> @vfptoui_nxv4f64_nxv4i1(<vscale x 4 x double> %va) { 2574; CHECK-LABEL: vfptoui_nxv4f64_nxv4i1: 2575; CHECK: # %bb.0: 2576; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2577; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8 2578; CHECK-NEXT: vand.vi v8, v12, 1 2579; CHECK-NEXT: vmsne.vi v0, v8, 0 2580; CHECK-NEXT: ret 2581 %evec = fptoui <vscale x 4 x double> %va to <vscale x 4 x i1> 2582 ret <vscale x 4 x i1> %evec 2583} 2584 2585define <vscale x 4 x i8> @vfptosi_nxv4f64_nxv4i8(<vscale x 4 x double> %va) { 2586; CHECK-LABEL: vfptosi_nxv4f64_nxv4i8: 2587; CHECK: # %bb.0: 2588; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2589; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8 2590; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma 2591; CHECK-NEXT: vnsrl.wi v8, v12, 0 2592; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma 2593; CHECK-NEXT: vnsrl.wi v8, v8, 0 2594; CHECK-NEXT: ret 2595 %evec = fptosi <vscale x 4 x double> %va to <vscale x 4 x i8> 2596 ret <vscale x 4 x i8> %evec 2597} 2598 2599define <vscale x 4 x i8> @vfptoui_nxv4f64_nxv4i8(<vscale x 4 x double> %va) { 2600; CHECK-LABEL: vfptoui_nxv4f64_nxv4i8: 2601; CHECK: # %bb.0: 2602; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2603; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8 2604; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma 2605; CHECK-NEXT: vnsrl.wi v8, v12, 0 2606; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma 2607; CHECK-NEXT: vnsrl.wi v8, v8, 0 2608; CHECK-NEXT: ret 2609 %evec = fptoui <vscale x 4 x double> %va to <vscale x 4 x i8> 2610 ret <vscale x 4 x i8> %evec 2611} 2612 2613define <vscale x 4 x i16> @vfptosi_nxv4f64_nxv4i16(<vscale x 4 x double> %va) { 2614; CHECK-LABEL: vfptosi_nxv4f64_nxv4i16: 2615; CHECK: # %bb.0: 2616; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2617; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8 2618; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma 2619; CHECK-NEXT: vnsrl.wi v8, v12, 0 2620; CHECK-NEXT: ret 2621 %evec = fptosi <vscale x 4 x double> %va to <vscale x 4 x i16> 2622 ret <vscale x 4 x i16> %evec 2623} 2624 2625define <vscale x 4 x i16> @vfptoui_nxv4f64_nxv4i16(<vscale x 4 x double> %va) { 2626; CHECK-LABEL: vfptoui_nxv4f64_nxv4i16: 2627; CHECK: # %bb.0: 2628; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2629; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8 2630; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma 2631; CHECK-NEXT: vnsrl.wi v8, v12, 0 2632; CHECK-NEXT: ret 2633 %evec = fptoui <vscale x 4 x double> %va to <vscale x 4 x i16> 2634 ret <vscale x 4 x i16> %evec 2635} 2636 2637define <vscale x 4 x i32> @vfptosi_nxv4f64_nxv4i32(<vscale x 4 x double> %va) { 2638; CHECK-LABEL: vfptosi_nxv4f64_nxv4i32: 2639; CHECK: # %bb.0: 2640; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2641; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8 2642; CHECK-NEXT: vmv.v.v v8, v12 2643; CHECK-NEXT: ret 2644 %evec = fptosi <vscale x 4 x double> %va to <vscale x 4 x i32> 2645 ret <vscale x 4 x i32> %evec 2646} 2647 2648define <vscale x 4 x i32> @vfptoui_nxv4f64_nxv4i32(<vscale x 4 x double> %va) { 2649; CHECK-LABEL: vfptoui_nxv4f64_nxv4i32: 2650; CHECK: # %bb.0: 2651; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma 2652; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8 2653; CHECK-NEXT: vmv.v.v v8, v12 2654; CHECK-NEXT: ret 2655 %evec = fptoui <vscale x 4 x double> %va to <vscale x 4 x i32> 2656 ret <vscale x 4 x i32> %evec 2657} 2658 2659define <vscale x 4 x i64> @vfptosi_nxv4f64_nxv4i64(<vscale x 4 x double> %va) { 2660; CHECK-LABEL: vfptosi_nxv4f64_nxv4i64: 2661; CHECK: # %bb.0: 2662; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma 2663; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8 2664; CHECK-NEXT: ret 2665 %evec = fptosi <vscale x 4 x double> %va to <vscale x 4 x i64> 2666 ret <vscale x 4 x i64> %evec 2667} 2668 2669define <vscale x 4 x i64> @vfptoui_nxv4f64_nxv4i64(<vscale x 4 x double> %va) { 2670; CHECK-LABEL: vfptoui_nxv4f64_nxv4i64: 2671; CHECK: # %bb.0: 2672; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma 2673; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8 2674; CHECK-NEXT: ret 2675 %evec = fptoui <vscale x 4 x double> %va to <vscale x 4 x i64> 2676 ret <vscale x 4 x i64> %evec 2677} 2678 2679define <vscale x 8 x i1> @vfptosi_nxv8f64_nxv8i1(<vscale x 8 x double> %va) { 2680; CHECK-LABEL: vfptosi_nxv8f64_nxv8i1: 2681; CHECK: # %bb.0: 2682; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2683; CHECK-NEXT: vfncvt.rtz.x.f.w v16, v8 2684; CHECK-NEXT: vand.vi v8, v16, 1 2685; CHECK-NEXT: vmsne.vi v0, v8, 0 2686; CHECK-NEXT: ret 2687 %evec = fptosi <vscale x 8 x double> %va to <vscale x 8 x i1> 2688 ret <vscale x 8 x i1> %evec 2689} 2690 2691define <vscale x 8 x i1> @vfptoui_nxv8f64_nxv8i1(<vscale x 8 x double> %va) { 2692; CHECK-LABEL: vfptoui_nxv8f64_nxv8i1: 2693; CHECK: # %bb.0: 2694; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2695; CHECK-NEXT: vfncvt.rtz.xu.f.w v16, v8 2696; CHECK-NEXT: vand.vi v8, v16, 1 2697; CHECK-NEXT: vmsne.vi v0, v8, 0 2698; CHECK-NEXT: ret 2699 %evec = fptoui <vscale x 8 x double> %va to <vscale x 8 x i1> 2700 ret <vscale x 8 x i1> %evec 2701} 2702 2703define <vscale x 8 x i8> @vfptosi_nxv8f64_nxv8i8(<vscale x 8 x double> %va) { 2704; CHECK-LABEL: vfptosi_nxv8f64_nxv8i8: 2705; CHECK: # %bb.0: 2706; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2707; CHECK-NEXT: vfncvt.rtz.x.f.w v16, v8 2708; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma 2709; CHECK-NEXT: vnsrl.wi v10, v16, 0 2710; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma 2711; CHECK-NEXT: vnsrl.wi v8, v10, 0 2712; CHECK-NEXT: ret 2713 %evec = fptosi <vscale x 8 x double> %va to <vscale x 8 x i8> 2714 ret <vscale x 8 x i8> %evec 2715} 2716 2717define <vscale x 8 x i8> @vfptoui_nxv8f64_nxv8i8(<vscale x 8 x double> %va) { 2718; CHECK-LABEL: vfptoui_nxv8f64_nxv8i8: 2719; CHECK: # %bb.0: 2720; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2721; CHECK-NEXT: vfncvt.rtz.xu.f.w v16, v8 2722; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma 2723; CHECK-NEXT: vnsrl.wi v10, v16, 0 2724; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma 2725; CHECK-NEXT: vnsrl.wi v8, v10, 0 2726; CHECK-NEXT: ret 2727 %evec = fptoui <vscale x 8 x double> %va to <vscale x 8 x i8> 2728 ret <vscale x 8 x i8> %evec 2729} 2730 2731define <vscale x 8 x i16> @vfptosi_nxv8f64_nxv8i16(<vscale x 8 x double> %va) { 2732; CHECK-LABEL: vfptosi_nxv8f64_nxv8i16: 2733; CHECK: # %bb.0: 2734; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2735; CHECK-NEXT: vfncvt.rtz.x.f.w v16, v8 2736; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma 2737; CHECK-NEXT: vnsrl.wi v8, v16, 0 2738; CHECK-NEXT: ret 2739 %evec = fptosi <vscale x 8 x double> %va to <vscale x 8 x i16> 2740 ret <vscale x 8 x i16> %evec 2741} 2742 2743define <vscale x 8 x i16> @vfptoui_nxv8f64_nxv8i16(<vscale x 8 x double> %va) { 2744; CHECK-LABEL: vfptoui_nxv8f64_nxv8i16: 2745; CHECK: # %bb.0: 2746; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2747; CHECK-NEXT: vfncvt.rtz.xu.f.w v16, v8 2748; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma 2749; CHECK-NEXT: vnsrl.wi v8, v16, 0 2750; CHECK-NEXT: ret 2751 %evec = fptoui <vscale x 8 x double> %va to <vscale x 8 x i16> 2752 ret <vscale x 8 x i16> %evec 2753} 2754 2755define <vscale x 8 x i32> @vfptosi_nxv8f64_nxv8i32(<vscale x 8 x double> %va) { 2756; CHECK-LABEL: vfptosi_nxv8f64_nxv8i32: 2757; CHECK: # %bb.0: 2758; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2759; CHECK-NEXT: vfncvt.rtz.x.f.w v16, v8 2760; CHECK-NEXT: vmv.v.v v8, v16 2761; CHECK-NEXT: ret 2762 %evec = fptosi <vscale x 8 x double> %va to <vscale x 8 x i32> 2763 ret <vscale x 8 x i32> %evec 2764} 2765 2766define <vscale x 8 x i32> @vfptoui_nxv8f64_nxv8i32(<vscale x 8 x double> %va) { 2767; CHECK-LABEL: vfptoui_nxv8f64_nxv8i32: 2768; CHECK: # %bb.0: 2769; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma 2770; CHECK-NEXT: vfncvt.rtz.xu.f.w v16, v8 2771; CHECK-NEXT: vmv.v.v v8, v16 2772; CHECK-NEXT: ret 2773 %evec = fptoui <vscale x 8 x double> %va to <vscale x 8 x i32> 2774 ret <vscale x 8 x i32> %evec 2775} 2776 2777define <vscale x 8 x i64> @vfptosi_nxv8f64_nxv8i64(<vscale x 8 x double> %va) { 2778; CHECK-LABEL: vfptosi_nxv8f64_nxv8i64: 2779; CHECK: # %bb.0: 2780; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma 2781; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8 2782; CHECK-NEXT: ret 2783 %evec = fptosi <vscale x 8 x double> %va to <vscale x 8 x i64> 2784 ret <vscale x 8 x i64> %evec 2785} 2786 2787define <vscale x 8 x i64> @vfptoui_nxv8f64_nxv8i64(<vscale x 8 x double> %va) { 2788; CHECK-LABEL: vfptoui_nxv8f64_nxv8i64: 2789; CHECK: # %bb.0: 2790; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma 2791; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8 2792; CHECK-NEXT: ret 2793 %evec = fptoui <vscale x 8 x double> %va to <vscale x 8 x i64> 2794 ret <vscale x 8 x i64> %evec 2795} 2796