xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll (revision 1cb599835ccf7ee8b2d1d5a7f3107e19a26fc6f5)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v -target-abi=ilp32d \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s
4; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v -target-abi=lp64d \
5; RUN:     -verify-machineinstrs < %s | FileCheck %s
6
7; This tests a mix of vfnmacc and vfnmadd by using different operand orders to
8; trigger commuting in TwoAddressInstructionPass.
9
10declare <vscale x 1 x half> @llvm.fma.v1f16(<vscale x 1 x half>, <vscale x 1 x half>, <vscale x 1 x half>)
11
12define <vscale x 1 x half> @vfnmsub_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc) {
13; CHECK-LABEL: vfnmsub_vv_nxv1f16:
14; CHECK:       # %bb.0:
15; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
16; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
17; CHECK-NEXT:    ret
18  %neg = fneg <vscale x 1 x half> %va
19  %neg2 = fneg <vscale x 1 x half> %vc
20  %vd = call <vscale x 1 x half> @llvm.fma.v1f16(<vscale x 1 x half> %neg, <vscale x 1 x half> %vb, <vscale x 1 x half> %neg2)
21  ret <vscale x 1 x half> %vd
22}
23
24define <vscale x 1 x half> @vfnmsub_vf_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, half %c) {
25; CHECK-LABEL: vfnmsub_vf_nxv1f16:
26; CHECK:       # %bb.0:
27; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
28; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
29; CHECK-NEXT:    ret
30  %head = insertelement <vscale x 1 x half> poison, half %c, i32 0
31  %splat = shufflevector <vscale x 1 x half> %head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
32  %neg = fneg <vscale x 1 x half> %va
33  %neg2 = fneg <vscale x 1 x half> %vb
34  %vd = call <vscale x 1 x half> @llvm.fma.v1f16(<vscale x 1 x half> %neg, <vscale x 1 x half> %splat, <vscale x 1 x half> %neg2)
35  ret <vscale x 1 x half> %vd
36}
37
38declare <vscale x 2 x half> @llvm.fma.v2f16(<vscale x 2 x half>, <vscale x 2 x half>, <vscale x 2 x half>)
39
40define <vscale x 2 x half> @vfnmsub_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x half> %vc) {
41; CHECK-LABEL: vfnmsub_vv_nxv2f16:
42; CHECK:       # %bb.0:
43; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
44; CHECK-NEXT:    vfnmadd.vv v8, v10, v9
45; CHECK-NEXT:    ret
46  %neg = fneg <vscale x 2 x half> %va
47  %neg2 = fneg <vscale x 2 x half> %vb
48  %vd = call <vscale x 2 x half> @llvm.fma.v2f16(<vscale x 2 x half> %neg, <vscale x 2 x half> %vc, <vscale x 2 x half> %neg2)
49  ret <vscale x 2 x half> %vd
50}
51
52define <vscale x 2 x half> @vfnmsub_vf_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, half %c) {
53; CHECK-LABEL: vfnmsub_vf_nxv2f16:
54; CHECK:       # %bb.0:
55; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
56; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
57; CHECK-NEXT:    ret
58  %head = insertelement <vscale x 2 x half> poison, half %c, i32 0
59  %splat = shufflevector <vscale x 2 x half> %head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
60  %neg = fneg <vscale x 2 x half> %va
61  %neg2 = fneg <vscale x 2 x half> %vb
62  %vd = call <vscale x 2 x half> @llvm.fma.v2f16(<vscale x 2 x half> %splat, <vscale x 2 x half> %neg, <vscale x 2 x half> %neg2)
63  ret <vscale x 2 x half> %vd
64}
65
66declare <vscale x 4 x half> @llvm.fma.v4f16(<vscale x 4 x half>, <vscale x 4 x half>, <vscale x 4 x half>)
67
68define <vscale x 4 x half> @vfnmsub_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x half> %vc) {
69; CHECK-LABEL: vfnmsub_vv_nxv4f16:
70; CHECK:       # %bb.0:
71; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
72; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
73; CHECK-NEXT:    ret
74  %neg = fneg <vscale x 4 x half> %vb
75  %neg2 = fneg <vscale x 4 x half> %vc
76  %vd = call <vscale x 4 x half> @llvm.fma.v4f16(<vscale x 4 x half> %neg, <vscale x 4 x half> %va, <vscale x 4 x half> %neg2)
77  ret <vscale x 4 x half> %vd
78}
79
80define <vscale x 4 x half> @vfnmsub_vf_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, half %c) {
81; CHECK-LABEL: vfnmsub_vf_nxv4f16:
82; CHECK:       # %bb.0:
83; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
84; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
85; CHECK-NEXT:    ret
86  %head = insertelement <vscale x 4 x half> poison, half %c, i32 0
87  %splat = shufflevector <vscale x 4 x half> %head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
88  %neg = fneg <vscale x 4 x half> %splat
89  %neg2 = fneg <vscale x 4 x half> %vb
90  %vd = call <vscale x 4 x half> @llvm.fma.v4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %neg, <vscale x 4 x half> %neg2)
91  ret <vscale x 4 x half> %vd
92}
93
94declare <vscale x 8 x half> @llvm.fma.v8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)
95
96define <vscale x 8 x half> @vfnmsub_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x half> %vc) {
97; CHECK-LABEL: vfnmsub_vv_nxv8f16:
98; CHECK:       # %bb.0:
99; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
100; CHECK-NEXT:    vfnmacc.vv v8, v12, v10
101; CHECK-NEXT:    ret
102  %neg = fneg <vscale x 8 x half> %vb
103  %neg2 = fneg <vscale x 8 x half> %va
104  %vd = call <vscale x 8 x half> @llvm.fma.v8f16(<vscale x 8 x half> %neg, <vscale x 8 x half> %vc, <vscale x 8 x half> %neg2)
105  ret <vscale x 8 x half> %vd
106}
107
108define <vscale x 8 x half> @vfnmsub_vf_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, half %c) {
109; CHECK-LABEL: vfnmsub_vf_nxv8f16:
110; CHECK:       # %bb.0:
111; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
112; CHECK-NEXT:    vfnmacc.vf v8, fa0, v10
113; CHECK-NEXT:    ret
114  %head = insertelement <vscale x 8 x half> poison, half %c, i32 0
115  %splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
116  %neg = fneg <vscale x 8 x half> %splat
117  %neg2 = fneg <vscale x 8 x half> %va
118  %vd = call <vscale x 8 x half> @llvm.fma.v8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %neg, <vscale x 8 x half> %neg2)
119  ret <vscale x 8 x half> %vd
120}
121
122declare <vscale x 16 x half> @llvm.fma.v16f16(<vscale x 16 x half>, <vscale x 16 x half>, <vscale x 16 x half>)
123
124define <vscale x 16 x half> @vfnmsub_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x half> %vc) {
125; CHECK-LABEL: vfnmsub_vv_nxv16f16:
126; CHECK:       # %bb.0:
127; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
128; CHECK-NEXT:    vfnmadd.vv v8, v16, v12
129; CHECK-NEXT:    ret
130  %neg = fneg <vscale x 16 x half> %vc
131  %neg2 = fneg <vscale x 16 x half> %vb
132  %vd = call <vscale x 16 x half> @llvm.fma.v16f16(<vscale x 16 x half> %neg, <vscale x 16 x half> %va, <vscale x 16 x half> %neg2)
133  ret <vscale x 16 x half> %vd
134}
135
136define <vscale x 16 x half> @vfnmsub_vf_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, half %c) {
137; CHECK-LABEL: vfnmsub_vf_nxv16f16:
138; CHECK:       # %bb.0:
139; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
140; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12
141; CHECK-NEXT:    ret
142  %head = insertelement <vscale x 16 x half> poison, half %c, i32 0
143  %splat = shufflevector <vscale x 16 x half> %head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
144  %neg = fneg <vscale x 16 x half> %splat
145  %neg2 = fneg <vscale x 16 x half> %vb
146  %vd = call <vscale x 16 x half> @llvm.fma.v16f16(<vscale x 16 x half> %neg, <vscale x 16 x half> %va, <vscale x 16 x half> %neg2)
147  ret <vscale x 16 x half> %vd
148}
149
150declare <vscale x 32 x half> @llvm.fma.v32f16(<vscale x 32 x half>, <vscale x 32 x half>, <vscale x 32 x half>)
151
152define <vscale x 32 x half> @vfnmsub_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x half> %vc) {
153; CHECK-LABEL: vfnmsub_vv_nxv32f16:
154; CHECK:       # %bb.0:
155; CHECK-NEXT:    vl8re16.v v24, (a0)
156; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
157; CHECK-NEXT:    vfnmadd.vv v8, v24, v16
158; CHECK-NEXT:    ret
159  %neg = fneg <vscale x 32 x half> %vc
160  %neg2 = fneg <vscale x 32 x half> %vb
161  %vd = call <vscale x 32 x half> @llvm.fma.v32f16(<vscale x 32 x half> %neg, <vscale x 32 x half> %va, <vscale x 32 x half> %neg2)
162  ret <vscale x 32 x half> %vd
163}
164
165define <vscale x 32 x half> @vfnmsub_vf_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, half %c) {
166; CHECK-LABEL: vfnmsub_vf_nxv32f16:
167; CHECK:       # %bb.0:
168; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
169; CHECK-NEXT:    vfnmacc.vf v8, fa0, v16
170; CHECK-NEXT:    ret
171  %head = insertelement <vscale x 32 x half> poison, half %c, i32 0
172  %splat = shufflevector <vscale x 32 x half> %head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
173  %neg = fneg <vscale x 32 x half> %splat
174  %neg2 = fneg <vscale x 32 x half> %va
175  %vd = call <vscale x 32 x half> @llvm.fma.v32f16(<vscale x 32 x half> %neg, <vscale x 32 x half> %vb, <vscale x 32 x half> %neg2)
176  ret <vscale x 32 x half> %vd
177}
178
179declare <vscale x 1 x float> @llvm.fma.v1f32(<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>)
180
181define <vscale x 1 x float> @vfnmsub_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %vc) {
182; CHECK-LABEL: vfnmsub_vv_nxv1f32:
183; CHECK:       # %bb.0:
184; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
185; CHECK-NEXT:    vfnmadd.vv v8, v9, v10
186; CHECK-NEXT:    ret
187  %neg = fneg <vscale x 1 x float> %vb
188  %neg2 = fneg <vscale x 1 x float> %vc
189  %vd = call <vscale x 1 x float> @llvm.fma.v1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %neg, <vscale x 1 x float> %neg2)
190  ret <vscale x 1 x float> %vd
191}
192
193define <vscale x 1 x float> @vfnmsub_vf_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, float %c) {
194; CHECK-LABEL: vfnmsub_vf_nxv1f32:
195; CHECK:       # %bb.0:
196; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
197; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
198; CHECK-NEXT:    ret
199  %head = insertelement <vscale x 1 x float> poison, float %c, i32 0
200  %splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
201  %neg = fneg <vscale x 1 x float> %va
202  %neg2 = fneg <vscale x 1 x float> %vb
203  %vd = call <vscale x 1 x float> @llvm.fma.v1f32(<vscale x 1 x float> %neg, <vscale x 1 x float> %splat, <vscale x 1 x float> %neg2)
204  ret <vscale x 1 x float> %vd
205}
206
207declare <vscale x 2 x float> @llvm.fma.v2f32(<vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x float>)
208
209define <vscale x 2 x float> @vfnmsub_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x float> %vc) {
210; CHECK-LABEL: vfnmsub_vv_nxv2f32:
211; CHECK:       # %bb.0:
212; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
213; CHECK-NEXT:    vfnmadd.vv v8, v10, v9
214; CHECK-NEXT:    ret
215  %neg = fneg <vscale x 2 x float> %vc
216  %neg2 = fneg <vscale x 2 x float> %vb
217  %vd = call <vscale x 2 x float> @llvm.fma.v2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %neg, <vscale x 2 x float> %neg2)
218  ret <vscale x 2 x float> %vd
219}
220
221define <vscale x 2 x float> @vfnmsub_vf_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, float %c) {
222; CHECK-LABEL: vfnmsub_vf_nxv2f32:
223; CHECK:       # %bb.0:
224; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
225; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
226; CHECK-NEXT:    ret
227  %head = insertelement <vscale x 2 x float> poison, float %c, i32 0
228  %splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
229  %neg = fneg <vscale x 2 x float> %va
230  %neg2 = fneg <vscale x 2 x float> %vb
231  %vd = call <vscale x 2 x float> @llvm.fma.v2f32(<vscale x 2 x float> %splat, <vscale x 2 x float> %neg, <vscale x 2 x float> %neg2)
232  ret <vscale x 2 x float> %vd
233}
234
235declare <vscale x 4 x float> @llvm.fma.v4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)
236
237define <vscale x 4 x float> @vfnmsub_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x float> %vc) {
238; CHECK-LABEL: vfnmsub_vv_nxv4f32:
239; CHECK:       # %bb.0:
240; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
241; CHECK-NEXT:    vfnmadd.vv v8, v10, v12
242; CHECK-NEXT:    ret
243  %neg = fneg <vscale x 4 x float> %va
244  %neg2 = fneg <vscale x 4 x float> %vc
245  %vd = call <vscale x 4 x float> @llvm.fma.v4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %neg, <vscale x 4 x float> %neg2)
246  ret <vscale x 4 x float> %vd
247}
248
249define <vscale x 4 x float> @vfnmsub_vf_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, float %c) {
250; CHECK-LABEL: vfnmsub_vf_nxv4f32:
251; CHECK:       # %bb.0:
252; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
253; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10
254; CHECK-NEXT:    ret
255  %head = insertelement <vscale x 4 x float> poison, float %c, i32 0
256  %splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
257  %neg = fneg <vscale x 4 x float> %splat
258  %neg2 = fneg <vscale x 4 x float> %vb
259  %vd = call <vscale x 4 x float> @llvm.fma.v4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %neg, <vscale x 4 x float> %neg2)
260  ret <vscale x 4 x float> %vd
261}
262
263declare <vscale x 8 x float> @llvm.fma.v8f32(<vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x float>)
264
265define <vscale x 8 x float> @vfnmsub_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x float> %vc) {
266; CHECK-LABEL: vfnmsub_vv_nxv8f32:
267; CHECK:       # %bb.0:
268; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
269; CHECK-NEXT:    vfnmacc.vv v8, v16, v12
270; CHECK-NEXT:    ret
271  %neg = fneg <vscale x 8 x float> %vc
272  %neg2 = fneg <vscale x 8 x float> %va
273  %vd = call <vscale x 8 x float> @llvm.fma.v8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %neg, <vscale x 8 x float> %neg2)
274  ret <vscale x 8 x float> %vd
275}
276
277define <vscale x 8 x float> @vfnmsub_vf_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, float %c) {
278; CHECK-LABEL: vfnmsub_vf_nxv8f32:
279; CHECK:       # %bb.0:
280; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
281; CHECK-NEXT:    vfnmacc.vf v8, fa0, v12
282; CHECK-NEXT:    ret
283  %head = insertelement <vscale x 8 x float> poison, float %c, i32 0
284  %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
285  %neg = fneg <vscale x 8 x float> %splat
286  %neg2 = fneg <vscale x 8 x float> %va
287  %vd = call <vscale x 8 x float> @llvm.fma.v8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %neg, <vscale x 8 x float> %neg2)
288  ret <vscale x 8 x float> %vd
289}
290
291declare <vscale x 16 x float> @llvm.fma.v16f32(<vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x float>)
292
293define <vscale x 16 x float> @vfnmsub_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x float> %vc) {
294; CHECK-LABEL: vfnmsub_vv_nxv16f32:
295; CHECK:       # %bb.0:
296; CHECK-NEXT:    vl8re32.v v24, (a0)
297; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
298; CHECK-NEXT:    vfnmadd.vv v8, v24, v16
299; CHECK-NEXT:    ret
300  %neg = fneg <vscale x 16 x float> %va
301  %neg2 = fneg <vscale x 16 x float> %vb
302  %vd = call <vscale x 16 x float> @llvm.fma.v16f32(<vscale x 16 x float> %vc, <vscale x 16 x float> %neg, <vscale x 16 x float> %neg2)
303  ret <vscale x 16 x float> %vd
304}
305
306define <vscale x 16 x float> @vfnmsub_vf_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, float %c) {
307; CHECK-LABEL: vfnmsub_vf_nxv16f32:
308; CHECK:       # %bb.0:
309; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
310; CHECK-NEXT:    vfnmadd.vf v8, fa0, v16
311; CHECK-NEXT:    ret
312  %head = insertelement <vscale x 16 x float> poison, float %c, i32 0
313  %splat = shufflevector <vscale x 16 x float> %head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
314  %neg = fneg <vscale x 16 x float> %splat
315  %neg2 = fneg <vscale x 16 x float> %vb
316  %vd = call <vscale x 16 x float> @llvm.fma.v16f32(<vscale x 16 x float> %neg, <vscale x 16 x float> %va, <vscale x 16 x float> %neg2)
317  ret <vscale x 16 x float> %vd
318}
319
320declare <vscale x 1 x double> @llvm.fma.v1f64(<vscale x 1 x double>, <vscale x 1 x double>, <vscale x 1 x double>)
321
322define <vscale x 1 x double> @vfnmsub_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %vc) {
323; CHECK-LABEL: vfnmsub_vv_nxv1f64:
324; CHECK:       # %bb.0:
325; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
326; CHECK-NEXT:    vfnmacc.vv v8, v10, v9
327; CHECK-NEXT:    ret
328  %neg = fneg <vscale x 1 x double> %vb
329  %neg2 = fneg <vscale x 1 x double> %va
330  %vd = call <vscale x 1 x double> @llvm.fma.v1f64(<vscale x 1 x double> %vc, <vscale x 1 x double> %neg, <vscale x 1 x double> %neg2)
331  ret <vscale x 1 x double> %vd
332}
333
334define <vscale x 1 x double> @vfnmsub_vf_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, double %c) {
335; CHECK-LABEL: vfnmsub_vf_nxv1f64:
336; CHECK:       # %bb.0:
337; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
338; CHECK-NEXT:    vfnmadd.vf v8, fa0, v9
339; CHECK-NEXT:    ret
340  %head = insertelement <vscale x 1 x double> poison, double %c, i32 0
341  %splat = shufflevector <vscale x 1 x double> %head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
342  %neg = fneg <vscale x 1 x double> %va
343  %neg2 = fneg <vscale x 1 x double> %vb
344  %vd = call <vscale x 1 x double> @llvm.fma.v1f64(<vscale x 1 x double> %neg, <vscale x 1 x double> %splat, <vscale x 1 x double> %neg2)
345  ret <vscale x 1 x double> %vd
346}
347
348declare <vscale x 2 x double> @llvm.fma.v2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)
349
350define <vscale x 2 x double> @vfnmsub_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x double> %vc) {
351; CHECK-LABEL: vfnmsub_vv_nxv2f64:
352; CHECK:       # %bb.0:
353; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
354; CHECK-NEXT:    vfnmadd.vv v8, v12, v10
355; CHECK-NEXT:    ret
356  %neg = fneg <vscale x 2 x double> %va
357  %neg2 = fneg <vscale x 2 x double> %vb
358  %vd = call <vscale x 2 x double> @llvm.fma.v2f64(<vscale x 2 x double> %neg, <vscale x 2 x double> %vc, <vscale x 2 x double> %neg2)
359  ret <vscale x 2 x double> %vd
360}
361
362define <vscale x 2 x double> @vfnmsub_vf_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, double %c) {
363; CHECK-LABEL: vfnmsub_vf_nxv2f64:
364; CHECK:       # %bb.0:
365; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
366; CHECK-NEXT:    vfnmadd.vf v8, fa0, v10
367; CHECK-NEXT:    ret
368  %head = insertelement <vscale x 2 x double> poison, double %c, i32 0
369  %splat = shufflevector <vscale x 2 x double> %head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
370  %neg = fneg <vscale x 2 x double> %va
371  %neg2 = fneg <vscale x 2 x double> %vb
372  %vd = call <vscale x 2 x double> @llvm.fma.v2f64(<vscale x 2 x double> %splat, <vscale x 2 x double> %neg, <vscale x 2 x double> %neg2)
373  ret <vscale x 2 x double> %vd
374}
375
376declare <vscale x 4 x double> @llvm.fma.v4f64(<vscale x 4 x double>, <vscale x 4 x double>, <vscale x 4 x double>)
377
378define <vscale x 4 x double> @vfnmsub_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x double> %vc) {
379; CHECK-LABEL: vfnmsub_vv_nxv4f64:
380; CHECK:       # %bb.0:
381; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
382; CHECK-NEXT:    vfnmadd.vv v8, v12, v16
383; CHECK-NEXT:    ret
384  %neg = fneg <vscale x 4 x double> %vb
385  %neg2 = fneg <vscale x 4 x double> %vc
386  %vd = call <vscale x 4 x double> @llvm.fma.v4f64(<vscale x 4 x double> %neg, <vscale x 4 x double> %va, <vscale x 4 x double> %neg2)
387  ret <vscale x 4 x double> %vd
388}
389
390define <vscale x 4 x double> @vfnmsub_vf_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, double %c) {
391; CHECK-LABEL: vfnmsub_vf_nxv4f64:
392; CHECK:       # %bb.0:
393; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
394; CHECK-NEXT:    vfnmadd.vf v8, fa0, v12
395; CHECK-NEXT:    ret
396  %head = insertelement <vscale x 4 x double> poison, double %c, i32 0
397  %splat = shufflevector <vscale x 4 x double> %head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
398  %neg = fneg <vscale x 4 x double> %splat
399  %neg2 = fneg <vscale x 4 x double> %vb
400  %vd = call <vscale x 4 x double> @llvm.fma.v4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %neg, <vscale x 4 x double> %neg2)
401  ret <vscale x 4 x double> %vd
402}
403
404declare <vscale x 8 x double> @llvm.fma.v8f64(<vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x double>)
405
406define <vscale x 8 x double> @vfnmsub_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x double> %vc) {
407; CHECK-LABEL: vfnmsub_vv_nxv8f64:
408; CHECK:       # %bb.0:
409; CHECK-NEXT:    vl8re64.v v24, (a0)
410; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
411; CHECK-NEXT:    vfnmacc.vv v8, v16, v24
412; CHECK-NEXT:    ret
413  %neg = fneg <vscale x 8 x double> %vb
414  %neg2 = fneg <vscale x 8 x double> %va
415  %vd = call <vscale x 8 x double> @llvm.fma.v8f64(<vscale x 8 x double> %neg, <vscale x 8 x double> %vc, <vscale x 8 x double> %neg2)
416  ret <vscale x 8 x double> %vd
417}
418
419define <vscale x 8 x double> @vfnmsub_vf_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, double %c) {
420; CHECK-LABEL: vfnmsub_vf_nxv8f64:
421; CHECK:       # %bb.0:
422; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
423; CHECK-NEXT:    vfnmacc.vf v8, fa0, v16
424; CHECK-NEXT:    ret
425  %head = insertelement <vscale x 8 x double> poison, double %c, i32 0
426  %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
427  %neg = fneg <vscale x 8 x double> %splat
428  %neg2 = fneg <vscale x 8 x double> %va
429  %vd = call <vscale x 8 x double> @llvm.fma.v8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %neg, <vscale x 8 x double> %neg2)
430  ret <vscale x 8 x double> %vd
431}
432