xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll (revision 1cb599835ccf7ee8b2d1d5a7f3107e19a26fc6f5)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v -target-abi=ilp32d \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s
4; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v -target-abi=ilp32d \
5; RUN:     -verify-machineinstrs -early-live-intervals < %s | FileCheck %s
6; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v -target-abi=lp64d \
7; RUN:     -verify-machineinstrs < %s | FileCheck %s
8; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v -target-abi=lp64d \
9; RUN:     -verify-machineinstrs -early-live-intervals < %s | FileCheck %s
10
11; This tests a mix of vfmsac and vfmsub by using different operand orders to
12; trigger commuting in TwoAddressInstructionPass.
13
14declare <vscale x 1 x half> @llvm.fma.v1f16(<vscale x 1 x half>, <vscale x 1 x half>, <vscale x 1 x half>)
15
16define <vscale x 1 x half> @vfmsub_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc) {
17; CHECK-LABEL: vfmsub_vv_nxv1f16:
18; CHECK:       # %bb.0:
19; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
20; CHECK-NEXT:    vfmsub.vv v8, v9, v10
21; CHECK-NEXT:    ret
22  %neg = fneg <vscale x 1 x half> %vc
23  %vd = call <vscale x 1 x half> @llvm.fma.v1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %neg)
24  ret <vscale x 1 x half> %vd
25}
26
27define <vscale x 1 x half> @vfmsub_vf_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, half %c) {
28; CHECK-LABEL: vfmsub_vf_nxv1f16:
29; CHECK:       # %bb.0:
30; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
31; CHECK-NEXT:    vfmsub.vf v8, fa0, v9
32; CHECK-NEXT:    ret
33  %head = insertelement <vscale x 1 x half> poison, half %c, i32 0
34  %splat = shufflevector <vscale x 1 x half> %head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
35  %neg = fneg <vscale x 1 x half> %vb
36  %vd = call <vscale x 1 x half> @llvm.fma.v1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %splat, <vscale x 1 x half> %neg)
37  ret <vscale x 1 x half> %vd
38}
39
40declare <vscale x 2 x half> @llvm.fma.v2f16(<vscale x 2 x half>, <vscale x 2 x half>, <vscale x 2 x half>)
41
42define <vscale x 2 x half> @vfmsub_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x half> %vc) {
43; CHECK-LABEL: vfmsub_vv_nxv2f16:
44; CHECK:       # %bb.0:
45; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
46; CHECK-NEXT:    vfmsub.vv v8, v10, v9
47; CHECK-NEXT:    ret
48  %neg = fneg <vscale x 2 x half> %vb
49  %vd = call <vscale x 2 x half> @llvm.fma.v2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vc, <vscale x 2 x half> %neg)
50  ret <vscale x 2 x half> %vd
51}
52
53define <vscale x 2 x half> @vfmsub_vf_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, half %c) {
54; CHECK-LABEL: vfmsub_vf_nxv2f16:
55; CHECK:       # %bb.0:
56; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
57; CHECK-NEXT:    vfmsac.vf v8, fa0, v9
58; CHECK-NEXT:    ret
59  %head = insertelement <vscale x 2 x half> poison, half %c, i32 0
60  %splat = shufflevector <vscale x 2 x half> %head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
61  %neg = fneg <vscale x 2 x half> %va
62  %vd = call <vscale x 2 x half> @llvm.fma.v2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %splat, <vscale x 2 x half> %neg)
63  ret <vscale x 2 x half> %vd
64}
65
66declare <vscale x 4 x half> @llvm.fma.v4f16(<vscale x 4 x half>, <vscale x 4 x half>, <vscale x 4 x half>)
67
68define <vscale x 4 x half> @vfmsub_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x half> %vc) {
69; CHECK-LABEL: vfmsub_vv_nxv4f16:
70; CHECK:       # %bb.0:
71; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
72; CHECK-NEXT:    vfmsub.vv v8, v9, v10
73; CHECK-NEXT:    ret
74  %neg = fneg <vscale x 4 x half> %vc
75  %vd = call <vscale x 4 x half> @llvm.fma.v4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %va, <vscale x 4 x half> %neg)
76  ret <vscale x 4 x half> %vd
77}
78
79define <vscale x 4 x half> @vfmsub_vf_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, half %c) {
80; CHECK-LABEL: vfmsub_vf_nxv4f16:
81; CHECK:       # %bb.0:
82; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
83; CHECK-NEXT:    vfmsub.vf v8, fa0, v9
84; CHECK-NEXT:    ret
85  %head = insertelement <vscale x 4 x half> poison, half %c, i32 0
86  %splat = shufflevector <vscale x 4 x half> %head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
87  %neg = fneg <vscale x 4 x half> %vb
88  %vd = call <vscale x 4 x half> @llvm.fma.v4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %splat, <vscale x 4 x half> %neg)
89  ret <vscale x 4 x half> %vd
90}
91
92declare <vscale x 8 x half> @llvm.fma.v8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)
93
94define <vscale x 8 x half> @vfmsub_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x half> %vc) {
95; CHECK-LABEL: vfmsub_vv_nxv8f16:
96; CHECK:       # %bb.0:
97; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
98; CHECK-NEXT:    vfmsac.vv v8, v12, v10
99; CHECK-NEXT:    ret
100  %neg = fneg <vscale x 8 x half> %va
101  %vd = call <vscale x 8 x half> @llvm.fma.v8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %vc, <vscale x 8 x half> %neg)
102  ret <vscale x 8 x half> %vd
103}
104
105define <vscale x 8 x half> @vfmsub_vf_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, half %c) {
106; CHECK-LABEL: vfmsub_vf_nxv8f16:
107; CHECK:       # %bb.0:
108; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
109; CHECK-NEXT:    vfmsac.vf v8, fa0, v10
110; CHECK-NEXT:    ret
111  %head = insertelement <vscale x 8 x half> poison, half %c, i32 0
112  %splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
113  %neg = fneg <vscale x 8 x half> %va
114  %vd = call <vscale x 8 x half> @llvm.fma.v8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %splat, <vscale x 8 x half> %neg)
115  ret <vscale x 8 x half> %vd
116}
117
118declare <vscale x 16 x half> @llvm.fma.v16f16(<vscale x 16 x half>, <vscale x 16 x half>, <vscale x 16 x half>)
119
120define <vscale x 16 x half> @vfmsub_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x half> %vc) {
121; CHECK-LABEL: vfmsub_vv_nxv16f16:
122; CHECK:       # %bb.0:
123; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
124; CHECK-NEXT:    vfmsub.vv v8, v16, v12
125; CHECK-NEXT:    ret
126  %neg = fneg <vscale x 16 x half> %vb
127  %vd = call <vscale x 16 x half> @llvm.fma.v16f16(<vscale x 16 x half> %vc, <vscale x 16 x half> %va, <vscale x 16 x half> %neg)
128  ret <vscale x 16 x half> %vd
129}
130
131define <vscale x 16 x half> @vfmsub_vf_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, half %c) {
132; CHECK-LABEL: vfmsub_vf_nxv16f16:
133; CHECK:       # %bb.0:
134; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
135; CHECK-NEXT:    vfmsub.vf v8, fa0, v12
136; CHECK-NEXT:    ret
137  %head = insertelement <vscale x 16 x half> poison, half %c, i32 0
138  %splat = shufflevector <vscale x 16 x half> %head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
139  %neg = fneg <vscale x 16 x half> %vb
140  %vd = call <vscale x 16 x half> @llvm.fma.v16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %splat, <vscale x 16 x half> %neg)
141  ret <vscale x 16 x half> %vd
142}
143
144declare <vscale x 32 x half> @llvm.fma.v32f16(<vscale x 32 x half>, <vscale x 32 x half>, <vscale x 32 x half>)
145
146define <vscale x 32 x half> @vfmsub_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x half> %vc) {
147; CHECK-LABEL: vfmsub_vv_nxv32f16:
148; CHECK:       # %bb.0:
149; CHECK-NEXT:    vl8re16.v v24, (a0)
150; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
151; CHECK-NEXT:    vfmsac.vv v8, v16, v24
152; CHECK-NEXT:    ret
153  %neg = fneg <vscale x 32 x half> %va
154  %vd = call <vscale x 32 x half> @llvm.fma.v32f16(<vscale x 32 x half> %vc, <vscale x 32 x half> %vb, <vscale x 32 x half> %neg)
155  ret <vscale x 32 x half> %vd
156}
157
158define <vscale x 32 x half> @vfmsub_vf_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, half %c) {
159; CHECK-LABEL: vfmsub_vf_nxv32f16:
160; CHECK:       # %bb.0:
161; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
162; CHECK-NEXT:    vfmsac.vf v8, fa0, v16
163; CHECK-NEXT:    ret
164  %head = insertelement <vscale x 32 x half> poison, half %c, i32 0
165  %splat = shufflevector <vscale x 32 x half> %head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
166  %neg = fneg <vscale x 32 x half> %va
167  %vd = call <vscale x 32 x half> @llvm.fma.v32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %splat, <vscale x 32 x half> %neg)
168  ret <vscale x 32 x half> %vd
169}
170
171declare <vscale x 1 x float> @llvm.fma.v1f32(<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>)
172
173define <vscale x 1 x float> @vfmsub_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %vc) {
174; CHECK-LABEL: vfmsub_vv_nxv1f32:
175; CHECK:       # %bb.0:
176; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
177; CHECK-NEXT:    vfmsub.vv v8, v9, v10
178; CHECK-NEXT:    ret
179  %neg = fneg <vscale x 1 x float> %vc
180  %vd = call <vscale x 1 x float> @llvm.fma.v1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %neg)
181  ret <vscale x 1 x float> %vd
182}
183
184define <vscale x 1 x float> @vfmsub_vf_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, float %c) {
185; CHECK-LABEL: vfmsub_vf_nxv1f32:
186; CHECK:       # %bb.0:
187; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
188; CHECK-NEXT:    vfmsub.vf v8, fa0, v9
189; CHECK-NEXT:    ret
190  %head = insertelement <vscale x 1 x float> poison, float %c, i32 0
191  %splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
192  %neg = fneg <vscale x 1 x float> %vb
193  %vd = call <vscale x 1 x float> @llvm.fma.v1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %splat, <vscale x 1 x float> %neg)
194  ret <vscale x 1 x float> %vd
195}
196
197declare <vscale x 2 x float> @llvm.fma.v2f32(<vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x float>)
198
199define <vscale x 2 x float> @vfmsub_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x float> %vc) {
200; CHECK-LABEL: vfmsub_vv_nxv2f32:
201; CHECK:       # %bb.0:
202; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
203; CHECK-NEXT:    vfmsub.vv v8, v10, v9
204; CHECK-NEXT:    ret
205  %neg = fneg <vscale x 2 x float> %vb
206  %vd = call <vscale x 2 x float> @llvm.fma.v2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vc, <vscale x 2 x float> %neg)
207  ret <vscale x 2 x float> %vd
208}
209
210define <vscale x 2 x float> @vfmsub_vf_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, float %c) {
211; CHECK-LABEL: vfmsub_vf_nxv2f32:
212; CHECK:       # %bb.0:
213; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
214; CHECK-NEXT:    vfmsac.vf v8, fa0, v9
215; CHECK-NEXT:    ret
216  %head = insertelement <vscale x 2 x float> poison, float %c, i32 0
217  %splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
218  %neg = fneg <vscale x 2 x float> %va
219  %vd = call <vscale x 2 x float> @llvm.fma.v2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %splat, <vscale x 2 x float> %neg)
220  ret <vscale x 2 x float> %vd
221}
222
223declare <vscale x 4 x float> @llvm.fma.v4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)
224
225define <vscale x 4 x float> @vfmsub_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x float> %vc) {
226; CHECK-LABEL: vfmsub_vv_nxv4f32:
227; CHECK:       # %bb.0:
228; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
229; CHECK-NEXT:    vfmsub.vv v8, v10, v12
230; CHECK-NEXT:    ret
231  %neg = fneg <vscale x 4 x float> %vc
232  %vd = call <vscale x 4 x float> @llvm.fma.v4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %va, <vscale x 4 x float> %neg)
233  ret <vscale x 4 x float> %vd
234}
235
236define <vscale x 4 x float> @vfmsub_vf_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, float %c) {
237; CHECK-LABEL: vfmsub_vf_nxv4f32:
238; CHECK:       # %bb.0:
239; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
240; CHECK-NEXT:    vfmsub.vf v8, fa0, v10
241; CHECK-NEXT:    ret
242  %head = insertelement <vscale x 4 x float> poison, float %c, i32 0
243  %splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
244  %neg = fneg <vscale x 4 x float> %vb
245  %vd = call <vscale x 4 x float> @llvm.fma.v4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %splat, <vscale x 4 x float> %neg)
246  ret <vscale x 4 x float> %vd
247}
248
249declare <vscale x 8 x float> @llvm.fma.v8f32(<vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x float>)
250
251define <vscale x 8 x float> @vfmsub_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x float> %vc) {
252; CHECK-LABEL: vfmsub_vv_nxv8f32:
253; CHECK:       # %bb.0:
254; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
255; CHECK-NEXT:    vfmsac.vv v8, v16, v12
256; CHECK-NEXT:    ret
257  %neg = fneg <vscale x 8 x float> %va
258  %vd = call <vscale x 8 x float> @llvm.fma.v8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %vc, <vscale x 8 x float> %neg)
259  ret <vscale x 8 x float> %vd
260}
261
262define <vscale x 8 x float> @vfmsub_vf_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, float %c) {
263; CHECK-LABEL: vfmsub_vf_nxv8f32:
264; CHECK:       # %bb.0:
265; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
266; CHECK-NEXT:    vfmsac.vf v8, fa0, v12
267; CHECK-NEXT:    ret
268  %head = insertelement <vscale x 8 x float> poison, float %c, i32 0
269  %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
270  %neg = fneg <vscale x 8 x float> %va
271  %vd = call <vscale x 8 x float> @llvm.fma.v8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %splat, <vscale x 8 x float> %neg)
272  ret <vscale x 8 x float> %vd
273}
274
275declare <vscale x 16 x float> @llvm.fma.v16f32(<vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x float>)
276
277define <vscale x 16 x float> @vfmsub_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x float> %vc) {
278; CHECK-LABEL: vfmsub_vv_nxv16f32:
279; CHECK:       # %bb.0:
280; CHECK-NEXT:    vl8re32.v v24, (a0)
281; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
282; CHECK-NEXT:    vfmsub.vv v8, v24, v16
283; CHECK-NEXT:    ret
284  %neg = fneg <vscale x 16 x float> %vb
285  %vd = call <vscale x 16 x float> @llvm.fma.v16f32(<vscale x 16 x float> %vc, <vscale x 16 x float> %va, <vscale x 16 x float> %neg)
286  ret <vscale x 16 x float> %vd
287}
288
289define <vscale x 16 x float> @vfmsub_vf_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, float %c) {
290; CHECK-LABEL: vfmsub_vf_nxv16f32:
291; CHECK:       # %bb.0:
292; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
293; CHECK-NEXT:    vfmsub.vf v8, fa0, v16
294; CHECK-NEXT:    ret
295  %head = insertelement <vscale x 16 x float> poison, float %c, i32 0
296  %splat = shufflevector <vscale x 16 x float> %head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
297  %neg = fneg <vscale x 16 x float> %vb
298  %vd = call <vscale x 16 x float> @llvm.fma.v16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %splat, <vscale x 16 x float> %neg)
299  ret <vscale x 16 x float> %vd
300}
301
302declare <vscale x 1 x double> @llvm.fma.v1f64(<vscale x 1 x double>, <vscale x 1 x double>, <vscale x 1 x double>)
303
304define <vscale x 1 x double> @vfmsub_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %vc) {
305; CHECK-LABEL: vfmsub_vv_nxv1f64:
306; CHECK:       # %bb.0:
307; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
308; CHECK-NEXT:    vfmsub.vv v8, v9, v10
309; CHECK-NEXT:    ret
310  %neg = fneg <vscale x 1 x double> %vc
311  %vd = call <vscale x 1 x double> @llvm.fma.v1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %neg)
312  ret <vscale x 1 x double> %vd
313}
314
315define <vscale x 1 x double> @vfmsub_vf_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, double %c) {
316; CHECK-LABEL: vfmsub_vf_nxv1f64:
317; CHECK:       # %bb.0:
318; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
319; CHECK-NEXT:    vfmsub.vf v8, fa0, v9
320; CHECK-NEXT:    ret
321  %head = insertelement <vscale x 1 x double> poison, double %c, i32 0
322  %splat = shufflevector <vscale x 1 x double> %head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
323  %neg = fneg <vscale x 1 x double> %vb
324  %vd = call <vscale x 1 x double> @llvm.fma.v1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %splat, <vscale x 1 x double> %neg)
325  ret <vscale x 1 x double> %vd
326}
327
328declare <vscale x 2 x double> @llvm.fma.v2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)
329
330define <vscale x 2 x double> @vfmsub_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x double> %vc) {
331; CHECK-LABEL: vfmsub_vv_nxv2f64:
332; CHECK:       # %bb.0:
333; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
334; CHECK-NEXT:    vfmsub.vv v8, v12, v10
335; CHECK-NEXT:    ret
336  %neg = fneg <vscale x 2 x double> %vb
337  %vd = call <vscale x 2 x double> @llvm.fma.v2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vc, <vscale x 2 x double> %neg)
338  ret <vscale x 2 x double> %vd
339}
340
341define <vscale x 2 x double> @vfmsub_vf_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, double %c) {
342; CHECK-LABEL: vfmsub_vf_nxv2f64:
343; CHECK:       # %bb.0:
344; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
345; CHECK-NEXT:    vfmsac.vf v8, fa0, v10
346; CHECK-NEXT:    ret
347  %head = insertelement <vscale x 2 x double> poison, double %c, i32 0
348  %splat = shufflevector <vscale x 2 x double> %head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
349  %neg = fneg <vscale x 2 x double> %va
350  %vd = call <vscale x 2 x double> @llvm.fma.v2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %splat, <vscale x 2 x double> %neg)
351  ret <vscale x 2 x double> %vd
352}
353
354declare <vscale x 4 x double> @llvm.fma.v4f64(<vscale x 4 x double>, <vscale x 4 x double>, <vscale x 4 x double>)
355
356define <vscale x 4 x double> @vfmsub_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x double> %vc) {
357; CHECK-LABEL: vfmsub_vv_nxv4f64:
358; CHECK:       # %bb.0:
359; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
360; CHECK-NEXT:    vfmsub.vv v8, v12, v16
361; CHECK-NEXT:    ret
362  %neg = fneg <vscale x 4 x double> %vc
363  %vd = call <vscale x 4 x double> @llvm.fma.v4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %va, <vscale x 4 x double> %neg)
364  ret <vscale x 4 x double> %vd
365}
366
367define <vscale x 4 x double> @vfmsub_vf_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, double %c) {
368; CHECK-LABEL: vfmsub_vf_nxv4f64:
369; CHECK:       # %bb.0:
370; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
371; CHECK-NEXT:    vfmsub.vf v8, fa0, v12
372; CHECK-NEXT:    ret
373  %head = insertelement <vscale x 4 x double> poison, double %c, i32 0
374  %splat = shufflevector <vscale x 4 x double> %head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
375  %neg = fneg <vscale x 4 x double> %vb
376  %vd = call <vscale x 4 x double> @llvm.fma.v4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %splat, <vscale x 4 x double> %neg)
377  ret <vscale x 4 x double> %vd
378}
379
380declare <vscale x 8 x double> @llvm.fma.v8f64(<vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x double>)
381
382define <vscale x 8 x double> @vfmsub_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x double> %vc) {
383; CHECK-LABEL: vfmsub_vv_nxv8f64:
384; CHECK:       # %bb.0:
385; CHECK-NEXT:    vl8re64.v v24, (a0)
386; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
387; CHECK-NEXT:    vfmsac.vv v8, v16, v24
388; CHECK-NEXT:    ret
389  %neg = fneg <vscale x 8 x double> %va
390  %vd = call <vscale x 8 x double> @llvm.fma.v8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %vc, <vscale x 8 x double> %neg)
391  ret <vscale x 8 x double> %vd
392}
393
394define <vscale x 8 x double> @vfmsub_vf_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, double %c) {
395; CHECK-LABEL: vfmsub_vf_nxv8f64:
396; CHECK:       # %bb.0:
397; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
398; CHECK-NEXT:    vfmsac.vf v8, fa0, v16
399; CHECK-NEXT:    ret
400  %head = insertelement <vscale x 8 x double> poison, double %c, i32 0
401  %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
402  %neg = fneg <vscale x 8 x double> %va
403  %vd = call <vscale x 8 x double> @llvm.fma.v8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %splat, <vscale x 8 x double> %neg)
404  ret <vscale x 8 x double> %vd
405}
406